检索结果-内蒙古大学图书馆

VarCatcher: A Framework for Tackling Performance Variability of parallel Workloads on Multi-Core

IEEE TRANSACTIONS ON parallel AND distributed SYSTEMS 2017年第4期28卷 1215-1228页

作者： Zhang, Weihua Ji, Xiaofeng Song, Bo Yu, Shiqiang Chen, Haibo Li, Tao Yew, Pen-Chung Zhao, Wenyun Fudan Univ Shanghai Key Lab Data Sci Software Sch Shanghai 200433 Peoples R China Fudan Univ Parallel Proc Inst Shanghai 200433 Peoples R China Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai 200240 Peoples R China Univ Florida Dept Elect & Comp Engn Gainesville FL 32611 USA Univ Minnesota Dept Comp Sci & Engn Minneapolis MN 55455 USA Fudan Univ Sch Comp Sci Shanghai Key Lab Data Sci Shanghai 200433 Peoples R China

The non-deterministic nature of multi-threaded workloads running on multi-core platforms often leads to notable performance variability from run to run. Such variability makes experimental results prone to misinterpretations or misguided claims. To deal with such variability, statistical inference methods are usually used to summarize the experimental results with certain confidence levels by running the experiments or measurements a large number of times. However, such statistical results are often too vague or too simplistic. They are not sufficient to help users understand the causes of such variability, and allow more in-depth analysis on the results or reproduce the results for validation during design space exploration. To allow better analyzability and reproducibility, we propose a framework to tackle such variability, called VarCatcher. The key to VarCatcher is to characterize a parallel execution using parallel Characteristics Vector (PCV). A clustering-based approach is then used to group runs with similar execution characteristics that can later be used to analyze results in-depth, to customize different evaluation strategies, reproduce the result for variability, to determine the impact of features, or to assist performance diagnosis. We have built a prototype of VarCatcher that includes a user-level toolset for runtime monitoring and measurements using the Intel Processor Trace feature on commodity Intel processors as well as an architecture extension with very low runtime overheads (around 3 and 0.01 percent accordingly). Several case studies confirm that VarCatcher enables several appealing features such as in-depth result analysis, customized evaluation strategies, and reproducibility.

关键词： Variability parallel application evaluation multi core

来源：评论

学校读者我要写书评

暂无评论

Efficient and Available In-Memory KV-Store with Hybrid Erasure Coding and Replication

引用

ACM TRANSACTIONS ON STORAGE 2017年第3期13卷 25-25页

作者： Chen, Haibo Zhang, Heng Dong, Mingkai Wang, Zhaoguo Xia, Yubin Guan, Haibing Zang, Binyu Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai Key Lab Scalable Comp & Syst Room 3402Software Bldg800 Dongchuan Rd Shanghai 200240 Peoples R China

In-memory key/value store (KV-store) is a key building block for many systems like databases and large websites. Two key requirements for such systems are efficiency and availability, which demand a KV-store to continuously handle millions of requests per second. A common approach to availability is using replication, such as primary-backup (PBR), which, however, requires M + 1 times memory to tolerate M failures. This renders scarce memory unable to handle useful user jobs. This article makes the first case of building highly available in-memory KV-store by integrating erasure coding to achieve memory efficiency, while not notably degrading performance. A main challenge is that an in-memory KV-store has much scattered metadata. A single KV put may cause excessive coding operations and parity updates due to excessive small updates to metadata. Our approach, namely Cocytus, addresses this challenge by using a hybrid scheme that leverages PBR for small-sized and scattered data (e.g., metadata and key), while only applying erasure coding to relatively large data (e.g., value). To mitigate well-known issues like lengthy recovery of erasure coding, Cocytus uses an online recovery scheme by leveraging the replicated metadata information to continuously serve KV requests. To further demonstrate the usefulness of Cocytus, we have built a transaction layer by using Cocytus as a fast and reliable storage layer to store database records and transaction logs. We have integrated the design of Cocytus to Memcached and extend it to support inmemory transactions. Evaluation using YCSB with different KV configurations shows that Cocytus incurs low overhead for latency and throughput, can tolerate node failures with fast online recovery, while saving 33% to 46% memory compared to PBR when tolerating two failures. A further evaluation using the SmallBank OLTP benchmark shows that in-memory transactions can run atop Cocytus with high throughput, low latency, and low abort rate and reco

关键词： Primary-backup replication erasure coding KV-store transactions

来源：评论

学校读者我要写书评

暂无评论

Eunomia: Scaling Concurrent Search Trees under Contention Using HTM 17

Eunomia: Scaling Concurrent Search Trees under Contention Us...

引用

22nd ACM SIGPLAN Symposium on Principles and Practice of parallel Programming (PPoPP)

作者： Wang, Xin Zhang, Weihua Wang, Zhaoguo Wei, Ziyun Chen, Haibo Zhao, Wenyun Fudan Univ Software Sch Shanghai Peoples R China Fudan Univ Shanghai Key Lab Data Sci Shanghai Peoples R China Fudan Univ Sch Comp Sci Shanghai Peoples R China Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai Peoples R China NYU Comp Sci Dept New York NY 10003 USA

ISBN: (纸本)9781450344937

While hardware transactional memory (HTM) has recently been adopted to construct efficient concurrent search tree structures, such designs fail to deliver scalable performance under contention. In this paper, we first conduct a detailed analysis on an HTM-based concurrent B+Tree, which uncovers several reasons for excessive HTM aborts induced by both false and true conflicts under contention. Based on the analysis, we advocate Eunomia, a design pattern for search trees which contains several principles to reduce HTM aborts, including splitting HTM regions with version based concurrency control to reduce HTM working sets, partitioned data layout to reduce false conflicts, proactively detecting and avoiding true conflicts, and adaptive con currency control. To validate their effectiveness, we apply such designs to construct a scalable concurrent B+Tree using HTM. Evaluation using key-value store benchmarks on a 20-core HTM-capable multi-core machine shows that Eunomia leads to 5X-11X speedup under high contention, while incurring small overhead under low contention.

关键词： Hardware Transactional Memory Concurrent Search Tree Opportunistic Consistency

来源：评论

学校读者我要写书评

暂无评论

GNMF Revisited: Joint Robust k-NN Graph and Reconstruction-Based Graph Regularization for Image Clustering 26th

GNMF Revisited: Joint Robust <i>k</i>-NN Graph and Reconstru...

引用

26th International Conference on Artificial Neural Networks (ICANN)

作者： Gu, Feng Zhang, Wenju Zhang, Xiang Wang, Chenxu Huang, Xuhui Luo, Zhigang Natl Univ Def Technol Coll Comp Sci & Technol Parallel & Distributed Proc Lab Changsha Hunan Peoples R China Natl Univ Def Technol Coll Comp Inst Software Changsha Hunan Peoples R China Natl Univ Def Technol Coll Comp Dept Comp Sci & Technol Changsha Peoples R China

ISBN: (纸本)9783319686127;9783319686110

Clustering has long been a popular topic in machine learning and is the basic task of many vision applications. Graph regularized NMF (GNMF) and its variants as extensions of NMF decompose the whole dataset as the product of two low-rank matrices which respectively indicate centroids of clusters and cluster memberships for each sample. Although they utilize graph structure to reveal the geometrical structure within datasets, these methods completely ignore the robustness of graph structure. To address the issue above, this paper jointly incorporates a novel Robust Graph and Reconstruction-based Graph regularization into NMF (RG(2)NMF) to promote the gain in clustering performance. Particularly, RG(2)NMF stabilizes the objective of GNMF through the reconstruction regularization, and meanwhile exploits a learning procedure to derive the robust graph. Experiments of image clustering on two popular datasets illustrate the effectiveness of RG(2)NMF compared with the baseline methods in quantities.

关键词： k-NN graph Graph regularization Nonnegative matrix factorization Clustering

来源：评论

学校读者我要写书评

暂无评论

Hardware Support for Concurrent Detection of Multiple Concurrency Bugs on Fused CPU-GPU Architectures

引用

IEEE TRANSACTIONS ON COMPUTERS 2016年第10期65卷 3083-3095页

作者： Zhang, Weihua Yu, Shiqiang Wang, Haojun Dai, Zhuofang Chen, Haibo Fudan Univ Software Sch Shanghai Key Lab Data Sci Shanghai Peoples R China Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai 200030 Peoples R China

Detecting concurrency bugs, such as data race, atomicity violation and order violation, is a cumbersome task for programmers. This situation is further being exacerbated due to the increasing number of cores in a single machine and the prevalence of threaded programming models. Unfortunately, many existing software-based approaches usually incur high runtime overhead or accuracy loss, while most hardware-based proposals usually focus on a specific type of bugs and thus are inflexible to detect a variety of concurrency bugs. In this paper, we propose Hydra, an approach that leverages massive parallelism and programmability of fused CPU-GPU architectures to simultaneously detect multiple concurrency bugs in threaded software, including data race, atomicity violation and order violation. Hydra extends contemporary fused CPU and GPU by introducing two modules: 1) a trace collecting module (TCM) that instruments and collects program behavior on CPU;2) a trace preprocessing module (TPM) that processes and then transfers the traces to GPU for bug detection. Furthermore, Hydra exploits three optimizations to improve speed and accuracy, which includes: 1). using the bloom filter to filter out unnecessary traces;2). avoiding eviction of shared traces;3). comparing only last-write traces for shared data with the happens-before relation. Hydra incurs small hardware complexity and requires no changes to internal critical-path processor components such as cache and its coherence protocol, and is with about 1.1 percent hardware overhead under a 32-core configuration. Experimental results show that Hydra only introduces about 0.18 percent overhead on average for detecting one type of bugs and 0.46 percent overhead for simultaneously detecting multiple bugs, yet with the similar detectability of a heavyweight software bug detector (e.g., Helgrind).

关键词： Concurrency bug detection fused CPU-GPU architecture

来源：评论

学校读者我要写书评

暂无评论

An optimized design of CAN FD for automotive cyber-physical systems

引用

JOURNAL OF SYSTEMS ARCHITECTURE 2017年 81卷 101-111页

作者： Xie Yong Zeng Gang Kurachi, Ryo Xie Guoqi Dou Yong Zhou Zhili Xiamen Univ Technol Coll Comp & Informat Engn Xiamen Peoples R China Natl Univ Defens Technol Natl Lab Parallel & Distributed Proc Changsha Hunan Peoples R China Nagoya Univ Grad Sch Informat Sci Nagoya Aichi Japan Nagoya Univ Grad Sch Informat Sci Nagoya Aichi Japan Hunan Univ Coll Comp Sci & Elect Engn Changsha Hunan Peoples R China Nanjing Univ Informat Sci & Technol Sch Comp & Software Nanjing Jiangsu Peoples R China

CAN with flexible data rate (CAN FD) is considered the next generation in-vehicle network standard for automotive cyber-physical systems. CAN FD supports a data phase bit-rate of up to 10 Mbps and message payload of up to 64 bytes. However, the substantial differences regarding the allowed message payloads and the heterogeneity of the signal periods indicate the need for a systematic design method to fully utilize its large transmission bandwidth. We propose an optimized design method for CAN FD to minimize bandwidth utilization while meeting the signal timing constraint. First, two slack evaluation metrics are defined for the quantitative analysis of the potential packing choices. Based on these metrics, we propose a clustering-based signal packing algorithm, and the schedulability of the signals and the packed messages are both verified. The proposed method is compared with other design methods proposed for both CAN and CAN FD. The experimental results demonstrated that our method is the most bandwidth efficient and can meet the timing constraint simultaneously.

关键词： Automotive cyber-physical systems Bandwidth utilization CAN FD Design method Signal clustering Schedulability

来源：评论

学校读者我要写书评

暂无评论

A Loosely-Coupled Full-System Multicore Simulation Framework

引用

IEEE TRANSACTIONS ON parallel AND distributed SYSTEMS 2016年第6期27卷 1566-1578页

作者： Zhang, Weihua Wang, Haojun Lu, Yunping Chen, Haibo Zhao, Wenyun Fudan Univ Software Sch Shanghai 200433 Peoples R China Fudan Univ Shanghai Key Lab Data Sci Shanghai 200433 Peoples R China Fudan Univ Parallel Proc Inst Shanghai 200433 Peoples R China Fudan Univ Sch Comp Sci Shanghai 200433 Peoples R China Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai 200030 Peoples R China

Full-system simulation is critical in evaluating design alternatives for multicore processors. However, state-of-the-art multicore simulators either lack good extensibility due to their tightly-coupled design between functional model (FM) and timing model (TM), or cannot guarantee cycle-accuracy. This paper conducts a comprehensive study on factors affecting cycle-accuracy and uncovers several contributing factors less studied before. Based on these insights, we propose a loosely-coupled functional-driven full-system simulator for multicore, namely Transformer. To ensure extensibility and cycle-accuracy, Transformer leverages an architecture-independent interface between FM and TM and uses a lightweight scheme to detect and recover from execution divergence between FM and TM. Built upon Transformer and its foundational simulator components, a graduate student only needed to write about 180 lines of code to extend an X86 functional model (QEMU) in Transformer. Moreover, the loosely-coupled design also removes the complex interaction between FM and TM and opens the opportunity to parallelize FM and TM to improve performance. Experimental results show that Transformer achieves an average of 8.4 and 7.0 percent performance improvement over GEMS in 4-core and 8-core configuration while guaranteeing cycle-accuracy. A further parallelization between FM and TM leads to 35.3 and 29.7 percent performance improvement respectively.

关键词： Functional-driven multicore simulation full-system extension

来源：评论

学校读者我要写书评

暂无评论

High-performance Audio Matching with Features Learned by Convolutional Deep Belief Network 13

High-performance Audio Matching with Features Learned by Con...

引用

13th IEEE International Conference on Signal Processing (ICSP)

作者： Feng, Weijiang Guan, Naiyang Luo, Zhigang Natl Univ Def Technol Coll Comp Inst Software Changsha 410073 Hunan Peoples R China Natl Univ Def Technol Sci & Technol Parallel & Distributed Proc Lab Changsha 410073 Hunan Peoples R China

ISBN: (纸本)9781509013456

Audio matching automatically retrieves all excerpts that have the same content as the query audio clip from given audio recordings. The extracted feature is critical for audio matching and the Chroma Energy Normalized Statistics (CENS) feature is the state-of-the-arts. However, CENS might behave unsatisfactorily on some audio because it is a handcraft feature. In this paper, we propose to utilize the features learned by Convolutional Deep Belief Network (CDBN) to enhance the performance of audio matching. Benefit from the strong generalization ability of CDBN, our method works better than CENS based methods on most audio datasets. Since the features learned by CDBN are binary-valued, we can develop a more efficient audio matching algorithm by taking the advantage of this property. Experimental results on both TIMIT dataset and a simulated music dataset confirm effectiveness of the proposed CDBN based method comparing with the traditional CENS feature based algorithm.

关键词： audio matching convolutional deep belief network content-based audio retrieval

来源：评论

学校读者我要写书评

暂无评论

Performance Analysis of Multimedia Retrieval Workloads Running on Multicores

引用

IEEE TRANSACTIONS ON parallel AND distributed SYSTEMS 2016年第11期27卷 3323-3337页

作者： Lu, Yunping Wang, Xin Zhang, Weihua Chen, Haibo Peng, Lu Zhao, Wenyun Fudan Univ Shanghai Key Lab Data Sci Shanghai Peoples R China Fudan Univ Sch Comp Sci Shanghai Peoples R China Fudan Univ Parallel Proc Inst Shanghai Peoples R China Fudan Univ Software Sch Shanghai Peoples R China Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai Peoples R China Louisiana State Univ Div Elect & Comp Engn Baton Rouge LA 70803 USA

Multimedia data has become a major data type in the Big Data era. The explosive volume of such data and the increasing real-time requirement to retrieve useful information from it have put significant pressure in processing such data in a timely fashion. However, while prior efforts have done in-depth analysis on architectural characteristics of traditional multimedia processing and text-based retrieval algorithms, there has been no systematic study towards the emerging multimedia retrieval applications. This may impede the architecture design and system evaluation of these applications. In this paper, we make the first attempt to construct a multimedia retrieval benchmark suite (MMRBench for short) that can be used to evaluate architectures and system designs for multimedia retrieval applications. MMRBench covers modern multimedia retrieval algorithms with different versions (sequential, parallel and distributed). MMRBench also provides a series of flexible interfaces as well as certain automation tools. With such a flexible design, the algorithms in MMRBench can be used both in individual kernel-level evaluation and in integration to form a complete multimedia data retrieval infrastructure for full system evaluation. Furthermore, we use performance counters to analyze a set of architecture characteristics of multimedia retrieval algorithms in MMRBench, including the characteristics of core level, chip level and inter-chip level. The study shows that micro-architecture design in current processor is inefficient (both in performance and power) for these multimedia retrieval workloads, especially in core resources and memory systems. We then derive some insights into the architecture design and system evaluation for such multimedia retrieval algorithms.

关键词： Multimedia retrieval benchmarks architectural characteristics

来源：评论

学校读者我要写书评

暂无评论

parallelizing image feature extraction algorithms on multi-core platforms

引用

JOURNAL OF parallel AND distributed COMPUTING 2016年 92卷 1-14页

作者： Lu, Yunping Li, Yi Song, Bo Zhang, Weihua Chen, Haibo Peng, Lu Fudan Univ Software Sch Shanghai 200433 Peoples R China Fudan Univ Shanghai Key Lab Data Sci Shanghai 200433 Peoples R China Fudan Univ Parallel Proc Inst Shanghai 200433 Peoples R China Fudan Univ Sch Comp Sci Shanghai 200433 Peoples R China Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai 200030 Peoples R China Louisiana State Univ Div Elect & Comp Engn Baton Rouge LA 70803 USA

Currently, multimedia data has become one of the most important data types processed and transferred over the Internet. To extract useful information from a huge amount of such data, SIFT and SURF, as two most popular image feature extraction algorithms, have been widely used in many applications running on multi-core platforms. However, limited parallelism in existing designs makes it hard or impossible to apply them in many applications with real-time requirements. Therefore, it has become one of the major challenges to improve the processing speed of image feature extraction algorithms. In this paper, we first analyze the parallelism constraints in the algorithms, such as imbalanced workloads and indeterminate time distributions. Based on such analyses, we present an adaptive pipeline parallel scheme (AD-PIPE) to adjust the thread number in different stages according to their workloads dynamically, which achieves a balanced partition for constant input workloads. Furthermore, we also implement a power efficient version (AE-PIPE) for AD-PIPE through scheduling threads based on variable input workloads. Experimental results show that AD-PIPE achieves a speedup of 16.88X and 2033X respectively over SIFT and SURF on a 16-core machine. Moreover, AE-PIPE achieves up to 52.94% and 58.82% power saving with only 3% performance loss. (C) 2016 Elsevier Inc. All rights reserved.

关键词： Image feature extraction SIFT SURF Adaptive pipeline Multi-core

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：