A study of architecture for an 8-bit micropro-grammed microcomputer (MPM) is presented in this paper. The control memory of this microcomputer is implemented as a dynamic shift-register memory (SRM). It is shown that ...
详细信息
This paper considers the evolution of dynamicarchitectures for modular computer systems. It concludes that a new system building block called a dynamiccomputer group (DC group) may be used for constructing both a mu...
This paper considers the evolution of dynamicarchitectures for modular computer systems. It concludes that a new system building block called a dynamiccomputer group (DC group) may be used for constructing both a multicomputer system with dynamicarchitecture and a new type of pipeline called a dynamic pipeline system.
The basic principles of a dynamic resource assignment for an adaptable supercomputing system with dynamicarchitecture are presented. The main conditions of dynamic resource assignment are introduced, and a definition...
详细信息
ISBN:
(纸本)0818606541
The basic principles of a dynamic resource assignment for an adaptable supercomputing system with dynamicarchitecture are presented. The main conditions of dynamic resource assignment are introduced, and a definition is presented of the procedures for creation of new dynamic architectural states that allow the system reconfiguration flow chart to become restructurable, when it takes into account reconfiguration requests of static and dynamic programs.
For associative processing and relational data bases characterized by sequential memory search, it is convenient to store a sequence of data files in a content-addressable memory since it can perform two concurrent da...
详细信息
For associative processing and relational data bases characterized by sequential memory search, it is convenient to store a sequence of data files in a content-addressable memory since it can perform two concurrent data base operations at a time (search and update, search and delete, etc.) and the sequential nature of its operation is in conformity with the sequential nature of maintenance and update of data files. To take into account various communication delays introduced by the communication network in transferring updated words to the content-adressable memory assume that a sequence of data words contained in the same data file is stored with a shifting distance from one another, d ≥ 1, where the d integer is selectable by a programmer, and a pair of adjacent data words from the same file may have a constant or variable d. (A particular case, d = 1, means consecutive word storage.) In this paper, we discuss various memory allocation algorithms that allow formation of a multiprocessor system that incorporates several content-addressable memories and is designated for fast data base applications. All memory allocation schemes introduced in this paper are described by a Diophantine equation whose solution, x, shows the distance between any two processors that are not in conflict when they access the same content-addressable memory. The paper presents a technique for finding a maximal set of noninterfering processors and conflict-free allocation techniques for various structures of data files.
This paper describes a pipeline system with dynamicarchitecture that performs cost-effective adaptations to the algorithm being executed. The system performs the following pipeline adaptations: (1) the number of stag...
详细信息
ISBN:
(纸本)9781450379212
This paper describes a pipeline system with dynamicarchitecture that performs cost-effective adaptations to the algorithm being executed. The system performs the following pipeline adaptations: (1) the number of stages in the pipeline changed to allow each instruction to activate the number of stages that matches the number of operations it realizes; (2) the operation sequences in the pipeline modified to allow any sequence of operations to execute without reconfiguration and thus eliminate the time overhead caused by this reconfiguration; and (3) the operation time in each stage adjusted to the minimum required for that operation because it may shorten the time of the total operation. This paper also discusses fast and flexible information exchanges between pipeline stages that can be done while the pipeline is working. Namely, each pipeline stage Ci may obtain during pipeline computations a temporary result that was computed by any other stage Cj. It is shown that such a pipeline may be organized from DC groups and thus be amenable to LSI implementation.
This paper discusses fault-tolerant reconfigurations of a multicomputer network organized as a binary tree. The paper shows how to reconfigure a binary tree with faulty nonleaves with lost connectivity into a binary t...
详细信息
ISBN:
(纸本)0882830392
This paper discusses fault-tolerant reconfigurations of a multicomputer network organized as a binary tree. The paper shows how to reconfigure a binary tree with faulty nonleaves with lost connectivity into a binary tree in which all faulty nodes become leaves or form more complex end-tree structures of higher *** both cases the faulty nodes are disconnected from a reconfigured fault-tolerant tree, which continues to function as a gracefully degraded tree made completely out of fault-free *** reconfiguration techniques developed are based on fine mathematical ideas of shift-register theory; they can be performed with only a single reconfiguration code (called a bias) that is sent concurrently to all fault-free nodes of a *** techniques for finding this reconfiguration code are also very simple. For the case in which all faulty nodes become leaves, the required reconfiguration code can be found during the time of one mod-2 addition (one clock period). For the case in which all faulty nodes form an i-dimensional end-tree, the necessary reconfiguration code can be found following a simple process that includes (i-1) mod-2 additions performed *** the reconfiguration code is found, it is sent to all fault-free nodes of a binary tree. A fault-tolerant reconfiguration into a gracefully degraded tree with disconnected faulty nodes can be performed during the time of one clock period, since it includes the time of a one-bit shift and mod-2 addition.
For associative processing and databases characterized by sequential memory search, it is convenient to store a sequence of data files in a circulating memory since it is inexpensive and suitable for implementing sequ...
详细信息
ISBN:
(纸本)0882830392
For associative processing and databases characterized by sequential memory search, it is convenient to store a sequence of data files in a circulating memory since it is inexpensive and suitable for implementing sequential memory search algorithms. In this paper we discuss various allocation algorithms that allow g circulating memories to serve T processors, where g and T are selectable by *** allocation schemes introduced in this paper are described by a Diophantine equation whose solution, x, shows the distance between any two processors that are not in conflict when they access the same circulating memory. The paper presents a technique for finding a maximal set of noninterfering processors and conflict-free allocation techniques for various structures of data files. These techniques achieve very high performance characteristics, since1. They allow the entire memory space of a circulating memory either to be completely filled with data files or to be filled with minimal memory overhead created to exclude interference between any pair of noninterfering processors.2. All the memory allocations developed are conflict-free.3. During one memory revolution, the entire content of each circulating memory can be completely fetched by a set of noninterfering processors.
Several areas of science and technology offer a number of problems which solutions require an enormous computational power. For instance, partial differential equations in computational aerodynamics, real-time radar s...
详细信息
暂无评论