Wearable devices have transformed from novelties into indispensable companions for millions, finding applications in health and wellness, empowering individuals to proactively manage their well-being. Among these, pul...
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This article presents a chip designed for wireless intra-cardiac monitoring systems. The design consists of a three-channel analog front-end, a pulse-width modulator featuring output-frequency offset and temperature c...
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This paper presents an analog RF-domain implementation of a Vanilla Recurrent Neural Network (RNN) for real-time anomaly detection in 5G and beyond wireless networks. Real-time analysis is crucial to distinguish benig...
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ISBN:
(数字)9798350356830
ISBN:
(纸本)9798350356847
This paper presents an analog RF-domain implementation of a Vanilla Recurrent Neural Network (RNN) for real-time anomaly detection in 5G and beyond wireless networks. Real-time analysis is crucial to distinguish benign irregularities from true anomalies that may indicate malicious activity or network issues. The proposed design leverages passive components, such as switches and capacitors, enabling low-latency processing directly at RF frequencies. Circuit simulations validate the approach, achieving up to 89% accuracy across three anomaly classes, demonstrating the potential of RF-domain neural networks for fast and efficient wireless signal analysis.
Post-layout simulation provides accurate guidance for analog circuit design, but post-layout performance is hard to be directly optimized at early design stages. Prior work on analog circuit sizing often utilizes pre-...
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Post-layout simulation provides accurate guidance for analog circuit design, but post-layout performance is hard to be directly optimized at early design stages. Prior work on analog circuit sizing often utilizes pre-layout simulation results as the optimization objective. In this work, we propose a post-layoutsimulation-driven(post-simulation-driven for short) analog circuit sizing framework that directly optimizes the post-layout simulation performance. The framework integrates automated layout generation into the optimization loop of transistor sizing and leverages a coupled Bayesian optimization algorithm to search for the best post-simulation performance. Experimental results demonstrate that our framework can achieve over 20% better post-layout performance in competitive time than manual design and the method that only considers pre-layout optimization.
The proposed two-stage ensemble machine learning model aims to bridge the gap between energy harvesting and vibration sensing applications for lead zirconate titanate (PZT) and similar piezoceramic materials by enabli...
The proposed two-stage ensemble machine learning model aims to bridge the gap between energy harvesting and vibration sensing applications for lead zirconate titanate (PZT) and similar piezoceramic materials by enabling one device to perform both functions simultaneously. Two PZT cantilever configurations were tested: one without a tip mass for maximum linearity at low frequencies and one with a tip mass for maximum energy output. The highest absolute prediction error on the testing set is 19% and 7%, respectively. While the R2 score remained nearly 1, the PZT cantilever with the tip mass showed an 11% lower mean absolute error (MAE) and 38% lower mean squared error (MSE) compared to the PZT without, suggesting that PZT cantilevers in energy harvesting configurations can be used to predict acceleration with acceptable accuracy.
Spectrum sensing is a pivotal function in next-generation (G) Multiple-Input-Multiple-Output (MIMO) communication systems, tasked with detecting and characterizing the occupancy or availability of frequency bands with...
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Spectrum sensing is a pivotal function in next-generation (G) Multiple-Input-Multiple-Output (MIMO) communication systems, tasked with detecting and characterizing the occupancy or availability of frequency bands within the radio spectrum. Conventional spectrum sensing techniques are hindered by challenges such as hardware complexity and the Signal-to-Noise Ratio (SNR) wall, leading to suboptimal performance in environments with high noise levels. Recurrent Neural Networks (RNNs), particularly Liquid State Machines (LSMs), are highly effective for developing energy-efficient accelerators, as they efficiently capture temporal dependencies in primary user frequency spectrums with a reduced number of trainable parameters. This paper introduces an innovative FPGA accelerator based on Liquid State Machines (LSMs), featuring fully integrated on-chip learning capabilities for spectrum sensing. Our accelerator leverages Reward-based Spike Timing-Dependent Plasticity (R-STDP) to discern temporal correlations within the related frequency band. Although traditional R-STDP methods face convergence difficulties during on-chip learning, the introduced approach overcomes this challenge with a novel, hardware-efficient loss function. This mechanism which is also hardware friendly, facilitates accelerated convergence with reduction of training period of about 46.67% in spectrum sensing classification for hardware implementation. Moreover, we implemented a fully asynchronous, low-latency, unsupervised Triplet-based STDP learning mechanism in the LSM accelerator reservoir, which improves training accuracy by about 3.88% in high-noise channels while enhancing reconfigurability. Furthermore, we investigated various encoder mechanisms to identify the most efficient encoder architecture for our LSM, leading to an accuracy increase of 6.11%. Our optimized LSM architecture achieved 1.27 times and 2.01 times the LUT and register counts, respectively, compared to the basic fixed-reservoir LSM
As an important component of the space-air-ground integrated network, aerial base station (AeBS) systems have gained significant attention for their flexibility in mobility and cost-effective construction. Nevertheles...
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Home hand rehabilitation for stroke is becoming increasingly important due to logistic and financial challenges. Developing Daily-life integrated Hand-rehabilitation Products (DIHP) aims to enable the application of a...
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This paper presents a low-power and low-complexity direct digital-to-RF transmitter architecture, suitable for biosensing applications. The RF front end of the transmitter is based on a ring oscillator, whose output p...
This paper presents a low-power and low-complexity direct digital-to-RF transmitter architecture, suitable for biosensing applications. The RF front end of the transmitter is based on a ring oscillator, whose output phase is modulated through the charge-to-phase mechanism using a charge injection block. Hence, the phase shift keying (PSK) modulation can be performed directly in the RF domain. Post-layout simulation results show that the transmitter is able to collect, process, and transmit sensed data with the maximum data rate of 20 Mbps and an error vector magnitude (EVM) of smaller than 3.5%, while dissipating the DC power smaller than 0.5 mW. The results demonstrate that the proposed transmitter architecture is effective for wireless biosensing applications.
This paper presents a powerline energy harvesting circuit to power wireless sensor nodes for powerline safety monitoring. The magnetic harvester is a ring-shaped nano-crystalline magnetic core, which transforms the ac...
This paper presents a powerline energy harvesting circuit to power wireless sensor nodes for powerline safety monitoring. The magnetic harvester is a ring-shaped nano-crystalline magnetic core, which transforms the ac powerline current to ac voltage. The major building blocks of the circuit are a buck-boost converter operating in discontinuous conduction mode (DCM) and a microcontroller unit (MCU) for maximum power point tracking (MPPT). The MPPT algorithm based on the perturb and observe senses the current flowing into the load and adjusts the duty cycle of the buck-boost converter to match the source impedance. The magnetic core delivers 6.98 W to an optimal $200\ \Omega$ resistor directly attached to the core under the powerline current of 30 A. The output power of the proposed circuit is 4.86 W with the optimal load resistance of $R_{L}=250\ \Omega$ , resulting in the conversion efficiency of 70%.
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