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A design methodology for miniaturized 3-dB branch-line hybrid couplers using distributed capacitors printed in the inner area

A design methodology for miniaturized 3-dB branch-line hybri...

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作者： Jung, Sung-Chan Negra, Renato Ghannouchi, Fadhel M. Microwave Circuits and Systems Laboratory School of Information and Communication Engineering Sungkyunkwan University Suwon 440-746 Korea Republic of Mixed Signal CMOS Circuits Group RWTH Aachen University Aachen 52056 Germany IRadio Laboratory Electrical and Computer Engineering Department University of Calgary Calgary AB T2N 1N4 Canada

This paper proposes a methodology to design and optimize the footprint of miniaturized 3-dB branch-line hybrid couplers, which consists of high-impedance transmission lines and distributed capacitors. To minimize the physical size of the coupler, the distributed capacitors are placed within the empty space of the hybrid. The proposed design methodology calls for the joint optimization of the length of the reduced high-impedance transmission lines and the area of the distributed capacitors. A prototype at S-band was designed and built to validate the approach. It showed a size reduction by 62% compared with the conventional 3-dB branch-line hybrid coupler while providing similar performance and bandwidth. © 2006 IEEE.

关键词： Electric lines

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Sensor diagnostics for autonomous digital structural health monitoring systems

Sensor diagnostics for autonomous digital structural health ...

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26th Conference and Exposition on Structural Dynamics 2008, IMAC-XXVI

作者： Grisso, Benjamin L. Kim, Jina Ha, Dong S. Inman, Daniel J. Center for Intelligent Material Systems and Structures Virginia Polytechnic Institute State University Blacksburg VA 24061 United States Virginia Tech. VLSI for Telecommunications Laboratory Department of Electrical and Computer Engineering Virginia Polytechnic Institute Blacksburg VA 24061-0111 United States

ISBN: (纸本)9781605600666

Previously, hardware has been developed for the impedance-based structural health monitoring technique. This low power health monitoring prototype utilizes a digital signal processor evaluation board to implement a damage detection algorithm. Digital rectangular pulse trains are utilized to excite the structure, and structural response is measured via a digital signal representation. As this scheme for observing structural damage is different from standard impedance measurement methods, the procedure of performing sensor diagnostics will also need to be altered. The research presented in this paper will document efforts to adapt sensor diagnostics for the impedance method to a digital format. Experiments will be used to verify the new sensor diagnostics algorithm, and sensor degradation will be compared with structural deformities.

关键词： Digital signal processors

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electrical Modeling of Piezoelectric Ceramics for Analysis and Evaluation of Sensory systems

Electrical Modeling of Piezoelectric Ceramics for Analysis a...

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3rd IEEE Sensors Applications Symposium (SAS 2008)

作者： Jina Kim Benjamin L. Grisso Jeong K. Kim Dong Sam Ha Daniel J. Inman Department of Electrical and Computer Engineering Virginia Technology VLSI for Telecommunications Laboratory Blacksburg VA USA Department of Mechanical Engineering Virginia Tech Center for Intelligent Material Systems and Structures Blacksburg VA USA

Piezoelectricity is an ability of some materials to generate an electric potential in response to applied mechanical stress. Piezoelectric ceramics are often used for sensory systems to monitor mechanical characteristics of structures through an electrical signal. Thus, to support system level analysis and evaluation of sensory systems, understanding and estimating the electrical behavior of piezoelectric ceramics with a minimum effort is valuable. This paper proposes an equivalent circuit model for piezoelectric ceramics, with a PZT patch as the specimen. The proposed model approximates the electrical behavior of piezoelectric ceramics with up to 100% accuracy for unloaded and 93% accuracy for loaded PZT, and provides a modeling procedure that can easily be automated.

关键词： Equivalent circuits Modeling Piezoelectric materials PZT ceramics

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A 1V, 1mW, 4GHz Injection-Locked Oscillator for High-Performance Clocking

A 1V, 1mW, 4GHz Injection-Locked Oscillator for High-Perform...

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Custom Integrated circuits Conference (CICC)

作者： Lin Zhang Berkehan Ciftcioglu Hui Wu Laboratory for Advanced Integrated Circuits and Systems Department of Electrical and Computer Engineering University of Rochester Rochester NY USA

Injection-locked clocking (ILC) has been proposed previously to improve the skew and jitter performance while reducing the power consumption in multi-gigahertz clock distribution networks. This paper presents a new design of the injection-locked oscillator (ILO) suitable for ILC applications. It uses a transformer to generate differential signals and then directly inject them into the ILO core. It also incorporates a switched-capacitor array for frequency tuning and hence digital deskew in ILC. A 4 GHz test chip was designed and fabricated in a 0.18 mum standard digital CMOS. It consists of four ILOs driven by a balanced H-tree. Each ILO consumes less than 1 mW from a 1 V power supply. 5-bit digital deskew achieves 55 ps delay tuning range and 1.8 ps resolution. Measurement shows that only 30 fs cycle-to-cycle jitter degradation was introduced and no phase noise degradation at frequency offset up to 600 kHz.

关键词： Injection-locked oscillators Clocks Jitter Frequency Tuning Degradation Energy consumption Signal generators Transformer cores Testing

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Analysis of DC-DC Conversion for Energy Harvesting systems Using a Mixed-Signal Sliding-Mode Controller

Analysis of DC-DC Conversion for Energy Harvesting Systems U...

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Annual IEEE Conference on Power Electronics Specialists (PESC)

作者： Nathaniel J. Guilar Rajeevan Amirtharajah Paul Hurst University of California Center Sacramento Sacramento CA US Micropower Circuits and Systems Group Department of Electrical and Computer Engineering University of California Davis CA USA Solid-State Research Laboratory Department of Electrical and Computer Engineering University of California Davis CA USA

Increasing efficiencies in electronic devices have opened the door for energy harvesters to power wireless systems by scavenging energy from solar, thermal, or mechanical sources. The design of an efficient power supply that can regulate scavenged energy to produce stable voltages for multiple loads is presented here. To limit energy dissipation and increase the flexibility of the regulator, a discrete-time sliding-mode controller is presented. The performance of sliding-mode controllers is hard to predict because their switching frequency and output voltage ripple are dependent on duty cycle and load conditions. An analytical approach for the closed-loop steady- state behavior of a discrete-time sliding-mode controller is presented here. The proposed analytical solution matches measured results to within 4% for duty cycles ranging between 0.1 and 0.9.

关键词： Sliding mode control Control systems Regulators Finite impulse response filter Voltage Pulse width modulation Samarium Power supplies circuits Passive filters

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An All-Digital Low-Power Structural Health Monitoring System

An All-Digital Low-Power Structural Health Monitoring System

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IEEE Conference on Technologies for Homeland Security

作者： Jina Kim Benjamin L. Grisso Dong S. Ha Daniel J. Inman Department of Electrical and Computer Engineering Virginia Tech Virginia Technology VLSI for Telecommunications Laboratory Blacksburg VA USA Department of Mechanical Engineering Virginia Tech Center for Intelligent Material Systems and Structures Blacksburg VA USA

Structural health monitoring is desirable in many fields to provide a means of damage detection on a variety of structures. Unfortunately, the ability to equip structures with health monitoring systems is limited by the development of adequate hardware. Previously, prototypes using the impedance-based health monitoring method have been developed to lay a foundation for permanent structural damage detection. These prototypes served their purposes, but has shortcomings such that large size and high power consumption. In this paper, all-digital excitation and sensing techniques are developed to reduce both the size and power dissipation. The digital techniques are implemented onto a new prototype, which achieves substantial reduction in size and power consumption. Validation of the new hardware on a representative structure is presented and compared with traditional techniques for structural health monitoring.

关键词： Frequency conversion Hardware Power dissipation Voltage Signal generators Prototypes Impedance measurement Frequency measurement computerized monitoring Energy consumption

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Distributed amplifiers with non-uniform filtering structures

Distributed amplifiers with non-uniform filtering structures

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2006 IEEE Radio Frequency Integrated circuits Symposium

作者： Yunliang, Zhu Hui, Wu Laboratory for Advanced Integrated Circuits and Systems Department of Electrical and Computer Engineering University of Rochester Rochester NY

ISBN: (纸本)0780395727

This paper presents a new design concept to better control both passband and stop-band characteristics of distributed amplifiers (DAs) by using non-uniform filtering structures instead of conventional constant-k sections. Two circuit prototypes with Butterworth and Chebyshev filtering were designed using network synthesis method, and implemented in a 0.18μm digital CMOS technology. The Butterworth prototype achieved 11.7dB gain, 9GHz bandwidth, and -5dB/GHz roll-off. The Chebyshev one achieved 10dB gain, 8.5GHz bandwidth and -8dB/GHz roll-off.

关键词： Amplifiers (electronic)

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A new structure for capacitor-mismatch-insentive multiply-by-two amplification

A new structure for capacitor-mismatch-insentive multiply-by...

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ISCAS 2006: 2006 IEEE International Symposium on circuits and systems

作者： Zare-Hoseini, Hashem Shoaei, Omid Kale, Izzet Applied DSP and VLSI Research Group Department of Electronic Systems University of Westminster London Applied DSP and VLSI Research Centre Eastern Mediterranean University KKTC Mersin 10 Gazimagusa IC Design Laboratory Electrical and Computer Engineering Department University of Tehran Tehran Iran

ISBN: (纸本)0780393902

A new approach to achieve a switched-capacitor multiply-by-two gain-stage with reduced sensitivity to capacitors' mismatches is presented in this paper. It is based on sampling fully differential input signals onto both plates of the input capacitors rather than sampling onto one plate of the capacitors with the other tied to a reference. It uses one operational amplifier (op-amp) in two phases to produce the gain of two (×2). Comparing to the conventional multiply-bytwo gain-stage, the mismatches between the capacitors has a much smaller influence on the accuracy of the gain of two (×2). Analytical and circuit-level analysis of the architecture and the conventional structure are presented using a generic 0.35μm CMOS technology. © 2006 IEEE.

关键词： Capacitors

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A double-balanced injection-locked frequency divider for tunable dual-phase signal generation

A double-balanced injection-locked frequency divider for tun...

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IEEE Symposium on Radio Frequency Integrated circuits (RFIC)

作者： Lin Zhang Hui Wu Laboratory for Advanced Integrated Circuits and Systems Department of Electrical and Computer Engineering University of Rochester Rochester NY USA Laboratory for Advanced Integrated Circuits and Systems Department of Electrical and Computer Engineerin University of Rochester Rochester NY USA

We present an injection-locked divider (ILFD) with a double-balanced structure to generate two signals with tunable phase difference. A circuit prototype was designed and fabricated using a standard 0.18mum digital CMOS technology, and generates dual-phase signals at 4.8-6 GHz. The phase difference of the two output signals can be tuned independently by 55deg, and differentially by 100deg, both centered around quadrature (90deg). The phase noise degradation is negligible

关键词： Frequency conversion Signal generators Tunable circuits and devices Phase noise Energy consumption CMOS technology Degradation Injection-locked oscillators Phased arrays Laboratories

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Using simulation and satisfiability to compute flexibilities in Boolean networks

Using simulation and satisfiability to compute flexibilities...

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作者： Mishchenko, Alan Zhang, Jin S. Sinha, Subarna Burch, Jerry R. Brayton, Robert Chrzanowska-Jeske, Malgorzata IEEE Department of Electrical Engineering and Computer Sciences University of California Berkeley CA 94720 United States Department of Electrical and Computer Engineering Portland State University Portland OR 97207 United States Synopsys Inc. Mountain View CA 94043 United States Synopsys Inc. Hillsboro OR 97124 United States University of California Berkeley Advanced Technology Group Synopsys Inc. Mountain View CA Advanced Technology Group Synopsys Inc. Hillsboro OR Department of Electrical Engineering National Academy of Engineering AAAS Department of Electrical and Computer Engineering Portland State University Portland OR ACM Eta Kappa Nu VLSI Systems and Applications Nanoelectronics and Gigascale Systems Technical Committees IEEE Circuits and Systems Society

Simulation and Boolean satisfiability (SAT) checking are common techniques used in logic verification. This paper shows how simulation and satisfiability (S&S) can be tightly integrated to efficiently compute flexibilities in a multilevel Boolean network, including the following: 1) complete "don't cares" (CDCs);2) sets of pairs of functions to be distinguished (SPFDs);and 3) sets of candidate nodes for resubstitution. These flexibilities can be used in network optimization to change the network structure while preserving its functionality. In the first two applications, simulation quickly enumerates most of the solutions while SAT detects the remaining solutions. In the last application, simulation efficiently filters out most of the infeasible solutions while SAT checks the remaining candidates. The experimental results confirm that the combination of simulation and SAT offers a computation engine that outperforms binary decision diagrams, which are traditionally used in such applications. © 2006 IEEE.

关键词： Boolean algebra

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