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Analysis on the effectiveness of the 20-H rule using numerical simulation technique

Analysis on the effectiveness of the 20-H rule using numeric...

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IEEE International Symposium on Electromagnetic Compatibility (EMC)

作者： Er-Ping Li Wei-Liang Yuan Jiang Yi Le-Wei Li M.I. Montrose EMC Division Institute of High Performance Computing Singapore Temasek Lab National University of Singapore Singapore Department of Electrical and Computer Engineering National University of Singapore Singapore Montrose Compliance Services Inc. Santa Clara CA USA

With increasing demand for higher operating frequencies, printed circuit board (PCB) designers are faced with numerous obstacles during the design cycle. The 20-H rule is one layout technique that is recommended to minimize radiated fields propagating from the edges of a PCB. These fields, either magnetic or electric, may corrupt adjacent cable assemblies, sheet metal enclosures and aperture openings. The magnitude of this design rule is investigated herein using the numerical electromagnetic simulation method, finite difference time domain (FDTD). In addition, an analysis on whether benefits exist from use of the 20-H rule is examined. The significance to the field of EMC lies in presenting, for the first time, an exhaustive analysis that took over one year to achieve using various configurations and frequencies. A rigorous analysis indicates that benefits do occur from use of the 20-H rule, but only when implemented in certain applications.

关键词： Numerical simulation Frequency Finite difference methods Printed circuits Electromagnetic propagation Magnetic domains Assembly Apertures Electromagnetic radiation Time domain analysis

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A new technique based on genetic algorithms for tracking of power system harmonics

A new technique based on genetic algorithms for tracking of ...

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Brazilian Symposium on Neural Networks

作者： R.A. Macedo D. da Silva D.V. Coury A.C.P.L.F. de Carvalho Electrical Engineering Department São Carlos Engineering School University of São São Carlos SP Brazil Electr. Power Syst. Lab. Univ. of Sao Paulo Sao Carlos Brazil Computing Intelligence Laboratory Institute of Mathematics Sciences and Computer São Carlos SP Brazil

Voltage and current waveforms of a distribution or a transmission system are not pure sinusoids. There are distortions in these waveforms that consist of a combination of the fundamental frequency, harmonics and high frequency transients. This work presents an approach of a harmonic identification method for distorted waveforms in electric power systems. The proposed method is based on the genetic algorithm, which is a technique for optimization inspired by genetics and natural evolution. The proposed algorithm was tested with simulated data. The effect of the size of the initial population, the crossover rate and the mutation rate were studied. The results demonstrate that the method presented is precise when compared with the traditional Fourier transform.

关键词： Genetic algorithms Power system harmonics Harmonic distortion Frequency Voltage Power system transients Optimization methods Testing Power system simulation Genetic mutations

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Simulation of hardware support for OpenGL graphics architecture 1

Simulation of hardware support for OpenGL graphics architect...

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1st International Conference on Information Technology: Coding and computing, ITCC 2000

作者： Paltashev, T. Govind, N. Abla, G. Department of Electrical and Computer Engineering SD School of Mines and Technology United States Intel Corporation Computing Enhancement Architecture Lab. United States

ISBN: (纸本)0769505406

The growing number of applications for 3D graphics and imaging systems in the mass market requires the customized approach to the design of high-performance 3D graphics and imaging system architectures. That fact coupled with the strong trends to industrial standardization of graphics API, such as OpenGL, leads to enhanced portability for imaging and graphics applications. The progress on the hardware support of API functionality gives a real possibility to use a top-down approach in the design of custom graphics/imaging systems based on the mixed hardware/software implementation of the OpenGL architecture. Software simulation is a relatively cheap and fast way for initial graphics architecture template development and evaluation to acquire the structure and parameters that can be used later for HDL elaboration and simulation. This paper discusses a 3D graphics and imaging system architecture model implementation based on OpenGL API hardware support simulation. The object-oriented approach has been used for this development of analytic and software models simulating hardware units on different stages of the graphics pipeline. The Interactive Imaging System Architecture Composer has been developed in this project for fast run-time simulation management, data acquisition and interpretation. The expandable set of architecture templates uses a reconfigurable shared library of "virtual hardware units" simulating the different hardware structures for graphics and image processing. © 2000 IEEE.

关键词： Imaging systems

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Pose invariant face recognition

Pose invariant face recognition

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4th IEEE International Conference on Automatic Face and Gesture Recognition, FG 2000

作者： Huang, Fu Jie Zhou, Zhihua Zhang, Hong-Jiang Chen, Tsuhan Electrical and Computer Engineering Department Carnegie Mellon University United States State Key Lab for Novel Software Technology Nanjing University China Media Computing Group Microsoft Research China

ISBN: (纸本)0769505805

In this paper, we describe a novel neural network architecture, which can recognize human faces with any view in a certain viewing angle range (fromy left 30 degrees to right 30 degrees out of plane rotation). View-specific eigenface analysis is used as the frontend of the system to extract features, and the neural network ensemble is used for recognition. Experimental results show that the recognition accuracy of our network ensemble is higher than conventional methods such as using a single neural network to recognize faces of a specific view. © 2000 IEEE.

关键词： Neural networks

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Path planning for mobile robots using a video camera network

Path planning for mobile robots using a video camera network

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IEEE/ASME (AIM) International Conference on Advanced Intelligent Mechatronics

作者： A. Hoover B.D. Olsen Electrical and Computer Engineering Department Visual Computing Lab University of California San Diego La Jolla CA USA Department of Medical Inform. & Image Analysis Laboratory of Image Analysis University of Aalborg Denmark

We describe a novel method to plan paths for mobile robots in an environment observed by a network of video cameras. The multiple video streams are fused to generate a spatial-temporal map of freespace. Updated at 5 Hz, this map concurrently locates both static and dynamic obstacles. Our novel method computes a polynomial-shaped path from current position to goal position for each map update (at 5 Hz), thus accomplishing both path planning and dynamic obstacle avoidance simultaneously. We demonstrate our methods operating in several dynamic scenarios, and compare our methods against paths planned using a numeric potential field.

关键词： Path planning Mobile robots Robot vision systems Cameras Robotics and automation Robot sensing systems computer vision computer networks Polynomials Mechanical sensors

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A real-time occupancy map from multiple video streams

A real-time occupancy map from multiple video streams

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IEEE International Conference on Robotics and Automation (ICRA)

We describe an algorithm to fuse intensity data from multiple video cameras to create a spatial-temporal occupancy map. The camera layout is assumed to resemble a security video network. The occupancy map is a two-dimensional raster image, uniformly distributed in the floor-plane. Each map pixel contains a binary value, signifying whether the designated floorspace is empty or occupied. Our algorithm requires only one difference and one look-up table operation to determine each pixel's effect upon the map. This brevity of operations allows the spatial occupancy map to be temporally computed at real-time video rates. We demonstrate our algorithm operating in several dynamic scenarios.

关键词： Streaming media Cameras Signal processing algorithms Fuses Data security Table lookup Image analysis Image processing Biomedical imaging laboratories

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Scalable hardware-algorithms for Binary prefix sums 13th

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13th International Parallel Processing Symposium, IPPS 1999 Held in Conjunction with the 10th Symposium on Parallel and Distributed Processing, SPDP 1999

作者： Lin, R. Nakano, K. Olariu, S. Pinotti, M.C. Schwing, J.L. Zomaya, A.Y. Department of Computer Science SUNY Geneseo GeneseoNY14454 United States Department of Electrical and Computer Engineering Nagoya Institute of Technology Showa-ku Nagoya466-8555 Japan Department of Computer Science Old Dominion University NorfolkVA23529 United States I.E.I C.N.R Pisa Italy Department of Computer Science Central Washington University EllensburgWA98926 United States Parallel Computing Research Lab Dept of Electrical and Electronic Eng University of Western Australia Perth Australia

ISBN: (纸本)3540658319

The main contribution of this work is to propose a number of broadcast efficient VLSI architectures for computing the sum and the prefix sums of a wk-bit, k ≥ 2, binary sequence using, as basic building blocks, linear arrays of at most w2 shift switches. An immediate consequence of this feature is that in our designs broadcasts are limited to buses of length at most w2 making them eminently practical. Using our design, the sum of a wk-bit binary sequence can be obtained in the time of2k-2 broadcasts, using 2wk−2 + O(wk−3) blocks, while the corresponding prefix sums can be computed in 3k-4 broadcasts using (k + 2)Wk−2 + O(kwk−3) blocks. © Springer-Verlag Berlin Heidelberg 1999.

关键词： Binary sequences

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A scalable VLSI architecture for binary prefix sums

A scalable VLSI architecture for binary prefix sums

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International Symposium on Parallel Processing

作者： R. Lin K. Nakano S. Olariu M.C. Pinotti J.L. Schwing A.Y. Zomaya Department of Computer Science SUNY Geneseo Geneseo NY USA Department of Electrical and Computer Engineering Nagoya Institute of Technology Nagoya Japan Department of Computer Science Old Dominion University Norfolk VA USA Parallel Computing Research Lab Department of Electrical and ElectronicEng University of Western Australia Perth Australia

The task of computing binary prefix sums (BPS, for short) arises, for example, in expression evaluation, data and storage compaction, and routing. The paper describes a scalable VLSI architecture for the BPS problem. The authors adopt as the central theme of this effort, the recognition of the fact that the broadcast delay incurred by a signal propagating along a bus is, at best, linear in the distance traversed. Thus, one of the design criteria is to keep buses as short as possible. In this context, the main contribution is to show that one can use short buses in conjunction with shift switching to obtain a scalable VLSI architecture for the BPS problem.

关键词： Very large scale integration Switches Broadcasting Parallel processing computer architecture Propagation delay Communication switching computer science USA Councils Registers

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Scalable video coding using H.263

Scalable video coding using H.263

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Canadian Conference on electrical and computer engineering (CCECE)

作者： Yuen-Pang Ko S. Panchanathan Visual Computing and Communications Laboratory VCCL Department of Electrical and Computer Engineering University of Ottawa Ottawa ONT Canada Visual Computing and Communications Laboratory VCCLDepartment of Electrical and Computer Engineering University of Ottawa Ottawa ONT Canada

Scalable video compression is very useful for multimedia communications and other applications such as video browsing and interactive TV. In this paper, we have proposed a scalable algorithm for the H.263 coder which makes possible the generation of a multiple rate video stream from a single compressed H.263 video stream. The proposed algorithm has comparable performance at lower bit rates and a superior performance at higher bit rates.

关键词： Video coding Video compression Bit rate Videoconference Scalability Streaming media Transform coding Discrete cosine transforms Multimedia communication TV

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User-interface for relative performance evaluation of compression techniques

User-interface for relative performance evaluation of compre...

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Canadian Conference on electrical and computer engineering (CCECE)

作者： S. Padhy O. Hage S. Panchanathan Visual Computing and Communications Laboratory Department of Electrical and Computer Engineering University of Ottawa Ottawa ONT Canada

Several techniques for video compression have appeared in literature namely JPEG, MPEG, H.263, wavelet, vector quantization, sub-bands, etc. In this paper, we present a user interface design which allows subjective comparison by simultaneous display of the encoded sequences (along with the original) at a variety of compression ratios in a synchronized manner. The proposed interface is extremely useful for relative performance evaluation of various compression techniques and can be easily extended to incorporate evaluation of new compression techniques.

关键词： Image coding Transform coding Video compression Redundancy Signal to noise ratio Discrete cosine transforms Decoding Vector quantization User interfaces PSNR

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