A great challenge for web site designers is how to ensure users' easy access to important web pages efficiently. In this paper we present a clustering-based approach to address this problem. Our approach to this c...
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This paper presents a practical knowledge discovery approach to software quality and resource allocation that incorporated recent advances in rough set theory, parameterized approximation spaces and rough neural compu...
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This paper presents a practical knowledge discovery approach to software quality and resource allocation that incorporated recent advances in rough set theory, parameterized approximation spaces and rough neural computing. In addition, this research utilizes the results of recent studies of software quality measurement and prediction. A software quality measure quantifies the extent, to which some specific attribute is present in a system. Such measurements are considered in the context of rough sets. This research provides a framework for making resource allocation decisions based on evaluation of various measurements of the complexity of software. Knowledge about software quality is gained when preprocessing during which, software measurements are analyzed using discretization techniques, genetic algorithms in deriving reducts, and in the derivation of training and testing sets, especially in the context of the rough sets exploration system (RSES) developed by the logic group at the Institute of Mathematics at Warsaw University. Experiments show that both RSES and rough neural network models are effective in classifying software modules.
With increasing demand for higher operating frequencies, printed circuit board (PCB) designers are faced with numerous obstacles during the design cycle. The 20-H rule is one layout technique that is recommended to mi...
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With increasing demand for higher operating frequencies, printed circuit board (PCB) designers are faced with numerous obstacles during the design cycle. The 20-H rule is one layout technique that is recommended to minimize radiated fields propagating from the edges of a PCB. These fields, either magnetic or electric, may corrupt adjacent cable assemblies, sheet metal enclosures and aperture openings. The magnitude of this design rule is investigated herein using the numerical electromagnetic simulation method, finite difference time domain (FDTD). In addition, an analysis on whether benefits exist from use of the 20-H rule is examined. The significance to the field of EMC lies in presenting, for the first time, an exhaustive analysis that took over one year to achieve using various configurations and frequencies. A rigorous analysis indicates that benefits do occur from use of the 20-H rule, but only when implemented in certain applications.
Voltage and current waveforms of a distribution or a transmission system are not pure sinusoids. There are distortions in these waveforms that consist of a combination of the fundamental frequency, harmonics and high ...
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Voltage and current waveforms of a distribution or a transmission system are not pure sinusoids. There are distortions in these waveforms that consist of a combination of the fundamental frequency, harmonics and high frequency transients. This work presents an approach of a harmonic identification method for distorted waveforms in electric power systems. The proposed method is based on the genetic algorithm, which is a technique for optimization inspired by genetics and natural evolution. The proposed algorithm was tested with simulated data. The effect of the size of the initial population, the crossover rate and the mutation rate were studied. The results demonstrate that the method presented is precise when compared with the traditional Fourier transform.
The growing number of applications for 3D graphics and imaging systems in the mass market requires the customized approach to the design of high-performance 3D graphics and imaging system architectures. That fact coup...
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In this paper, we describe a novel neural network architecture, which can recognize human faces with any view in a certain viewing angle range (fromy left 30 degrees to right 30 degrees out of plane rotation). View-sp...
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We describe a novel method to plan paths for mobile robots in an environment observed by a network of video cameras. The multiple video streams are fused to generate a spatial-temporal map of freespace. Updated at 5 H...
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We describe a novel method to plan paths for mobile robots in an environment observed by a network of video cameras. The multiple video streams are fused to generate a spatial-temporal map of freespace. Updated at 5 Hz, this map concurrently locates both static and dynamic obstacles. Our novel method computes a polynomial-shaped path from current position to goal position for each map update (at 5 Hz), thus accomplishing both path planning and dynamic obstacle avoidance simultaneously. We demonstrate our methods operating in several dynamic scenarios, and compare our methods against paths planned using a numeric potential field.
We describe an algorithm to fuse intensity data from multiple video cameras to create a spatial-temporal occupancy map. The camera layout is assumed to resemble a security video network. The occupancy map is a two-dim...
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We describe an algorithm to fuse intensity data from multiple video cameras to create a spatial-temporal occupancy map. The camera layout is assumed to resemble a security video network. The occupancy map is a two-dimensional raster image, uniformly distributed in the floor-plane. Each map pixel contains a binary value, signifying whether the designated floorspace is empty or occupied. Our algorithm requires only one difference and one look-up table operation to determine each pixel's effect upon the map. This brevity of operations allows the spatial occupancy map to be temporally computed at real-time video rates. We demonstrate our algorithm operating in several dynamic scenarios.
The main contribution of this work is to propose a number of broadcast efficient VLSI architectures for computing the sum and the prefix sums of a wk-bit, k ≥ 2, binary sequence using, as basic building blocks, linea...
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The task of computing binary prefix sums (BPS, for short) arises, for example, in expression evaluation, data and storage compaction, and routing. The paper describes a scalable VLSI architecture for the BPS problem. ...
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The task of computing binary prefix sums (BPS, for short) arises, for example, in expression evaluation, data and storage compaction, and routing. The paper describes a scalable VLSI architecture for the BPS problem. The authors adopt as the central theme of this effort, the recognition of the fact that the broadcast delay incurred by a signal propagating along a bus is, at best, linear in the distance traversed. Thus, one of the design criteria is to keep buses as short as possible. In this context, the main contribution is to show that one can use short buses in conjunction with shift switching to obtain a scalable VLSI architecture for the BPS problem.
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