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48th IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2023

作者： Atienza, Rowel University of the Philippines Electrical and Electronics Engineering Institute Ai Graduate Program Philippines

ISBN: (纸本)9781728163277

State of the art (SOTA) neural text to speech (TTS) models can generate natural-sounding synthetic voices. These models are characterized by large memory footprints and substantial number of operations due to the long-standing focus on speech quality with cloud inference in mind. Neural TTS models are generally not designed to perform standalone speech syntheses on resource-constrained and no Internet access edge devices. In this work, an efficient neural TTS called EfficientSpeech that synthesizes speech on an ARM CPU in real-time is proposed. EfficientSpeech uses a shallow non-autoregressive pyramid-structure transformer forming a U-Network. EfficientSpeech has 266k parameters and consumes 90 MFLOPS only or about 1% of the size and amount of computation in modern compact models such as Mixer-TTS. EfficientSpeech achieves an average mel generation real-time factor of 104.3 on an RPi4. Human evaluation shows only a slight degradation in audio quality as compared to FastSpeech2. © 2023 IEEE.

关键词： CMOS FLOPS parameters RTF TTS

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Interfacial-Layer-Free Ge0.95Si0.05Nanosheet FeFETs

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IEEE Transactions on Electron Devices 2024年第3期71卷 1758-1763页

作者： Hsieh, Wan-Hsuan Chen, Yu-Rui Liu, Yi-Chun Zhao, Zefu Lee, Jia-Yang Tu, Chien-Te Huang, Bo-Wei Wang, Jer-Fu Lee, M.H. Liu, C.W. Graduate Institute of Electronics Engineering National Taiwan University Taipei10617 Taiwan Institute and Undergraduate Program of Electro-Optical Engineering Graduate School of Advance Technology National Taiwan University Taipei10617 Taiwan National Taiwan University Graduate School of Advance Technology Taipei10617 Taiwan Graduate Institute of Electronics Engineering Graduate Institute of Photonics and Optoelectronics Graduate School of Advanced Technology National Taiwan University Department of Electrical Engineering Taipei10617 Taiwan

The substantial memory window (MW) of 1.8 V is achieved by utilizing stacked two nanosheet (NS) gate-all-around (GAA) Ge0.95 Si0.05 ferroelectric field-effect transistors (FeFETs), employing a low write voltage of 2 V. The channel phosphorus concentration 1E18 cm-3 is used to erase the absence of interfacial layer (IL) can reduce the operation voltage. An isotropic wet etching process is employed for channel release. The stacked two NSs offer the advantages of reducing cell-to-cell variation and doubling the read current. Additionally, the stability of data storage is demonstrated with the data retention of >1E4 s, linearly extrapolated to a span of 10 years, and exhibiting high endurance >1E11 cycles. The thermal budget is as low as 400 °C. © 1963-2012 IEEE.

关键词： III-V semiconductors

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Compact Model Build Upon Dynamic Weighting Artificial Neural Network Approach for Complementary Field Effect Transistors

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IEEE Transactions on Electron Devices 2024年第1期71卷 246-253页

作者： Butola, Rajat Li, Yiming Kola, Sekhar Reddy National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan Institute of Pioneer Semiconductor Innovation The Institute of Artificial Intelligence Innovation National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program The Institute of Communications Engineering the Institute of Biomedical Engineering Department of Electronics and Electrical Engineering Hsinchu300093 Taiwan

In this work, a dynamic weighting-artificial neural network (DW-ANN) methodology is presented for quick and automated compact model (CM) generation. It takes advantage of both TCAD simulations for high accuracy and SPICE simulations for cost-effectiveness. This methodology is developed for gate-all-around (GAA) silicon (Si) nanosheet (NS) complementary field effect transistor (CFET), a potential candidate for future CMOS technology due to its innate properties. The critical process variation (PV) sources that severely degrade the CFET performance are estimated using DW-ANN. It reduces the computation cost and predicts the effects of PV sources with less than 1% error. Furthermore, a compact DW-ANN-based Verilog-A model has been developed that captures the dc as well as transient behavior accurately for circuit-level analysis. CFET-based circuits such as inverter, 6T-static random access memory (SRAM), and ring oscillator (RO) are characterized and implemented using DW-ANN-based CM. The overall average error of the model is reported as less than 2%. Therefore, the proposed device and circuit modeling approach provides a feasible solution for the rapid compact modeling of new emerging devices with good convergence and high accuracy. © 1963-2012 IEEE.

关键词： Neural networks

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Multi-Scale Analysis Combined Operando Elemental/Spectroscopic Measurement Techniques in Oxide-Type All-Solid-State Na Batteries

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Energy & Environmental Materials 2025年第2期8卷 34-43页

作者： Koji Hiraoka Kazuo Yamamoto Takeshi Kobayashi Tetsuo Sakamoto Shiro Seki Graduate School of Engineering Applied Chemistry and Chemical Engineering ProgramKogakuin UniversityHachiojiTokyo 192-0015Japan Nanostructures Research Laboratory Japan Fine Ceramics CenterAtsutaNagoyaAichi 456-8587Japan Energy Transformation Research Laboratory Central Research Institute of Electric Power IndustryYokosukaKanagawa240-0196Japan Graduate School of Engineering Electrical Engineering and Electronics ProgramKogakuin UniversityHachiojiTokyo192-0015Japan

Understanding the charge/discharge mechanism of batteries plays an important role in the development of high-performance systems,but extremely complicated reactions are *** these complex phenomena are also bottlenecks for the establishment of all-sol id-state batteries(ASSB),we conducted multi-scale analysis using combined multi-measurement techniques,to directly observe charge/discharge reactions at hierarchical scales for the oxide-type ASSB using Na as the carrier *** particular,all of measurement techniques are applied to cross-section ASSB in the same cell,to complementarily evaluate the elemental distributions and structural *** Operando scanning electron microscopy-energy-dispersive X-ray spectroscopy,the Na concentration in the electrode layers changes on the micrometer scale under charge/discharge reactions in the first ***,Operando Raman spectroscopy reveal changes in the bonding states at the atomic scale in the active material,including changes in reversible structural *** cycling the ASSB,the elemental distributions are clearly observed along with the particle shapes and can reveal the Na migration mechanism at the nanometer scale,by time-of-flight secondary ion mass ***,this study can provide a fundamental and comprehensive understanding of the charge/discharge mechanism by observing reaction processes at multiple scales.

关键词： Operando oxide-typeall-solid-statebattery Raman SEM-EDS sodium battery TOF-SIMS

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EfficientSpeech: An On-Device Text to Speech Model

EfficientSpeech: An On-Device Text to Speech Model

引用

International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： Rowel Atienza Electrical and Electronics Engineering Institute and AI Graduate Program University of the Philippines

关键词： Performance evaluation Degradation Computational modeling Signal processing Transformers Real-time systems Computational efficiency

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Correntropy-Based Data Selective Adaptive Filtering

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IEEE Transactions on Circuits and Systems I: Regular Papers 2024年第2期71卷 754-766页

作者： Chien, Ying-Ren Wu, Sheng-Teng Tsao, Hen-Wai Diniz, Paulo S.R. Adaptive and Autonomous Communication Laboratory Department of Electrical Engineering National Ilan University Yilan City260007 Taiwan College of Electrical Engineering and Computer Science Graduate Institute of Communication Engineering National Taiwan University Taipei10617 Taiwan Program of Electrical Engineering Department of Electronics and Computer Engineering COPPE/Poli Universidade Federal do Rio de Janeiro Rio de Janeiro68504 Brazil

Data selection can be used in conjunction with adaptive filtering algorithms to avoid unnecessary weight updating and thereby reduce computational overhead. This paper presents a novel correntropy-based data selection method as an alternative to conventional data selection mechanisms based on squared error values. We developed a variable correntropy sensing algorithm to maximize the instantaneous correntropy function for the Gaussian kernel function to mitigate the impact of impulse noise and other forms of noise that can be disregarded in data selection. The proposed data selection mechanism can be implemented with any adaptive filtering algorithm. In simulations, the proposed method (implemented with the least mean squared algorithm) outperformed comparable error-based data selection schemes in terms of hit rate and miss rate, and the resulting weight updating ratio was close to the expected weight updating ratio. © 2023 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.

关键词： Adaptive filters

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EFFICIENTSPEECH: AN ON-DEVICE TEXT TO SPEECH MODEL

arXiv

引用

arXiv 2023年

作者： Atienza, Rowel Electrical and Electronics Engineering Institute AI Graduate Program University of the Philippines Philippines

关键词： Speech synthesis

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A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors

IEEE Open Journal of Nanotechnology

引用

IEEE Open Journal of Nanotechnology 2023年 4卷 181-194页

作者： Butola, Rajat Li, Yiming Kola, Sekhar Reddy National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Institute of Communications Engineering the Institute of Biomedical Engineering the Department of Electronics and Electrical Engineering the Institute of Pioneer Semiconductor Innovation and the Institute of Artificial Intelligence Innovation Hsinchu300093 Taiwan

Machine learning (ML) is poised to play an important part in advancing the predicting capability in semiconductor device compact modeling domain. One major advantage of ML-based compact modeling is its ability to capture complex relationships and patterns in large datasets. Therefore, in this paper a novel design scheme based on dynamically adaptive neural network (DANN) is proposed to develop fast and accurate compact model (CM). This framework constitutes a powerful yet computationally efficient methodology and exhibits emergent dynamic behaviors. This paper demonstrates that the compact model based on ML can be designed to replicate the performance of conventional compact model for nanodevices. For this work, gate-all-around (GAA) nanosheet (NS) device characteristics are comprehensively analyzed for process variability sources using the proposed model. The device geometry parameters such as channel length, nanosheet width and nanosheet thickness are fed as input features to the DANN model. The adaptive neural network learns dynamically by updating weights of the model in accordance with the input features and achieves accurate neural weight convergence. The proposed model predicted the electrical characteristics of NS devices with less than 1% error rate. The model is also implemented and validated for the simulations of digital circuit designs such as inverter, and logic gates. ©;2023 The Authors.

关键词： Circuit simulation

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Scene Text Recognition Models Explainability Using Local Features

Scene Text Recognition Models Explainability Using Local Fea...

引用

IEEE International Conference on Image Processing

作者： Mark Vincent Ty Rowel Atienza Electrical and Electronics Engineering Institute University of the Philippines AI Graduate Program University of the Philippines

Explainable ai (Xai) is the study on how humans can be able to understand the cause of a model’s prediction. In this work, the problem of interest is Scene Text Recognition (STR) Explainability, using Xai to understand the cause of an STR model’s prediction. Recent Xai literatures on STR only provide a simple analysis and do not fully explore other Xai methods. In this study, we specifically work on data explainability frameworks, called attribution-based methods, that explains the important parts of an input data in deep learning models. However, integrating them into STR produces inconsistent and ineffective explanations, because they only explain the model in the global context. To solve this problem, we propose a new method, STRExp, to take into consideration the local explanations, i.e. the individual character prediction explanations. This is then benchmarked across different attribution-based methods on different STR datasets and evaluated across different STR models.

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Statistical Device Simulation and Machine Learning of Process Variation Effects of Vertically Stacked Gate-All-Around Si Nanosheet CFETs

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IEEE Transactions on Nanotechnology 2024年 23卷 386-392页

作者： Kola, Sekhar Reddy Li, Yiming Butola, Rajat National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Department of Electronics and Electrical Engineering Institute of Communications Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Institute of Biomedical Engineering Institute of Pioneer Semiconductor Innovation Institute of Artificial Intelligence Innovation Hsinchu300093 Taiwan

In this study, we report the process variation effect (PVE) including the work function fluctuation (WKF) on the DC/AC characteristic fluctuation of stacked gate-all-around silicon complementary field-effect transistors (CFETs). The PVE affects characteristic fluctuation significantly;in particular, for the variability of off-state current. Owing to the bottom channel of a fin-type, the P-FET suffers from the worst off-state current fluctuation (more than 200% variation) compared to the N-FET. The device variability induced by the WKF is marginal because of amorphous-type metal grains. As input features to an artificial neural network (ANN) model, low and high work function values, as well as parameters of PVE that have prevalent effects on CEFT transfer characteristics are further considered and modeled. The estimated values of R2-score prove that the ANN model properly grasps information from the dataset successfully;thus, it can be used to model emerging CFETs for circuit simulation. © 2002-2012 IEEE.

关键词： Neural networks

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