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arXiv 2023年

作者： Ty, Mark Vincent Atienza, Rowel Electrical and Electronics Engineering Institute University of the Philippines Philippines AI Graduate Program University of the Philippines Philippines

Explainable ai (Xai) is the study on how humans can be able to understand the cause of a model's prediction. In this work, the problem of interest is Scene Text Recognition (STR) Ex-plainability, using Xai to understand the cause of an STR model's prediction. Recent Xai literatures on STR only provide a simple analysis and do not fully explore other Xai methods. In this study, we specifically work on data explainability frameworks, called attribution-based methods, that explain the important parts of an input data in deep learning models. However, integrating them into STR produces inconsistent and ineffective explanations, because they only explain the model in the global context. To solve this problem, we propose a new method, STRExp, to take into consideration the local explanations, i.e. the individual character prediction explanations. This is then benchmarked across different attribution-based methods on different STR datasets and evaluated across different STR models. © 2023, CC BY-SA.

关键词： Forecasting

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A Physical-Based Artificial Neural Networks Compact Modeling Framework for Emerging FETs

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IEEE Transactions on Electron Devices 2024年第1期71卷 223-230页

作者： Yang, Ya-Shu Li, Yiming Kola, Sekhar Reddy Reddy National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory The Institute of Communications Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Institute of Communications Engineering Institute of Biomedical Engineering Department of Electronics and Electrical Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan

We report a compact modeling framework based on the Grove-Frohman (GF) model and artificial neural networks (ANNs) for emerging gate-all-around (GAA) MOSFETs. The framework consists of two ANNs;the first ANN constructed with the drain current model not only can capture the main trend of device I - V characteristics but also can predict its variation even when the amount of training data for the ANN is insufficient or outside the range of applied biases. The second one is then designed to improve the model accuracy by further minimizing the errors between the target and the model outputs. We implement the proposed framework to accurately model emerging GAA nanosheet (NS) MOSFETs and complementary FETs (CFETs) without suffering from divergent issues in circuit simulation. In addition, nonphysical behaviors, such as nonzero current at zero bias, do not occur in the modeling framework. Compared to recently reported machine-learning (ML) models, our approach can achieve a similar level of model accuracy with merely 20% amount of the training data. © 1963-2012 IEEE.

关键词： Neural networks

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Multiplexed Nanoscopy via Buffer Exchange

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ACS Nano 2024年第34期18卷 23445-23456页

作者： Chang, Ting-Jui Ben Yang, T. Tony Department of Electrical Engineering National Taiwan University Taipei10617 Taiwan Graduate Institute of Biomedical Electronics and Bioinformatics National Taiwan University Taipei10617 Taiwan Department of Physics National Taiwan University Taipei10617 Taiwan Nano Science and Technology Program Taiwan International Graduate Program Academia Sinica and National Taiwan University Taipei10617 Taiwan

Understanding cellular functions, particularly in their intricate complexity, can greatly benefit from the spatial mapping of diverse molecules through multitarget single-molecule localization microscopy (SMLM). Existing methodologies, primarily restricting the encoding dimensions to color and lifetime or requiring cyclic staining, often involve broad chromatic detection, specialized optical configurations, or sophisticated labeling techniques. Here, we propose a simple approach called buffer-exchange stochastic optical reconstruction microscopy (beSTORM), which introduces an additional dimension to differentiate between single molecules irrespective of their spectral properties. This method leverages the distinguishable photoblinking responses to distinct buffer conditions, offering a straightforward yet effective means of fluorophore discrimination. Through buffer exchanges, beSTORM achieves multitarget SMLM imaging with minimal crosstalk. Direct integration with expansion microscopy (ExM) demonstrates its capability to resolve up to six proteins at the molecular level within a single emission color without chromatic aberration. Overall, beSTORM presents a highly compatible imaging platform, promising significant advancements in highly multiplexed nanoscopy for exploring multiple targets in biological systems with nanoscale precision. © 2024 The Authors. Published by American Chemical Society.

关键词： Stochastic systems

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Characteristics of a High-impedance Folded Dipole Antenna in the Millimeter Wave Band

Characteristics of a High-impedance Folded Dipole Antenna in...

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2022 IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition, iWEM 2022

作者： Yamashiro, Koki Takashima, Yoshiki Noguchi, Keisuke Kanazawa Institute of Technology Graduate Program in Electrical Engineering and Electronics Ishikawa Nonoichi Japan Toko Electrical Constriction Chiyoda Tokyo Japan Kanazawa Institute of Technology Electrical and Electronics Engineering Ishikawa Nonoichi Japan

ISBN: (数字)9781665432382

ISBN: (纸本)9781665432382

Rectenna with high rectification efficiency is demanded for wireless power transfer systems. In order to improve rectification efficiency at mm-wave band, we study on high impedance antennas. This paper reports the characteristics of a folded dipole antenna consisting of open-Terminated two strips on an Alumina substrate. We designed the antenna with over 1000Ω at 28 GHz using EM simulator. As results, we obtained input resistance of 1463.7Ω with radiation efficiency of 86.7%. © 2022 IEEE.

关键词： Energy transfer

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Temperature-Dependent Hydrogen Modulations of Ultra-Scaled a-IGZO Thin Film Transistor Under Gate Bias Stress

IEEE Open Journal of Nanotechnology

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IEEE Open Journal of Nanotechnology 2024年 5卷 9-16页

作者： Aslam, Muhammad Chang, Shu-Wei Chuang, Min-Hui Chen, Yi-Ho Lee, Yao-Jen Li, Yiming Parallel and Scientific Computing Laboratory National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Electrical Engineering and Computer Science International Graduate Program National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Department of Electrical Engineering National Cheng Kung University Tainan701401 Taiwan Institute of Communications Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Graduate Degree Program of College of Electrical and Computer Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Institute of Pioneer Semiconductor Innovation National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Institute of Biomedical Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Department of Electronics and Electrical Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan

Recently, a-IGZO has advanced toward the next-generation electronics system because of its compatibility with complementary metal oxide semiconductor (CMOS) and back-end-of-line (BOEL) based systems. A systematic electrical characterization of a-IGZO TFT related to reliability issues, such as positive bias temperature stress (PBTS) and negative bias temperature stress (NBTS), would entitle its integration into novel electronics systems. Unexpectedly, PBTS is characterized by the transition of positive Vth shift to negative Vth shift (ΔVth, the positive shift followed by the stress and temperature activated negative shift). This transition is attributed to charge trapping/trap-site generations and hydrogen migration to the active layer. The ΔVth shift mechanism depends on the temperature and voltage stress. On the other hand, a negative ΔVth shift has been observed during the NBTS operation and could be attributed to the hole trapping at the interface of GI/IGZO. An effective suppression of the gate leakage current has also been observed during reliability tests. Simulation results reveal a pronounced potential at the edges of source and drain regions, and considered the origin of hydrogen migration into the IGZO layer. Thermal image results also reveal the strong temperature/potential distribution at the edges of the source/drain regions, indorsing the simulation results. © 2020 IEEE.

关键词： Oxide semiconductors

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Overview of Versatile Video Coding (H.266/VVC) and Its Coding Performance Analysis

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IEIE Transactions on Smart Processing and Computing 2023年第2期12卷 122-154页

作者： Lee, Minhun Song, HyeonJu Park, Jeeyoon Jeon, Byeungwoo Kang, Jungwon Kim, Jae-Gon Lee, Yung-Lyul Kang, Je-Won Sim, Donggyu Department of Computer Engineering Kwangwoon University Seoul Korea Republic of Department of Computer Engineering Sejong University Seoul Korea Republic of Department of Electrical and Computer Engineering Sungkyunkwan University Kyunggi-do Korea Republic of Communication and Media Research Laboratory Electronics and Telecommunications Research Institute Deajeon Korea Republic of School of Electronics and Information Engineering Korea Aerospace University Kyunggi-do Korea Republic of Department of Electronic and Electrical Engineering Graduate Program in Smart Factory Ewha Womans University Seoul Korea Republic of

Versatile Video Coding (H.266/VVC) is the newest video coding standard jointly developed by the Joint Video Experts Team (JVET), which is organized by the ITU-T Video Coding Experts Group (VCEG) and the ISO/IEC Moving Picture Experts Group (MPEG). H.266/VVC provides about 40% bitrate reduction compared with High Efficiency Video Coding (H.265/HEVC) for the same visual quality. This paper introduces in detail the core structure of H.266/VVC by highlighting its features within block partitioning structure, intra/inter prediction, transform, quantization, and in-loop filtering, compared to its predecessor (H.265/HEVC). H.266/VVC yields significantly improved the coding performance, but it increased the computational complexity, particularly for the encoder side, which remains a problem to be tackled for successful commercialization in the future. This paper examined the statistical performance of H.266/VVC coding tools from the bitstreams encoded by the VVC test model (VTM12.0) encoder through rate-distortion optimization under the JVET common test conditions. In addition, the complexity and performance analyses are conducted on the block partitioning structure and group of picture structure. It is expected that an optimized H.266/VVC encoder can be designed and developed by minimizing the coding loss based on the analysis data. © 2023 institute of electronics and Information Engineers. All rights reserved.

关键词： Image compression

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Three-phase Self-Excited Induction Generator Operating as Single-phase Induction Generator using Static VAR Compensator 20

Three-phase Self-Excited Induction Generator Operating as Si...

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20th International Conference on electrical engineering/electronics, Computer, Telecommunications and Information Technology, ECTI-CON 2023

作者： Yukhalang, Sawat Sopapirm, Theppanom Kinnares, Vijit Mahanakorn University of Technology The Electrical Engineering Graduate Program Faculty of Engineering and Technology Nongjok Bangkok10530 Thailand Institute of Electrical and Electronics Faculty of Engineering and Technology Mahanakorn University of Technology Nongjok Bangkok10530 Thailand King Mongkut's Institute Technology Ladkrabang School of Engineering Department of Electrical Engineering Chalongkrung Road Ladkrabang Bangkok10520 Thailand

ISBN: (纸本)9798350310467

This paper proposes a performance analysis of using a static volt-amp-reactive (VAR) compensator for a three-phase self-excited induction generator (SEIG) operating as a single-phase induction generator. The study proposes appropriate capacitor for building up voltage supplying power to load with static VAR for regulating terminal voltage. The simulation model is analyzed by using MATLAB/Simulink under various conditions such as reactive power supplied, dynamic response, steady state, building up voltage for startup, linear load, non-linear load and harmonics in system. From the study (based on the study, the findings revealed it is found) that using the static VAR compensator connected in parallel with loads for supplying reactive power to the load systems is needed for maintaining terminal voltage. © 2023 IEEE.

关键词： Reactive power

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Low Routing Complexity Multiframe Pipelined LDPC Decoder Based on a Novel Pseudo Marginalized Min-Sum Algorithm for High Throughput Applications

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IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2023年第1期31卷 29-42页

作者： Davila, HenryLopez Wu, Tsung-Han Jou, Shyh-Jye Jerry Chen, Sau-Gee Tsai, Pei-Yun National Chiao Tung University Eecs International Graduate Program Hsinchu30010 Taiwan National Yang Ming Chiao Tung University Institute of Electronics Hsinchu30010 Taiwan National Central University Electrical Engineering Department Taoyuan32001 Taiwan

This article presents a high throughput and low routing complexity multiframe pipelined low-density parity check (LDPC) decoder design based on a novel pseudo marginalized min-sum (PMMS) message passing approach. The proposed PMMS approach reduces the required number of interconnections in the routing network allowing the design to be implemented with reduced hardware complexity, low power consumption and high throughput capability while supporting multiple coding rates with short and long codewords as defined in many application standards. Implementation results for IEEE802.11ad/ay standards show that the proposed design satisfies a target bit error rate (BER) requirement of 3× 10-7 with 64 quadrature amp mod (QAM) targeting high throughput applications. Furthermore, the proposed design is able to achieve a throughput of 62 and 101.8 Gb/s with two pipelining stages under 28-nm CMOS and 16-nm FinFET CMOS process, respectively. As compared to the existing NMS algorithm, the proposed design based on the PMMS approach reduces the number of wires in the routing network by 45.5%, and the wirelength of the overall decoder by 17%. The area and power consumption are also reduced by 9.4% and 12%, respectively, as compared to the conventional normalized min-sum (NMS) algorithm. © 1993-2012 IEEE.

关键词： Message passing

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3D Stackable Vertical Ferroelectric Tunneling Junction (V-FTJ) with on/off Ratio 1500x, Applicable Cell Current, Self-Rectifying Ratio 1000x, Robust Endurance of 109Cycles, Multilevel and Demonstrated Macro Operation Toward High-Density BEOL NVMs

3D Stackable Vertical Ferroelectric Tunneling Junction (V-FT...

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2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023

作者： Lee, J.-Y. Chang, F.-S. Hsiang, K.-Y. Chen, P.-H. Luo, Z.-F. Li, Z.-X. Tsai, J.-H. Liu, C.W. Lee, M.H. National Taiwan Normal University Institute and Undergraduate Program of Electro-Optical Engineering Taiwan National Taiwan University Graduate School of Advance Technology Taiwan National Yang Ming Chiao Tung University Institute of Electronics Department of Electronics Engineering Taiwan National Taiwan Normal University Department of Electrical Engineering Taiwan

ISBN: (纸本)9784863488069

A 1500x ILRS/IHRS with a high cell current of 100 nA/ cell (J = 83 A/cm2) is achieved by antiferroelectric (AFE) vertical ferroelectric tunnel junctions (V-FTJs) that demonstrates multilevel, a self-rectifying rate > 1000x, and macro operation. The stackable 3 D architecture integrating multiple layers of AFE V-FTJs with contact optimization further increases memory density. Robust endurance > 109 cycles at |4V| and stable nonvolatile data retention > 104 sec with extrapolation to 10 years are achieved. The proposed cell contact V-FTJ by AFE is a promising pathway toward BEOL NVMs by a NAND/NOR-based framework. © 2023 JSAP.

关键词： Ferroelectricity

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Mechanism of Threshold Voltage Instability in Double Gate α-IGZO Nanosheet TFT under Bias and Temperature Stress

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IEEE Journal of the Electron Devices Society 2024年 12卷 464-471页

作者： Aslam, Muhammad Chang, Shu-Wei Chen, Yi-Ho Lee, Yao-Jen Li, Yiming Lee, Wen-Hsi Parallel and Scientific Computing Laboratory National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Electrical Engineering and Computer Science International Graduate Program National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Department of Electrical Engineering National Cheng Kung University Tainan City701401 Taiwan Institute of Pioneer Semiconductor Innovation Industry Academic Innovation School National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Department of Electronics and Electrical Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Institute of Communications Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan

Amorphous indium gallium zinc oxide (a-IGZO)-based thin film transistors (TFTs) are increasingly becoming popular because of their potential in futuristic applications, including CMOS technology. Given the demand for CMOS-compatible, ultra-scaled, reliable, and high-performing devices, we fabricate and analyze scaled-channel a-IGZO-TFTs with an optimal double-gate structure, a thin nanosheet-based channel, and an effective high- κ dielectric namely HfO2. The reliably reported double gate IGZO nanosheet TFTs (DG-IGZO-NS-TFTs) are tested under positive and negative bias stress at variant temperatures, and the resulting modulations are analyzed critically. The reported DG-IGZO-NSTFTs exhibit a negative side threshold voltage shift (Δ Vth) accompanied by an increase in Ion/Ion(0) under negative bias temperature stress (NBTS) at elevated temperatures, which indicates the presence of additional charges. An anomalous negative side shifting of the Vth is observed under positive bias temperature stress (PBTS), where diffused hydrogen atoms are identified as introducing excess n-type carriers into the channel and causing the observed Δ Vth. The spectroscopic analysis is performed to establish evidence for the assumed mechanisms, and the role of individual gates is investigated in the context of performance variance under temperature-bias stress. Moreover, the partial reversibility of the stress-induced degradation is experimentally established and methodically discussed. Overall, the reported results offer a comprehensive understanding of scaled-channel DG-NS-IGZO-TFTs, which help shape performance-enhancement strategies, control degradation mechanisms, and define appropriate application scenarios. © 2013 IEEE.

关键词： Thin film transistors

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