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Fast hardware computation of X mod Z

Fast hardware computation of X mod Z

引用

25th IEEE International Parallel and Distributed Processing Symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Butler, J.T. Sasao, T. Department of Electrical and Computer Engineering Naval School Monterey CA United States Department of Computer Science and Electronics Kyushu Institute of Technology Iizuka Fukuoka Japan

ISBN: (纸本)9780769543857

We show a high-speed hardware implementation of xmodz that can be pipelined in O(n - m) stages, where x is represented in n bits and z is represented in m bits. It is suitable for large x. We offer two versions. In the first, the value of z is fixed by the hardware. For example, using this circuit, we show a random number generator that produces more than 11 million random numbers per second on the SRC-6 reconfigurable computer. In the second, z is an independent input. This is suitable for RNS number system applications, for example. The second version can be pipelined in O(n) stages. Keywords: x modz computation, high-speed modulo reduction, mod z arithmetic © 2011 IEEE.

关键词： Number theory

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Design and Implementation of a Dynamic Reconfigurable Classroom for Cooperative Learning

Design and Implementation of a Dynamic Reconfigurable Classr...

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International Conference on Intelligent Networking and Collaborative systems (INCOS)

作者： Hideki Kondo Hiroyuki Narahara Department of Mechanical Information Science and Technology Faculty of Computer Science and System Engineering Kyushu Institute of Technology Iizuka Japan

In order to practically examine a new type of class, in which cooperative learning is taken into consideration, we designed and built a classroom. This classroom, in which furniture and a flexible ICT basis are both designed reconfigurable, supports much more complex interactions between learners than in a traditional classroom. Two months' observation of the activities in the classroom shows that many aspects of the reconfigurations have encouraged complex interactions within cooperative learning.

关键词： Servers Materials Collaboration Dynamic scheduling Multicore processing Information science Education

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A perfSONAR-based integrated multi-domain network measurement platform - Internet Monitoring As a Service

A perfSONAR-based integrated multi-domain network measuremen...

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3rd IEEE International Conference on Intelligent Networking and Collaborativesystems, INCoS 2011

作者： Nakamura, Kastuichi Tsuru, Masato Oie, Yuji Network Design Research Center Kyushu Institute of Technology Fukuoka Japan Faculty of Computer Science and Systems Engineering Kyushu Institute of Technology Fukuoka Japan

ISBN: (纸本)9780769545790

The scale, diversity, and decentralized administration of the Internet mean that to continuously acquire the global status of the network and to timely identify the causes of communication performance degradation is reasonably difficult. However, emerging advanced network applications, which are often sensitive to communication quality and bandwidth consumption, as well as increasing security threats, strongly require a higher quality of network measurement and analysis in terms of granularity (spatial and temporal), timeliness, continuity, coverage, and reliability. Integrating multiple-location, diverse-type, and long-term measurements has been considered a key means for coping with such difficulties. In addition, the measured data and analyzed results should be flexibly shared and reused for efficiency. Therefore, a multi-domain network measurement platform should be realized, as it can provide integrated network monitoring and analysis functionality over the Internet on demand and can adapt to the purposes of the individual users (applications) and operators. In this paper, we thus briefly introduce the design principles and software implementation for a perfSONAR-based integrated network measurement system aiming at "Internet Monitoring As a Service", together with a preliminary experiment using a prototype system on the Internet. With help of a function we newly designed and developed, our system can easily utilize new measurement tools and flexibly integrate and provide the measurement results of those tools to users. © 2011 IEEE.

关键词： Bandwidth

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Performance improvement method for ISDB-T receiver under fast fading channel

Performance improvement method for ISDB-T receiver under fas...

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2011 IEEE Consumer Communications and Networking Conference, CCNC'2011

作者： Uwai, Tatsumi Surantha, Nico Nagao, Yuhei Kurosaki, Masayuki Ochi, Hiroshi Faculty of Computer Science and Systems Eng. Kyushu Institute of Technology 680-4 Kawazu Iizuka-shi Fukuoka-ken 820-8502 Japan

ISBN: (纸本)9781424487905

In mobile environment, decode quality is largely influenced by multipath fading and Doppler shift. In this paper, we reported improvement of mobile reception for high-definition television (HDTV) of integrated services digital broadcasting terrestrial (ISDB-T) by using maximum ratio combining (MRC) diversity and using two-dimensional (2D) filter in channel estimation. From computer simulations, we show that the bit error rate (BER) of the proposed method is improved compared to that of conventional systems. Finally, we verify reception quality of a received movie signal using our proposed system via computer simulation. © 2011 IEEE.

关键词： Reception quality

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FPGA implementation of joint CFO and IQ-imbalance compensator for narrow-band wireless system

FPGA implementation of joint CFO and IQ-imbalance compensato...

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4th Annual International Conference on Advanced Technologies for Communications, ATC2011

作者： Yoshida, Takuro Nojima, Daisuke Nagao, Yuhei Kurosaki, Masayuki Ochi, Hiroshi Faculty of Computer Science and Systems Eng. Kyushu Institute of Technology 680-4 Kawazu Iizuka-shi Fukuoka-ken 820-8502 Japan

ISBN: (纸本)9781457712043

In direct conversion receiver, I/Q imbalance is caused by non orthogonality between in-phase component and quadrature-phase component caused by imperfections of quadrature demodulator. In addition, carrier frequency offset (CFO) occurs as well. In this paper, we present a register transfer level (RTL) design of joint CFO and I/Q imbalance compensator. First, we verify the efficiency of compensation algorithm with computer simulation, and then we show a bit error rate (BER) characteristic. After that, we made an RTL design to compensate CFO and I/Q *** also measure the efficiency of system in this step by looking at constellation of received signal. Finally, we implement the RTL design of compensation system in a field programmable gate array (FPGA). We show the effect of compensation system by simulation on RTL and verification on FPGA. © 2011 IEEE.

关键词： Efficiency

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Testing static single cell faults using static and dynamic data background

Testing static single cell faults using static and dynamic d...

引用

2011 IEEE Student Conference on Research and Development, SCOReD 2011

作者： Zakaria, Nor Azura Hasan, W.Z.W. Abdul Halin, Izhal Sidek, R.M. Wen, Xiaoqing Microelectronic Department PDSI Technology Park Malaysia Bukit Jalil Kuala Lumpur Malaysia Department of Electrical and Electronic Engineering Faculty Engineering University Putra Malaysia Serdang Selangor Malaysia Department of Creative Informatics Graduate School of Computer Science and System Engineering Kyushu Institute of Technology Iizuka Japan

ISBN: (纸本)9781467301022

This work proposes a bit-adjacent Data Background (DB) management scheme to improve fault coverage of March algorithms while simultaneously maintaining the shortest test cycle. Both static and dynamic DB transitions are used in order to detect Deceptive Read Destructive Faults (DRDFs) and Write Disturb Faults (WDFs) that are not detected by previous algorithms. A conventional March Test Algorithm can be modified by using the DB management scheme to form a new March Test Algorithm (referred to as Mod March Test Algorithm), e.g., MATS++(6N) becoming Mod MATS++(6N). This paper shows that Mod March SR (14N) and Mod March CL (12N) can detect DRDFs and WDFs while the corresponding conventional algorithms cannot. It is also shown that Mod March CL(12N) and Mod March SR(14N) with DB management can detect all Static Single Cell Faults based on the Bit-Oriented-Memories (BOM) test method. Comparisons on test cycle time for Mod March SR, March SR, and March SS in the context of memory Built-In-Self-Test (BIST) are also presented. From the simulation result, it shows that by including Data Backgrounds (DBs) management in Bit-Oriented Memories (BOM), the cycle test time is the same after a given multiple of DBs in the test algorithm. © 2011 IEEE.

关键词： Built-in self test

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Applying gesture command input method for pen-based group KJ system

Applying gesture command input method for pen-based group KJ...

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Lecture Notes in computer science

作者： Nyu, Takahiro Miura, Motoki Department of Applied Science for Integrated System Engineering Graduate School of Engineering Japan Department of Basic Sciences Faculty of Engineering Kyushu Institute of Technology Japan

ISBN: (纸本)9783642238536

For effective digitizing of the group KJ-method (GKJ) activity, we had proposed a label capture system that utilizes an Anoto-based digital pen. The Former GKJ system can digitize the position and content of not only labels but also normal handwritten text. However, advanced edit operations such as changing the text color and emphasizing labels using a digital pen cannot be performed. In this paper, we propose an advanced edit operation method using handwritten notes. Recognition of handwritten notes can distinguish between normal handwriting and special edit gesture commands on labels. We have improved the GKJ system to handle these special gesture commands for advanced edit operations. © 2011 Springer-Verlag.

关键词： Character recognition

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Routing metric based on node degree for load-balancing in large-scale networks

Routing metric based on node degree for load-balancing in la...

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IEEE/INFORMATION PROCESSING SOCIETY JAPAN International Symposium on Applications and The Internet

作者： Tamura, Hitomi Uchida, Masato Tsuru, Masato Shimada, Jun'Ichi Ikenaga, Takeshi Oie, Yuji Faculty of Engineering Fukuoka Institute of Technology Wajiro-Higashi 3-30-1 Higashi-ku Fukuoka Fukuoka 811-0295 Japan Network Design Research Center Kyushu Institute of Technology Kawazu 680-4 Iizuka Fukuoka 820-8502 Japan Graduate School of Computer Science and Electronics Kyushu Institute of Technology Kawazu 680-4 Iizuka Fukuoka 820-8502 Japan Kyushu Institute of Technology Sensuicho 1-1 Tobata-ku Kitakyushu Fukuoka 804-8550 Japan

ISBN: (纸本)9780769544236

Traffic engineering (TE) is required for reducing highly-loaded links/nodes in a part of networks, thereby reducing the traffic concentration in a part of network. For efficient use of network resources, it is important to efficiently map traffic demands to network resources. However, most of the existing TE schemes are not aware of underlying network topology, Indeed, they try to dynamically map traffic demands to network resources in response to traffic trends in a short period of time. The paper addresses the issue of network congestion due to inefficient mapping between traffic demand and network resources. We propose a new routing metric to allocate forwarding route from source node to its destinations for effective use of network resources in scale-free networks. We show that the best routing metric is p-norm based on node degrees along a path to destination node. Furthermore, we investigate the impact of the parameter, p, on congestion level of each link, and show the best parameter p to minimize the maximum stress centrality in a network. © 2011 IEEE.

关键词： Traffic congestion

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Asynchronous P systems for Arithmetic Operations and Factorization

Asynchronous P Systems for Arithmetic Operations and Factori...

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International Conference on Networking and Computing (ICNC)

作者： Takayuki Murakawa Akihiro Fujiwara Graduate School of Computer Science and Systems Engineering Kyushu Institute of Technology Iizuka Fukuoka Japan

In the present paper, we consider the asynchronous parallelism in membrane computing, and propose asynchronous P systems that perform two basic arithmetic operations and factorization. We first propose a P system that computes addition of two binary numbers of m bits. The P system works in O(m) sequential and parallel steps using O(m) types of objects. We next propose a P system for multiplication of the two binary numbers of m bits, and show that the P system works in O(m log m) parallel steps or O(m 3 ) sequential steps using O(m 2 ) types of objects. Finally, we propose a P system for factorization of a positive integer of m bits using the above P system as a sub-system. The P system computes the factorization in O(m log m) parallel steps or O(4 m × m 2 log m) sequential steps using O(m 2 ) types of objects.

关键词： Parallel processing Biomembranes Skin Complexity theory Computational modeling Evolution (biology) Polynomials

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Elucidation of dynein subunits by a genetically encoded metallothionein tag using electron cryo-tomography

Elucidation of dynein subunits by a genetically encoded meta...

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第十七届国际生物物理大会;第十二届中国生物物理大会

作者： Haru-aki Yanagisawa Kotaro Koyasako Ritsu Kamiya Kouta Mayanagi Takuo Yasunaga Department of Biological sciences Graduate school of sciencehe University of TokyoTokyoJapan Department of Bioscience and Bioinformatics Computer science and system engineeringKyushu institute of technologyIizukaJapan Medical institute of Bioregulation Kyushu University and institute for Bioinformatics Research and DevelopmentFukuokaJapan Department of Bioscience and Bioinformatics Computer science and system engineeringKyushu institute of technologylizukaJapan

Axonemal outer dynein arms(ODAs) regularly align on the outer doublet with a 24-nm periodicity and each of the heterotrimeric three heavy chains(a,(3 and y) works as a *** far,although biochemical studies revealed that each head plays a distinct role in the ODA function,how the three heads have assembled on the axoneme is still *** electron tomographs by negative staining showed that,among ODA-microtubule

关键词： Chlamydomonas Axoneme outer dynein arm metallothionein Cryo-tomography

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