Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests to be used. Many two-port memories have ports which are read-only or write-on...
详细信息
Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests to be used. Many two-port memories have ports which are read-only or write-only; this impacts the possible fault models, the tests for single-port and two-port memories, as well as the test strategy. This paper presents a test strategy for two-port memories and covers the consequences of the port restrictions (read-only or write-only ports).
To exploit instruction level parallelism in programs over multiple basic blocks, programs should have reducible control flow graphs. However not all programs satisfy this property. A new method, called Controlled Node...
详细信息
In this article a multimedia computer-assisted learning (MCAL) system is presented. The major objective of this work was to investigate the potential of using such systems as tools for transferring instructional cours...
In this article a multimedia computer-assisted learning (MCAL) system is presented. The major objective of this work was to investigate the potential of using such systems as tools for transferring instructional course information through various types of computer media as opposed to the classic CAL systems. The philosophy and techniques employed to design the system are investigated. Usage of the implemented system and its merits have been illustrated through its application to teach engineering students and technicians the theory and concepts of marine radar. System design, implementation, test, and revision phases are presented and discussed.
Transport-triggered architectures are a new class of architectures that provide more scheduling freedom and have unique compiler optimizations. This paper reports experiments that quantify the advantages of transport-...
详细信息
This paper reports the results of a comparison between a new class of architectures, called transport-triggered architectures, and traditional architectures, called operation-t~iggered architectures. It does this comp...
详细信息
Wave pipelining is a technique for pipelining digitalsystems that can increase the clock frequency without increasing the number of storage elements. This is achieved by clocking the system faster than the propagatio...
详细信息
This paper discusses software pipelining for a new class of architectures that we call transport-triggered. These architectures reduce the interconnection requirements between function units. They also exhibit code sc...
详细信息
It is a well known fact that full custom designed computerarchitectures can achieve much higher performance for specific applications than general purpose computers. This performance has to be paid for: a long design...
详细信息
作者:
Corporal, H.Delft University of Technology
Faculty of Electrical Engineering Section Computer Architecture and Digital Mekelweg 4 P.O. Box 5031 Delft2600 Netherlands
Realtime behaviour is normally associated with maximal response time in worst case situations. The author introduces a somewhat different notion of realtime behaviour, called realtime performance, which is based on an...
详细信息
暂无评论