Breast cancer is one of the leading cancers among *** has the second-highest mortality rate in women after lung *** detection,especially in the early stages,can help increase survival ***,manual diagnosis of breast ca...
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Breast cancer is one of the leading cancers among *** has the second-highest mortality rate in women after lung *** detection,especially in the early stages,can help increase survival ***,manual diagnosis of breast cancer is a tedious and time-consuming process,and the accuracy of detection is reliant on the quality of the images and the radiologist’s ***,computer-aided medical diagnosis has recently shown promising results,leading to the need to develop an efficient system that can aid radiologists in diagnosing breast cancer in its early *** research presented in this paper is focused on the multi-class classification of breast *** deep transfer learning approach has been utilized to train the deep learning models,and a pre-processing technique has been used to improve the quality of the ultrasound *** proposed technique utilizes two deep learning models,Mobile-NetV2 and DenseNet201,for the composition of the deep ensemble *** learning models are fine-tuned along with hyperparameter tuning to achieve better ***,entropy-based feature selection is *** cancer identification using the proposed classification approach was found to attain an accuracy of 97.04%,while the sensitivity and F1 score were 96.87%and 96.76%,*** performance of the proposed model is very effective and outperforms other state-of-the-art techniques presented in the literature.
In the current era of informationtechnology,students need to learn modern programming languages effi*** art of teaching/learning program-ming requires many logical and conceptual *** it’s a challenging task for the i...
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In the current era of informationtechnology,students need to learn modern programming languages effi*** art of teaching/learning program-ming requires many logical and conceptual *** it’s a challenging task for the instructors/learners to teach/learn these programming languages effectively and effi*** mapping is a useful visual tool for establishing ideas and connecting them to solve *** research proposed an effective way to teach programming languages through visual *** experimental study uses a mind mapping tool to teach two programming environments:Text-based Programming and Blocks-based *** performed the experiments with one hundred and sixty undergraduate students of two public sector universities in the Asia Pacific *** different instructional approaches,including block-based language(BBL),text-based languages(TBL),mind map with text-based language(MMTBL)and mind mapping with block-based(MMBBL)are used for this *** results show that instructional approaches using a mind mapping tool to help students solve given tasks in their critical thinking are more effective than other instructional techniques.
Researching on use of new real-time connection-oriented services like streaming technologies and mission-critical transaction-oriented services and more reliable network become inevitable trends presently. MPLS is a n...
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Fog computing provides lower latency and higher bandwidth compared to cloud computing and is widely used in Internet of Vehicles (IoV). Vehicles cannot compute all tasks locally due to their limited computing power an...
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Focuses on the design of a parallel processor targeted at the rapid execution of neural networks. The basic architecture of the toroidal neural processor (TNP) is based on a toroidal mesh. This architecture was inspir...
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ISBN:
(纸本)9539676932
Focuses on the design of a parallel processor targeted at the rapid execution of neural networks. The basic architecture of the toroidal neural processor (TNP) is based on a toroidal mesh. This architecture was inspired by the need for a low-cost massively parallel processing system that could emulate a large variety of neural models. The TNP consists of two basic elements: a control unit and some processing units. The control unit acts as distributor of information and instructions for the processing units. The processing units perform exact operations on the data, based on the execution of instructions. The design of the TNP has a typical SIMD architecture. The processor has an enhanced interface with the host computer. This interface provides not only operations for programming and control of the TNP, but, in addition, any type of neural network and learning algorithm can be implemented through this interface. In the design of the TNP are implemented 10 control unit instructions and 11 processing unit instructions. The architecture of the TNP is optimized for Xilinx Virtex devices. The design uses many features of this family of FPGA devices. The VHDL constructs are mapped into hardware in the synthesis, optimization, place-and-route and implementation process. The optimization can significantly change the hardware that is generated. The TNP was tested, simulated and implemented in a Xilinx Foundation technology Express version 3.3i environment with the Virtex XCV300 FPGA array and the HW-AFX-BG352-100 prototyping platform. The whole design can be implemented in Virtex E and Spartan devices too.
Influenza is an acute respiratory illness that occurs every year. Detection of Influenza in its earliest stage would reduce the spread of the illness. Sina microblog is a popular microblogging service, provides perfec...
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Nowadays, rapid development of Internet has brought a sharp increase in traffic data. Abnormal traffic haS serious impact on network security. Traffic anomaly detection can be achieved by extracting characteristics of...
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As more and more office documents are captured, stored, and shared in digital format, and as image editing software becomes increasingly more powerful, there is a growing concern about document authenticity. For examp...
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This paper describes an SRAM scaling trend in terms of bit-cell size and operating voltage (Vdd) in a nano-scale process generation. The key design solutions to extend a 6T SRAM lifetime are reviewed and discussed inc...
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This paper describes an SRAM scaling trend in terms of bit-cell size and operating voltage (Vdd) in a nano-scale process generation. The key design solutions to extend a 6T SRAM lifetime are reviewed and discussed including a possible bit cell scaling trend comparing with an 8T SRAM as one of the successors. Each dependency of 3 key margins of write margin (WRM), static noise margin (SNM), and cell current (Icell) on the scaling ratio of Vdd and MOSFET channel feature size has been shown to clarify the real issues in the scaling. The bit cell area scaling trends of 6T and 8T SRAMs are predicted. It has been shown that the area of 6T will be getting closer to that of 8T at 32 nm and should cross over around 22 nm.
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