The chaotic simulated annealing algorithm for combinatorial optimization problems is examined in the light of the global bifurcation structure of the chaotic neural networks. We show that the result of the chaotic sim...
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The chaotic simulated annealing algorithm for combinatorial optimization problems is examined in the light of the global bifurcation structure of the chaotic neural networks. We show that the result of the chaotic simulated annealing algorithm is primarily dependent upon the global bifurcation structure of the chaotic neural networks and unlike the stochastic simulated annealing infinitely slow chaotic annealing does not necessarily provide an optimum result. As an improved algorithm, the adaptive chaotic simulated annealing algorithm is introduced. Using several instances of 20- and 40-city traveling salesman problems, efficiency of the adaptive algorithm is demonstrated.
A two-port memory contains two duplicated sets of address decoders which operate independently. In this paper the effects of interference and shorts between the address decoders of the two ports on the fault modeling ...
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A two-port memory contains two duplicated sets of address decoders which operate independently. In this paper the effects of interference and shorts between the address decoders of the two ports on the fault modeling are investigated. Fault models and their tests are introduced, together with the test strategy.
Temporal load-balancing - "spreading out" the executions of tasks over time - is desirable in many applications. A form of temporal load-balancing is discussed: scheduling to maximize minimum global inter-co...
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Temporal load-balancing - "spreading out" the executions of tasks over time - is desirable in many applications. A form of temporal load-balancing is discussed: scheduling to maximize minimum global inter-completion time (MGICT-scheduling). It is shown that MGICT-scheduling is, in general, NP-hard. A number of restricted classes of task systems are identified, which can be efficiently MGICT-scheduled.
In asynchronous transfer mode (ATM) networks, when cells are lost due to congestion, packets containing the lost cells should be retransmitted in the transport layer, which manages the end-to-end communication. The pr...
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This paper proposes an intelligent support method for solving arithmetic word problems and a method to build a learning environment on a network. Our system solves arithmetic word problems written in Japanese in the s...
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This paper presents the design and implementation of a new analog real-time color space converter using off-the-shelf chips, which performs the transformation of the RGB color coordinates, obtained from a color sensor...
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This paper presents the design and implementation of a new analog real-time color space converter using off-the-shelf chips, which performs the transformation of the RGB color coordinates, obtained from a color sensor, to the RGB normalized color coordinates. The RGB color coordinates are relatively insensitive to light intensity variations, hence contributing to simplified segmentation. The module is intended to be used as the front end of color machine vision systems in inspection tasks and in autonomous applications, where the need for short processing times is crucial. Experimental results exhibiting the usefulness of the proposed color space converter are also presented. (C) 1997 Academic Press Limited.
An efficient algorithm for determination of the largest empty figure that can be placed between a set of sites on a plane and its VLSI implementation are presented in this paper. The proposed algorithm is based on the...
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An efficient algorithm for determination of the largest empty figure that can be placed between a set of sites on a plane and its VLSI implementation are presented in this paper. The proposed algorithm is based on the Voronoi diagram in the rho 1 metric which is established through the time evolution of 2-Dimensional Cellular Automata. The proposed algorithm is fast and efficient, and the 2-Dimensional Cellular Automaton architecture presented in this paper achieves a high frequency of operation. A Von-Neumann neighbourhood processor was implemented on a single VLSI chip using a 1.2 mu m Double Layer Metal CMOS technology.
A detailed comparison between pseudo-random number generators (PRNGs) based on cellular automata (CA) and linear feedback shift registers (LFSRs) is presented in this paper. Various statistical tests have been applied...
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A detailed comparison between pseudo-random number generators (PRNGs) based on cellular automata (CA) and linear feedback shift registers (LFSRs) is presented in this paper. Various statistical tests have been applied in order to reveal the advantages and disadvantages of both approaches. Both LFSRs and hybrid additive cellular automata (HACA) produce satisfactory PRNGs. HACA operate at higher speeds than LFSRs with the same characteristic polynomials. Regarding the silicon area, direct comparisons between the two approaches cannot be made since it depends on the PRNG length. However, the inherent modularity of HACA reduces the silicon area occupied by them and, when long feedback paths are used, the silicon area occupied by LFSRs increases. (C) 1997 Elsevier Science B.V.
Firstly we show a useful property of the fast algorithm for computing linear complexities of p-ary periodic sequences with period p(n) (p: a prime). Secondly the property is successfully applied to obtain the value di...
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Firstly we show a useful property of the fast algorithm for computing linear complexities of p-ary periodic sequences with period p(n) (p: a prime). Secondly the property is successfully applied to obtain the value distribution of the linear complexity for p-ary periodic sequences with period p(n).
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