We consider the model checking problem for probabilistic pushdown automata (pPDA) and properties expressible in various probabilistic logics. We start with properties that can be formulated as instances of a generaliz...
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We consider the model checking problem for probabilistic pushdown automata (pPDA) and properties expressible in various probabilistic logics. We start with properties that can be formulated as instances of a generalized random walk problem. We prove that both qualitative and quantitative model checking for this class of properties and pPDA is decidable. Then, we show that model checking for the qualitative fragment of the logic PCTL and pPDA is also decidable. Moreover, we develop an error-tolerant model checking algorithm for general PCTL and the subclass of stateless pPDA. Finally, we consider the class of properties definable by deterministic Buchi automata, and show that both qualitative and quantitative model checking for pPDA is decidable.
This work presents a formal Petri net-based approach to behaviour modeling for mobile agent systems. Generic agent templates, formalized in Petri net semantics, are proposed to model the components of a distributed mo...
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This work presents a formal Petri net-based approach to behaviour modeling for mobile agent systems. Generic agent templates, formalized in Petri net semantics, are proposed to model the components of a distributed mobile agent system. A generic agent template is conceptualized as an entity consisting of a set of actions, a set of rules which govern the agent communications and an event that captures the agent migration. The communication rules determine the Petri net structures which act as connectors in the proposed approach. The behaviour of the mobile agent is linked to both architectural and structural specifications based on system requirements. After providing certain formal definitions we present a theoretical formal model for designing and describing the behaviour of mobile agent systems for distributed asynchronous applications. It supports formal reasoning based on Petri nets.
This paper illustrates a formal technique for describing timing properties and resource constraints of pipelined out of order superscalar processor instructions at a high level. The degree of parallelism depends on th...
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Signal transition graphs (STGs) are one of the most popular models for the specification of asynchronous circuits. A STG can be implemented if it admits a so-called consistent and complete binary encoding. Checking th...
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Signal transition graphs (STGs) are one of the most popular models for the specification of asynchronous circuits. A STG can be implemented if it admits a so-called consistent and complete binary encoding. Checking this is EXPSPACE-hard for arbitrary STGs, and so a lot of attention has been devoted to the subclass of free-choice STGs, which offers a good compromise between expressive power and analyzability. In the last years, polynomial time synthesis techniques have been developed for free-choice STGs, but they assume that the STG has a consistent binary encoding. The first polynomial algorithm for checking consistency is presented here.
We present a generic aproach to the static analysis of concurrent programs with procedures. We model programs as communicating pushdown systems. It is known that typical dataflow problems for this model are undecidabl...
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The paper develops novel bounded model checking (BMC) techniques for labeled transition systems. The aim is to increase the efficiency of BMC by exploiting the inherent concurrency in the product of LTSs in order to c...
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This paper is about the tool-suite MOTOR that supports the modeling and analysis of Modest specifications. In particular, we discuss its tool architecture, and the implementation details of the tool components that do...
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We describe an implementation of a Java program to perform automated deduction in propositional multi-modal logics on a Java smart card. The tight space limits of Java smart cards make the implementation non-trivial. ...
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