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A COMPATIBLE CMOS-JFET PULSE DENSITY MODULATOR FOR INTERPOLATIVE HIGH-RESOLUTION A/D CONVERSION

IEEE JOURNAL OF SOLID-STATE circuits 1986年第3期21卷 446-452页

作者： ROETTCHER, U FIEDLER, HL ZIMMER, G Fraunhofer Institute of Microelectronic Circuits and System Duisburg Germany

The analog part of a high-resolution A/D converter has been integrated in a compatible CMOS-JFET technology. The circuit, which forms a pulse-density modulator (PDM), can be operated at sample rates up to 12 MHz and r... 详细信息

关键词： Pulse modulation Noise shaping Quantization Filters Integrated circuit technology CMOS technology Baseband Phase change materials Clocks Digital modulation

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A SELF-CALIBRATION METHOD FOR FAST HIGH-RESOLUTION A/D AND D/A CONVERTERS

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IEEE JOURNAL OF SOLID-STATE circuits 1989年第3期24卷 603-608页

作者： MANOLI, Y Fraunhofer Institute of Microelectronic Circuits and System Duisburg Germany

Monolithic analog-to-digital (A/D) and digital-to-analog (D/A) converters suffer from the limited accuracy of the available circuit compensators. A self-calibration method allows the correction of the linearity errors of binary-weighted current-source arrays commonly used in high-speed converters. To achieve high-calibration accuracy a modified dual-slope method is used. This makes it possible to implement A/D and D/A converters with a resolution of 14 b or more at a conversion time of less than 15 mu s.< >

关键词： Calibration Linearity Error correction Voltage Switches Capacitors Signal resolution Thermal stresses Counting circuits

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DESIGN AND APPLICATIONS OF TUNABLE ANALOG BICMOS circuits

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IEEE JOURNAL OF SOLID-STATE circuits 1992年第7期27卷 1101-1104页

作者： FICHTEL, J HOSTICKA, BJ SCHARDEIN, W Fraunhofer Institute of Microelectronic Circuits and System Duisburg Germany

In this communication we discuss the design, merits, and applications of tunable BiCMOS circuits. Although the BiCMOS technology offers higher design flexibility due to the presence of more types of active devices than the standard CMOS or bipolar technologies, it is also costlier. Hence, its use can be justified only if the salient features of BiCMOS are taken advantage of adequately. The presented work discusses one possible approach that cannot be easily and economically duplicated in other technologies.

关键词： BiCMOS Electric circuits Hence bipolar technology active device BiCMOS technology

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A MONOLITHIC FIELD SEGMENT PHOTO SENSOR system

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IEEE JOURNAL OF SOLID-STATE circuits 1995年第7期30卷 807-811页

作者： KAUERT, R BUDDE, W KALZ, A Fraunhofer Institute of Microelectronic Circuits and System Dresden Germany

This contribution describes a fully integrated field segment photo sensor for use in single lens reflex cameras. It supplies measurement data from five segments and the integral value via a standard interface io the camera processor. Individual calibration data of each sensor is stored In an on-chip EEPROM. The IC has been manufactured in a standard CMOS technology. The sensor operates over more than six decades of illumination to below 1 mlux. It represents an example of complex smart sensor integration.

关键词： Sensor systems Intelligent sensors Cameras CMOS technology Sensor phenomena and characterization Lenses Measurement standards Calibration EPROM CMOS integrated circuits

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REALIZATION OF A DPCM CODER FOR 13.5-MHZ SAMPLING RATE IN CMOS TECHNOLOGY

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IEEE JOURNAL OF SOLID-STATE circuits 1987年第6期22卷 1196-1197页

作者： ROTHERMEL, A Fraunhofer Institute of Microelectronic Circuits and System Duisburg Germany

A DPCM (differential pulse-code modulation) coder integrated in a 2-/spl mu/m CMOS technology is discussed. The motivation was to introduce low-cost coders for video signals compatible with the planned European ISDN. Due to the internal feedback loop, the main problem was to achieve the required operating speed of 13.5 MHz sampling rate. Measurements of fabricated samples proved that the expected performance was achieved.

关键词： CMOS technology Sampling methods Adders Programmable logic arrays ISDN Feedback loop Frequency Signal resolution Phase change materials Circuit testing

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A 16/spl times/16 nonvolatile programmable analog vector-matrix multiplier

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IEEE Journal of Solid-State circuits 1998年第10期33卷 1502-1509页

作者： A. Aslam-Siddiqi W. Brockherde B.J. Hosticka Fraunhofer Institute of Microelectronic Circuits and System Duisburg Germany

In this paper, we present a 16/spl times/16 analog vector-matrix multiplier with analog electrically erasable and programmable read-only memories (EEPROMs) used as nonvolatile storage for the weight matrix values. Each weight matrix value is stored in an EEPROM transistor as a change of the threshold voltage, and the same EEPROM transistor is used for the multiplication by utilizing the square-law characteristic of the metal-oxide-semiconductor field-effect transistor. This allows a very simple circuit for the multiplier array with a size of about 1/spl times/1 mm/sup 2/. The vector-matrix multiplier has been fabricated in a 1,5-/spl mu/m single-poly complementary metal-oxide-semiconductor/EEPROM technology and successfully tested.

关键词： EPROM Nonvolatile memory FETs Capacitors PROM circuits Voltage Silicon Programming profession Image storage

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Microwave wideband amplifiers in bulk-CMOS and CMOS/SIMOX technologies

Microwave wideband amplifiers in bulk-CMOS and CMOS/SIMOX te...

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IEEE International Conference on Solid-State circuits (ISSCC)

作者： R. Kokozinski W. Barthel W. Brockherde W. Budde B. Hosticka G. Zimmer Fraunhofer Institute of Microelectronic Circuits and System Duisburg Germany Fraunhofer Institute of Microelectronic Circuits and System Dresden Germany

This paper investigates the feasibility of realization of analog microwave circuits in submicron CMOS technologies, particularly in bulk-CMOS and CMOS/SIMOX. The investigation concentrates on implementation of wideban... 详细信息

关键词： CMOS technology Broadband amplifiers Microwave technology Voltage Microwave amplifiers Current measurement Solid state circuits Frequency Variable structure systems Microwave measurements

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Noise-power Trade-off In CMOS-G/sub M/-C Channel Select Filters

Noise-power Trade-off In CMOS-G/sub M/-C Channel Select Filt...

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International Conference on Mixed Design of Integrated circuits and systems (MIXDES)

作者： N. Christoffers T. Fedtschenko T. Stucke R. Kokozinski S. Kolnsberg Fraunhofer Institute of Microelectronic Circuits and System Germany

The channel selection in direct-downconversion receivers can be performed using analog or digital filters or a combination of both. For an appropriate partitioning in early design phase knowledge about the power-performance tradeoffs of the building blocks is necessary without knowledge about too many implementation details. This paper proposes a method to carry out the noise-power trade-off of analog G m -C filters. For a particular example where the demand on adjacent channel rejection is very high it is shown that the analog solution is very promising when compared to the digital channel selection

关键词： Filters Energy consumption Linearity Transconductors Voltage Transconductance Sampling methods Frequency Bandwidth circuits

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An adaptive filter for two-dimensional Gabor transformation

An adaptive filter for two-dimensional Gabor transformation

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1992 International Conference on Image Processing and its Applications

作者： A. Teuner B.J. Hosticka Fraunhofer Institute of Microelectronic Circuits and System Germany

An adaptive filter for computation of the Gabor transformation of images is presented. The filter design is based on the LMS algorithm for complex signals. A significant simplification of the filter structure and the use of FFT algorithms lead to a very fast and efficient computation of the coefficients when compared with known algorithms. Further, computer simulations indicate that sufficient precision and a fast convergence of the coefficients can be obtained.< >

关键词： Adaptive filters Image processing

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A Highly Flexible ROM Generator for BiCMOS Technology

A Highly Flexible ROM Generator for BiCMOS Technology

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European Conference on Solid-State circuits (ESSCIRC)

作者： W. Schardein R. Wittmann B. Hosticka W. Eber B. Weghaus Fraunhofer Institute of Microelectronic Circuits and System Duisburg Germany

This paper describes a highly flexible design rule independent ROM generator for BiCMOS technology with full CAD support for compilation, verification, simulation, and documentation. The flexibility is mainly achieved by a quantization of the memory space by steps of only one word and by the option of an arbitrary aspect ratio of the ROM matrix. Special BiCMOS circuits have been developed for speed optimization and integrated in the CAD tool. An overview on the design flow is given.

关键词： Read only memory BiCMOS integrated circuits Space technology MOS devices Decoding Design automation CMOS technology Voltage Transconductance Delay

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