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Towards to Characterization of Network Management Traffic in OpenStack-Based Clouds

SN Computer Science 2023年第5期4卷 450页

作者： Donatti, Adnei W. Miers, Charles C. Koslovski, Guilherme P. Pillon, Maurício A. Carvalho, Tereza C. M. B. Graduate Program in Electrical Engineering Escola Politécnica da Universidade de São Paulo São Paulo 05508-010 Brazil Graduate Program in Applied Computing Santa Catarina State University Joinville 89219-710 Brazil

OpenStack is versatile and popular, allowing full customization for creating private or public IaaS clouds. This work addresses a network traffic analysis and characterization for the management domain inside OpenStack clouds. We conduct an induced lifecycle to execute virtual machine (VM)-related tasks, measure the traffic, and identify the services behind the traffic generated by these operations. Also, we analyze the impact of different images of operating systems (OSs) and VM’s flavor in the measured traffic. Moreover, we observe that predicting the volume of network traffic from operations, such as creation and shelving instances of VMs, helps estimate bandwidth boundaries, avoiding bottlenecks, for example. © 2023, The Author(s), under exclusive licence to Springer Nature Singapore Pte Ltd.

关键词： Characterization Network traffic OpenStack Virtual machine VM

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A Low-Power Level-2 Discrete Haar Wavelet Transform with Approximate Adders for ECG Signal

A Low-Power Level-2 Discrete Haar Wavelet Transform with App...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Henrique Seidel Morgana da Rosa Rodrigo Lopes Eduardo da Costa Rafael Soares Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798331522124

ISBN: (纸本)9798331522131

We present an energy-efficient implementation of the level-2 Pruned Discrete Haar Wavelet Transform (PDHWT-2) for R-peak detection in ECG signals. Approximate computing techniques were employed, including five well-established approximate adders (AxPPA, COPY, ETA-I, LOA, and Trunc) and bit truncation (T), to reduce energy consumption while maintaining accuracy above 99% for reliable R-peak detection. By focusing on the second-level detail coefficient $(D_{2})$ for peak detection and pruning the approximation coefficient, the PDHWT-2 design achieves significant reductions in computational complexity. The architecture, evaluated with ECG signals from the MIT-BIH database, maintained accuracy above 99% even with aggressive bit truncation and approximation, ensuring reliable medical-grade analysis. Integration of approximate adders (AxAs) and truncation enabled significant power and area savings. Specifically, the use of the AxPPA demonstrated power savings of up to 40% with area reductions of around 45%, making the PDHWT-2 a highly efficient solution for low-power ECG monitoring systems.

关键词： Accuracy Approximate computing Transforms Computer architecture Electrocardiography Energy efficiency Discrete wavelet transforms Reliability Adders Monitoring

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Exploring Approximate Adders for Accuracy- and Energy-Quality VLSI Watermarking Systems Design

Exploring Approximate Adders for Accuracy- and Energy-Qualit...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Morgana da Rosa Eduardo da Costa Rafael Soares Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798331522124

ISBN: (纸本)9798331522131

Approximate computing (AxC) has emerged as a viable alternative to enhance computational efficiency by leveraging the intrinsic error resilience of many applications. One of the leading strategies of AxC involves exploring different approximation adder (AxA) configurations as a viable form of reducing power consumption in many applications. This work explores the use of AxAs in a hybrid watermarking technique that combines discrete Haar-Wavelet (DHWT) and discrete cosine transforms (DCT). The proposed hybrid method, HyDHWCT, integrates these transforms to improve robustness and imperceptibility in watermarking systems while optimizing for energy efficiency. We evaluate the performance of various AxAs, including Copy, ETA, LOA, Truncation (Trunc), VLSPPAs, and the AxPPA, regarding energy consumption, circuit area, and error resilience. Our results demonstrate that the AxPPA-based HyDHWCT offers superior accuracy and energy-quality trade-offs over other state-of-the-art AxAs. Specifically, the AxPPA on HyDHWCT with K = 1 achieves up to 72.85% energy savings and 88.32% area savings compared to the exact HyDHWCT while maintaining high accuracy, with a normalized cross-correlation (NC) of 0.9949 and a structural similarity (SSIM) of 0.9920 for the extracted watermark. These results make the AxPPA-based HyDHWCT a highly effective solution for robust and energy-efficient watermarking systems.

关键词： Energy consumption Accuracy Energy conservation Watermarking DH-HEMTs Energy efficiency Robustness Discrete cosine transforms Adders Resilience

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Exploring Approximate Adders for Energy-Efficient Discrete Walsh-Hadamard Transform

Exploring Approximate Adders for Energy-Efficient Discrete W...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Leonardo Antonietti Rodrigo Lopes Morgana da Rosa Eloisa Barros Eduardo da Costa Rafael Soares Graduate Program on Computing - Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798331522124

ISBN: (纸本)9798331522131

This work investigates the use of the Discrete Walsh-Hadamard Transform (DWHT) for cryptographic applications, particularly within resource-constrained environments like microcontrollers such as RISC-V. DWHT's use of adder and subtractor arithmetic operations makes it highly suitable for low-complexity algorithms. In order to enhance efficiency further, our work integrates various approximate adders (AxAs) such as AxPPA, COPY, ETA-I, LOA, and Trunc into both forward (DWHT) and inverse (IDWHT) transform architectures. Our approach outperforms existing methods from the literature regarding accuracy metrics, particularly for lower approximation levels $(K=1\ \text{to}\ K=3)$ , with substantial improvements in PSNR and SSIM. Additionally, our designs significantly reduce power and area compared to existing hardware implementations, show-casing their potential for deployment in real-world cryptographic and hardware security applications.

关键词： Measurement Accuracy Microcontrollers Circuits and systems Hardware security Transforms Energy efficiency Encryption Adders Arithmetic

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Ubiquitous computing in light of human phenotypes: foundations, challenges, and opportunities

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Journal of Ambient Intelligence and Humanized computing 2023年第3期14卷 2341-2349页

作者： Bavaresco, Rodrigo Simon Barbosa, Jorge Luis Victória Applied Computing Graduate Program - PPGCA University of Vale do Rio dos Sinos - UNISINOS Av. Unisinos São Leopoldo Rio Grande do Sul93.022-000 Brazil

The interest in human phenotypes has leveraged interdisciplinary efforts encouraging a better understanding of the broad spectrum of psychological and behavioral disorders. Moreover, the usage of mobile and wearable devices along with unobtrusive computational capabilities provides an extensive amount of information that allows the characterization of phenotypes. This article describes the human phenotype through the lens of computational range and reviews state-of-the-art computational phenotyping. Furthermore, the article discusses computational phenotyping’s extension concerning the combination of intelligent environments and personal mobile devices, addressing technical, managerial, and ethical challenges. This combination reinforces ubiquitous computational capabilities for phenotyping as a facilitator of interdisciplinary information convergence in favor of clinical and biomedical research. © 2022, The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature.

关键词： Wearable technology

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GPU Acceleration of MIP Intra Prediction in VVC 31

GPU Acceleration of MIP Intra Prediction in VVC

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31st European Signal Processing Conference, EUSIPCO 2023

作者： Storch, Iago Roma, Nuno Palomino, Daniel Bampi, Sergio Graduate Program in Computing Institute of Informatics Federal University of Rio Grande do Sul Porto Alegre Brazil Lisboa Portugal Instituto Superior Técnico Universidade de Lisboa Lisboa Portugal Federal University of Pelotas Graduate Program in Computing Video Technology Research Group Pelotas Brazil

ISBN: (纸本)9789464593600

The Versatile Video Coding (VVC) standard introduced several novel encoding tools for intra frame prediction, increasing the encoder complexity when compared to previous standards. Among these novelties is the MIP tool, whose acceleration has not been tackled in the literature. Therefore, an efficient parallelization of MIP prediction targeting GPU platforms is now proposed. The presented technique makes use of alternative reference samples and computes the distortion in an approximate manner to expose and potentiate massive parallelism. Moreover, the adopted prediction scheduling and memory communication were tailored by considering the GPUs' architecture and memory hierarchy. When compared with a CPU execution, this work is capable to accelerate the MIP prediction up to 105 times at the cost of a negligible coding efficiency loss of 0.284% BD-BR. © 2023 European Signal Processing Conference, EUSIPCO. All rights reserved.

关键词： Graphics processing unit

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Hidden Things and Implicit Interaction: Looking Back on How Invisibility Evolved as a Quality-In-Use Attribute 22

Hidden Things and Implicit Interaction: Looking Back on How ...

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21st Brazilian Symposium on Human Factors in computing Systems, IHC 2022

作者： De Souza Filho, José Cezar Sampaio, Andréia Libório Feitosa, Eduardo Luzeiro Institute of Computing Federal University of Amazonas Manaus Brazil Graduate Program in Computing Federal University of Ceará Quixadá Brazil

ISBN: (纸本)9781450395069

Invisibility in Ubiquitous computing (UbiComp) and Internet of Things (IoT) systems refers to the merge of technology in the environment or the interaction workload decrease so that users can focus on their daily activities. It has been a fundamental attribute for these systems since the UbiComp advent and has received different names and definitions over time. However, there is a lack of retrospective studies investigating how these perspectives contributed to the current concept of Invisibility. Therefore, this paper aims to understand how Invisibility evolved as a quality-in-use attribute. We applied the snowballing method to search for literature evidence about the attributes and interaction evaluation approaches related to Invisibility. We identified eight related attributes: Intelligibility, Accuracy, Control, Customization, Non-obtrusiveness, Diffusion, Transparency, and Understandability. Also, we observed that the existing evaluation approaches consider only part of these attributes. Our findings suggest opportunities to improve the approaches and for future research. © 2022 ACM.

关键词： Internet of things

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AxRSU- : Higher-Order m-Bit Approximate Encoders for Radix- Squarer Units

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Circuits, Systems, and Signal Processing 2024年第6期43卷 1-30页

作者： da Rosa, Morgana M. A. Paim, Guilherme da Costa, Eduardo A. C. Soares, Rafael Bampi, Sergio Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program in Microelectronics Federal University of RGS Porto Alegre Brazil Graduate Program in Electronics and Computer Engineering Catholic University of Pelotas Pelotas Brazil

Approximate computing has emerged as a design alternative to enhance design efficiency by capitalizing on the inherent error resilience observed in numerous applications. Various error-resilient and compute-intensive applications, such as signal, image and video processing, computer vision, and supervised machine learning, necessitate dedicated hardware accelerators for mean squared error estimation during runtime. In these application domains, using efficient arithmetic operators, particularly a squarer unit, represents one of the most effective strategies for low-power design. This work introduces an approximate Radix- $$2^{m}$$ squarer unit, denoted as AxRSU- $$2^{m}$$ . The proposed squarer unit employs m-bit approximate encoders to execute operations on m-bit data concurrently. The AxRSU- $$2^{m}$$ under consideration explores encoders with m equal to 2 (AxRSU-4), 3 (AxRSU-8), and 4 (AxRSU-16). These approximate encoders exhibit low complexity and diminish the necessary partial products operating on m bits simultaneously, thereby substantially enhancing energy efficiency and reducing circuit area in the AxRSU- $$2^{m}$$ . To illustrate the trade-off between error and quality in the AxRSU- $$2^{m}$$ , we apply it to an SSD (sum squared difference) hardware accelerator designed for video processing, with a square-accumulate serving as a case study. Our findings reveal a novel Pareto front, presenting eight optimal AxRSU- $$2^{m}$$ solutions that achieve accuracy levels ranging from 3.76 to 75.53%. These solutions yield energy savings ranging from 46.20 to 95.57% and circuit area reductions ranging from 37.68 to 66.73%.

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A Power-Efficient VLSI Multiplier Design Employing Radix-2m Squarer Unit and Adder Compressor

A Power-Efficient VLSI Multiplier Design Employing Radix-2m ...

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IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Leonardo Antonietti Morgana Da Rosa Rodrigo Lopes Eduardo Da Costa Rafael Soares Graduate Program on Computing - Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798350377200

ISBN: (纸本)9798350377217

Multipliers are pivotal in numerous applications, including digital signal processing, image processing, and video processing. Nonetheless, their operation substantially increases power consumption for these applications. Therefore, applying strategies that can reduce power in this arithmetic operator is paramount. This paper presents a novel approach to optimize arithmetic units, focusing on multiplier units, through the integration of the Radix- $2^{m}$ squarer unit (RSU) and 4–2 adder/subtractor compressor (AC). Compared to the state-of-the-art, the proposed multiplier unit, termed MRSU (multiplier unit RSU-based), offers significant area-and energy-savings. The synthesis results show remarkable improvements in the MRSU Dadda 4–2 architecture, which achieves 14.35× more energy-savings for 8 bits, 4.87× for 16 bits, and 2.22× for 32 bits compared to the multiplier unit automatically selected by the logic-synthesis tool. Furthermore, compared to the Booth multiplier with the Dadda compression tree, MRSU Dadda 4–2 exhibits 1.67× more energy-savings for 8 bits, 1.93× for 16 bits, and 1.95× for 32 bits.

关键词： Image coding Power demand Focusing Digital signal processing Computer architecture Very large scale integration Energy efficiency Electronic circuits Adders Arithmetic

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Traffic Sign Classification based on Deep Learning

Traffic Sign Classification based on Deep Learning

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2023 IEEE International Conference on Automatic Control and Intelligent Systems, I2CACIS 2023

作者： Hongxing, Tian Caballero, Jonathan M. Hernandez, Alexander A. Technological University of the Philippines Graduate Program and External Studies Manila Philippines National University College of Computing and Information Technologies Manila Philippines

ISBN: (纸本)9798350321302

In the context of 5G communication, technologies such as the Internet of Things, big data, and supercomputers have been further developed, and artificial intelligence technology has also become one of the hot topics at present. In recent years, the image recognition technology of artificial intelligence has been pursued by most academic enthusiasts and has been rapidly developed. With the development of computer vision, a series of target detection algorithms have emerged in recent years. This paper classifies traffic signs based on the target detection algorithm of YOLOv5 and make use of the advantages of the accuracy and real-time performance of the YOLO algorithm. To restore the real traffic scene, different shooting angles and different shooting locations are prepared as data sets. Finally, to realize the detection and recognition of traffic signs and optimize the algorithm to improve the recognition rate. © 2023 IEEE.

关键词： Traffic signs

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