检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

73 篇 会议
33 篇 期刊文献

馆藏范围

106 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

44 篇 工学
- 12 篇 电子科学与技术（可...
- 9 篇 计算机科学与技术...
- 8 篇 核科学与技术
- 8 篇 软件工程
- 7 篇 动力工程及工程热...
- 7 篇 电气工程
- 5 篇 信息与通信工程
- 3 篇 机械工程
- 3 篇 控制科学与工程
- 3 篇 航空宇航科学与技...
- 2 篇 光学工程
- 2 篇 生物医学工程（可授...
- 1 篇 仪器科学与技术
- 1 篇 材料科学与工程（可...
- 1 篇 土木工程
- 1 篇 轻工技术与工程
- 1 篇 生物工程
28 篇 理学
- 15 篇 物理学
- 10 篇 数学
- 3 篇 天文学
- 3 篇 地球物理学
- 3 篇 地质学
- 1 篇 生物学
6 篇 管理学
- 5 篇 管理科学与工程(可...
- 3 篇 工商管理
4 篇 医学
- 4 篇 基础医学(可授医学...
- 4 篇 临床医学
- 1 篇 公共卫生与预防医...
2 篇 法学
- 2 篇 社会学
1 篇 教育学
- 1 篇 教育学

主题

30 篇 adders
27 篇 computer archite...
18 篇 hardware
13 篇 energy efficienc...
9 篇 gravitational wa...
9 篇 very large scale...
9 篇 power dissipatio...
9 篇 accuracy
8 篇 compressors
7 篇 logic gates
7 篇 transforms
7 篇 measurement
5 篇 optimization
5 篇 energy consumpti...
5 篇 electrocardiogra...
5 篇 gravitational wa...
5 篇 standards
4 篇 tools
4 篇 approximation al...
4 篇 video coding

机构

27 篇 graduate program...
15 篇 institute for pl...
15 篇 indian institute...
14 篇 university of so...
13 篇 université libre...
12 篇 department of as...
12 篇 scuola di ingegn...
12 篇 infn sezione di ...
12 篇 dipartimento di ...
12 篇 università degli...
12 篇 department of ph...
12 篇 infn trento inst...
12 篇 max planck insti...
12 篇 université paris...
12 篇 universiteit gen...
12 篇 gran sasso scien...
12 篇 european gravita...
11 篇 infn sezione di ...
11 篇 national tsing h...
11 篇 department of ph...

作者

35 篇 sergio bampi
22 篇 eduardo costa
22 篇 guilherme paim
15 篇 rafael soares
13 篇 eduardo da costa
12 篇 r. takahashi
12 篇 j. c. bayley
12 篇 k. komori
12 篇 t. kajita
12 篇 f. hellman
12 篇 m. kinley-hanlon
12 篇 t. mcrae
12 篇 a. parisi
12 篇 t. sawada
12 篇 s. rowan
12 篇 s. m. aronson
12 篇 v. p. mitrofanov
12 篇 g. moreno
12 篇 g. hemming
12 篇 p. fritschel

语言

101 篇 英文
5 篇 其他

检索条件"机构=Graduate Program in Electronic Engineering and Computing"

共 106 条记录，以下是11-20 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Exploring Approximate Adders for an Energy-Efficient Pre-Processing Pan-Tompkins Algorithm VLSI Design

Exploring Approximate Adders for an Energy-Efficient Pre-Pro...

引用

Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： Léo Ribeiro Morgana M. A. Rosa Rafael Soares Eduardo Costa Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798350391695

ISBN: (纸本)9798350391701

This work explores a set of approximate adders (COPY adder, error-tolerant adder - ETA, lower-part OR adder - LOA, truncation - Trunc, and approximate parallel prefix adder - AxPPA) to enhance a VLSI design for ECG signal preprocessing based on Pan-Tompkins algorithm (AxPTA) to improve energy efficiency and QRS complex detection. Validation with the MIT-BIH database confirms that the AxPTA design maintains excellent sensitivity and positive predictivity with reduced energy consumption and circuit area. The AxPTA with AxPPA achieves a 10.22% reduction in circuit size and saves 85.06% energy, with an acceptable 1.32% precision deviation. These results suggest that the AxPPA significantly boosts energy efficiency in the AxPTA design for ECG analysis, supporting the development of portable devices for continuous heart monitoring and cardiovascular disease prevention.

关键词： Energy consumption Sensitivity Databases Energy conservation Electrocardiography Very large scale integration Approximation algorithms Energy efficiency Adders System analysis and design

来源：评论

学校读者我要写书评

暂无评论

Evaluating the Resilience of the Approximate Parallel Prefix Adder (AxPPA) Against Hardware Trojan Horse Injection

Evaluating the Resilience of the Approximate Parallel Prefix...

引用

Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： Eloisa Barros Morgana M. A. Rosa Rodrigo Lopes Leonardo Antonietti Eduardo Costa Rafael Soares Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798350391695

ISBN: (纸本)9798350391701

Approximate computing (AxC) offers opportunities to enhance computing efficiency by exploiting inherent error resilience. This study examines the security implications of AxC, focusing on adders, where Hardware Trojan Horses (HTH) present significant risks. We propose a framework to inject HTH into approximate adders (AxAs), specifically the Approximate Parallel Prefix Adder (AxPPA), and assess their impact. The framework, implemented in MATLAB (code available at ***/MorganaMacedo/AxPPA_HTH), evaluates HTH injection into AxAs, analyzing error metrics (SSIM, NCC, MSE, MAE, and error-probability) and conducting logic-synthesis (LS) analysis to detect physical anomalies indicative of HTH presence. Our results demonstrate AxPPA’s resilience against HTH injection, with detection thresholds varying with approximation bit size. LS analysis shows AxPPA effectively detects HTHs across all bit approximations, outperforming LOA, particularly at K=16. AxPPA also achieves superior energy savings of 31.95% compared to LOA and notable area savings, highlighting its efficacy in HTH detection and performance optimization.

关键词： Measurement Hardware Trojan horses Security MATLAB Adders System analysis and design Optimization Resilience Testing

来源：评论

学校读者我要写书评

暂无评论

M-AxPPA: An Accurate and Energy-Efficient Modified Approximate Parallel Prefix Adder

M-AxPPA: An Accurate and Energy-Efficient Modified Approxima...

引用

IEEE International Conference on electronics, Circuits and Systems (ICECS)

作者： Rodrigo Lopes Morgana da Rosa Eduardo da Costa Rafael Soares Graduate Program on Computing - Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798350377200

ISBN: (纸本)9798350377217

This work introduces a combined version of approximate adders (AxAs), joining approximate parallel prefix adders (AxPPA) with other AxAs from the literature (COPY, Truncation - TRUNC, and lower-part OR adder - LOA). We call this approach M-AxPPA (modified approximate parallel prefix adder) and investigate three specific versions: M-AxPPA-COPY, M-AxPPA-TRUNC, and M-AxPPA-LOA. We evaluate 315 different configurations, comparing our novel M-AxPPA to other AxAs proposed in the literature. We present pseudocode examples and investigate the accuracy quality, incorporating metrics like SSIM, NCC, MAE, MRE, and MRED. Additionally, we perform a trade-off analysis between accuracy quality and logic synthesis outcomes, underscoring the advantages of our M-AxPPA, notably the outstanding accuracy achieved by M-AxPPA-LOA (approaching 100%), with a substantial energy-saving.

关键词： Measurement Accuracy Energy efficiency Logic Adders electronic circuits

来源：评论

学校读者我要写书评

暂无评论

AxMOD: VLSI Modular Reduction Design Exploring Approximate Arithmetic Units

AxMOD: VLSI Modular Reduction Design Exploring Approximate A...

引用

Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： Lourenço Mulling Morgana M. A. Rosa Rafael Soares Eduardo Costa Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798350391695

ISBN: (纸本)9798350391701

This work investigates the design of approximate arithmetic operator units used in the VLSI modular reduction (AxMOD) architecture. The AxMOD architecture herein proposed explores the following arithmetic operators: i) two approximate iterative-based fixed-point and Goldschmidt (GLD) dividers, ii) five approximate adders (AxA): COPY adder, error-tolerant adder (ETA), lower-part OR adder (LOA), truncation (Trunc), and approximate parallel prefix adder (AxPPA), and iii) five approximate multipliers of approximate radix-4 multiplier units (AxRMU), dynamic range unbiased multiplier (DRUM), rounding-based approximate (RoBA), truncated multiplier (Trunc), and the leading one-bit based approximate (LoBA). Our demonstration of AxMOD’s efficiency using approximate arithmetic operators from the Pareto-optimal front illustrates the area and power-quality trade-off. Our results reveal that in fixed-point arithmetic, AxRMU with K = 16 and Trunc adder with K = 8 deliver energy savings of up to 4.14× compared to the state-of-the-art.

关键词： Energy consumption Accuracy Energy conservation Power quality Very large scale integration Dynamic range Adders System analysis and design Fixed-point arithmetic

来源：评论

学校读者我要写书评

暂无评论

Accuracy-Exploration Model for Low-Energy and Gates-Free Approximate Adder Compressors

Accuracy-Exploration Model for Low-Energy and Gates-Free App...

引用

IEEE International Conference on electronics, Circuits and Systems (ICECS)

作者： Leonardo Antonietti Morgana da Rosa Eduardo da Costa Rafael Soares Graduate Program on Computing - Federal University of Pelotas (UFPel) Pelotas Brazil Gruduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798350377200

ISBN: (纸本)9798350377217

This paper proposes a model for accurately exploring approximate adder compressors (AxAC) utilizing gates-free logic. As case studies, we explore energy-efficient architectures of approximate 3–2 (Ax3-2), 4–2 (Ax4-2), and 5–2 (Ax5-2) adder compressors (AC), focusing exclusively on gates-free in the critical path. This model for the accuracy analysis of AxACs is essential for estimating the optimal arrangements with repetition (AR) of inputs that are the way outputs for these compressors. For instance, the exact 4–2 AC has five inputs (A, B, C, D, and Cin) and three outputs (Cout, Carry, and Sum). Specifically, the Ax3-2 AC generates nine possible architectural-space gates-free AR, the Ax4-2 AC generates 125, and the Ax5-2 AC generates 2, 401 possible output AR. To estimate all output AR, we implemented the accuracy-exploration model in Python. After identifying the best AR, we created a Pareto front addressing the trade-offs between accuracy, energy, and area. The Ax3-2, Ax4-2, and Ax5-2 proposals demonstrate substantial energy and area efficiency improvements while maintaining high accuracy.

关键词： Analytical models Accuracy Focusing Logic gates Compressors Energy efficiency Proposals Integrated circuit modeling Adders electronic circuits

来源：评论

学校读者我要写书评

暂无评论

Quality-Reconfigurable Approximate Multiplier Utilizing Select Leading One-Bit Blocks

Quality-Reconfigurable Approximate Multiplier Utilizing Sele...

引用

IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： João M. Bedin Pedro T. L. Pereira Rodrigo N. Wuerdig Eduardo Da Costa Sergio Bampi Graduate Program in Microelectronics (PGMicro) - Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil Graduate Program in Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9798331522124

ISBN: (纸本)9798331522131

Multipliers are essential for emerging technologies, as they are vital arithmetic circuits in many energy-efficient applications, such as digital signal processing and machine learning applications. Approximate multipliers (AxM) became an optimal option for applications in ASIC systems with error tolerance. This paper proposes to develop a run-time reconfigurable AxM with four approximation levels in a single circuit, evaluating accuracy and circuit metrics (e.g., circuit area, timing, and power consumption) based on the leading one-bit-based approximate (LoBA) multiplier. The results achieve a circuit area reduction of 52% less area and up to 27% less power consumption when compared with equivalent architecture based on LoBA state-of-art. Applying the proposed RLoBA to a normalized least mean square (NLMS) adaptive filter case study, we obtain 22.95% less power consumption using dynamic approximate level selection than the precise multiplier while maintaining the same accuracy level.

关键词： Measurement Power demand Accuracy Circuits Adaptive filters Machine learning Lead Timing Reconfigurable architectures Standards

来源：评论

学校读者我要写书评

暂无评论

Energy-Efficient Watermarking System Through Approximate Discrete Haar Wavelet Transform

Energy-Efficient Watermarking System Through Approximate Dis...

引用

IEEE International Conference on electronics, Circuits and Systems (ICECS)

作者： Thiago Rutz Morgana Da Rosa Rodrigo Lopes Eduardo Da Costa Rafael Soares Sergio Bampi Graduate Program on Computing - Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil

ISBN: (数字)9798350377200

ISBN: (纸本)9798350377217

This work introduces a low-energy-driven watermarking system that employs the approximate discrete Haar Wavelet transform (AxDHWT) to insert watermark images into host images. Our contribution involves developing an energy-efficient AxDHWT watermarking system in VLSI hardware. Additionally, we present a model implemented in MATLAB, incorporating probability theory for accuracy estimation, along with extensive testing conducted under diverse attack scenarios. Logic synthesis (LS) results show that the AxDHWT watermarking system demonstrates low power and reduces area cost, featuring ten fewer arithmetic circuits than the current state-of-the-art. Remarkably, our AxDHWT-based architecture showcases reductions of $1.33\times$ in area and $2.88\times$ in energy consumption compared to the state-of-the-art system.

关键词： Salt Transform coding Watermarking Transforms Very large scale integration Speckle Energy efficiency Discrete wavelet transforms Testing Arithmetic

来源：评论

学校读者我要写书评

暂无评论

An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units

An Energy-Efficient StEFCal VLSI Design with Approximate Squ...

引用

IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Morgana M. A. Da Rosa Patrícia Da Costa Guilherme Paim Eduardo Da Costa Rafael Soares Sergio Bampi Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Microelectronics Federal University of Rio Grande do Sul Porto Alegre Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas Pelotas Brazil

Approximate computing attempts to maximize area and energy savings for a trade-off between quality and efficiency. This paper investigates the approximate squarer and divider units in the calibration procedure for radio astronomy called StEFCal (Statistically Efficient and Fast Calibration). The StEFCal circuit uses two squarer units from the literature, i.e., radix-4 (AxRSU) and SquASH, and iterative-based Newton-Raphson (NR) and Goldschmid (GLD) dividers. We demonstrate the efficiency of StEFCal using the approximate arithmetic operators from the Pareto-optimal that show the area- and power-quality trade-off. The results show that using the AxRSU combined with the NR divider improves the Mean Square Error (MSE) by 4.24%, with 58x more energy saving than the state-of-the-art.

关键词： Radio astronomy Circuits and systems Power quality Mean square error methods Very large scale integration Approximation algorithms Energy efficiency

来源：评论

学校读者我要写书评

暂无评论

An Optimized VLSI Exponential Unit Design Exploring Efficient Arithmetic Operation Strategies

An Optimized VLSI Exponential Unit Design Exploring Efficien...

引用

IEEE International Conference on electronics, Circuits and Systems (ICECS)

作者： Patrícia Da Costa Morgana Da Rosa Rafael Soares Eduardo Da Costa Sergio Bampi Graduate Program on Microelectronics Federal University of Rio Grande do Sul Porto Alegre Brazil Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil Graduate Program on Microelectronics (PGMICRO) Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil

This work presents an optimized exponential function VLSI hardware design by Taylor series expansion. The proposed architecture implements the exponential by approximating the logic design of a 4 th -order Taylor series and explores efficient CMOS arithmetic operation strategies. It implements a shift-based divider and explores an efficient 4-2 adder compressor in the adder tree. The proposal with a −7 to 11 input values range shows an output error of around 2% of MRED with a reduced energy consumption of 3.63 pJ/operation for 32-bit output. For a 64-bit output, the energy per operation of the VLSI exponential unit is 14.97pJ/op, being able to process a more comprehensive input range (i.e., −14 to 22) for a negligible mean output error of around 1.7% of MRED.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Exploring Security Threats by Hardware-Faults in Approximate Arithmetic computing

Exploring Security Threats by Hardware-Faults in Approximate...

引用

Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS)

作者： Morgana M. A. Da Rosa Eduardo A. C. Da Costa Rafael I. Soares Sergio Bampi Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil PPGC & PGMICRO - Informatics Institute Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil

Approximate computing (AxC) emerged as a design alternative to boost design efficiency by leveraging the inherent error resiliency of many applications. Recent literature shows attackers could exploit some AxC mechanisms to create new attack surfaces. This work proposes integrity checking and exclusive logic-based methods detect attacks by hardware faults on AxC systems. During ASIC-based synthesis, we investigate the security vulnerabilities of the Approximate Parallel Prefix Adder (AxPPA). We compare the expected output of the designer with the output netlists of ASIC-based synthesis. We propose a verification methodology consisting of a golden model (GM) described in a Simulink model and the DUT represented at the netlist level in a standard cell library after logic synthesis. Experimental results show that the AxPPA has an error range of 1.263 × 10 −5 to 0.0098 concerning the designer’s expected output under ASIC-based synthesis attacks.

关键词：

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共11页 << < 1 2 3 4 5 6 7 8 9 10 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：