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Assistive technology with device for self-inflating bag in neonatology

Research on Biomedical engineering 2025年第2期41卷

作者： Marcelino, Ana Carolina Rodovanski, Giovana Pascoali Bonetti, Karoline Panes, Caio Rabinovich de Almeida Martins, Fernando Moran, Cristiane Aparecida Araranguá Brazil Graduate Program in Neurosciences and Behavior Department of Experimental Psychology of the Institute of Psychology-University of São Paulo Sao Paulo Brazil Araranguá Brazil Computer Engineering Instituto Mauá de Tecnologia São Caetano do Sul Brazil Electronic Engineering and Computing with Emphasis on Electronic Devices and Systems at Instituto Tecnológico de Aeronáutica–ITA São Caetano do Sul Brazil Department of Physiotheraphy and at the Postgraduate Program in Rehabilitation Science of the Federal University of Santa Catarina-UFCS Ararangua Brazil

Purpose: The objectives of this study were to create a device with technological development of the self-inflating bag (SIB) equipment to measure the variables tidal volume, peak inspiratory pressure, and inspiratory flow and to evaluate the knowledge of undergraduate students in handling the SIB. To reduce the risks of mortality, length of hospital stay, and infections, SIB is a resource used to ventilate the patient through the inflation of the device, but it is not capable of measuring the ventilatory parameters. Excess ventilation and incorrect handling of the bag can cause lung injury in newborns. Therefore, measuring these parameters can prevent lung injury resulting from inadequate ventilation. Method: This is a cross-sectional and experimental study, with the development of a device SIB that allows the evaluation of variables of neonatal respiratory mechanics that were tested with an artificial lung. It was approved by the Research Ethics Committee and the research was developed in three stages: the first represents the search for scientific articles for the consensus of neonatal ventilatory variables for the construction of the SIB parameters;the second stage depicts the technological development of a device capable of monitoring such variables through the SIB. In the third stage, the content validation of the device with the handling of the SIB was carried out by students of medicine and physiotherapy courses of Brazil. Results: In this work, a device that analyzes the values of the main ventilatory parameters in neonatology was developed and to generate a safety range for the use of the device, curves with a tolerance of 10% up and down were created. All electronic components were coupled to the equipment, with a display that transmits the parameter values. The web page can be used on a cell phone, tablet, computer, or SmartTv, as long as it is connected to the "RespiratorIoT_AP" network. Among the 29 participants in the study, 8 said they were familiar w

关键词： Students

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Supervised Score-Based Modeling by Gradient Boosting

arXiv

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arXiv 2024年

作者： Zhao, Changyuan Du, Hongyang Liu, Guangyuan Niyato, Dusit College of Computing and Data Science Nanyang Technological University Singapore CNRS@CREATE 1 Create Way # 08-01 Create Tower 138602 Singapore Department of Electrical and Electronic Engineering University of Hong Kong Hong Kong The Energy Research Institute @ NTU Interdisciplinary Graduate Program Singapore

Score-based generative models can effectively learn the distribution of data by estimating the gradient of the distribution. Due to the multi-step denoising characteristic, researchers have recently considered combining score-based generative models with the gradient boosting algorithm, a multi-step supervised learning algorithm, to solve supervised learning tasks. However, existing generative model algorithms are often limited by the stochastic nature of the models and the long inference time, impacting prediction performances. Therefore, we propose a Supervised Score-based Model (SSM), which can be viewed as a gradient boosting algorithm combining score matching. We provide a theoretical analysis of learning and sampling for SSM to balance inference time and prediction accuracy. Via the ablation experiment in selected examples, we demonstrate the outstanding performances of the proposed techniques. Additionally, we compare our model with other probabilistic models, including Natural Gradient Boosting (NGboost), Classification and Regression Diffusion Models (CARD), Diffusion Boosted Trees (DBT), and non-probabilistic GBM models. The experimental results show that our model outperforms existing models in both accuracy and inference time. © 2024, CC BY.

关键词： Self-supervised learning

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Adaptive Contextual Caching for Mobile Edge Large Language Model Service

arXiv

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arXiv 2025年

作者： Liu, Guangyuan Liu, Yinqiu Wang, Jiacheng Du, Hongyang Niyato, Dusit Kang, Jiawen Xiong, Zehui College of Computing and Data Science The Energy Research Institute @ NTU Interdisciplinary Graduate Program Nanyang Technological University Singapore College of Computing and Data Science Nanyang Technological University Singapore Department of Electrical and Electronic Engineering University of Hong Kong Hong Kong School of Automation Guangdong University of Technology China Pillar of Information Systems Technology and Design Singapore University of Technology and Design Singapore

Mobile edge Large Language Model (LLM) deployments face inherent constraints, such as limited computational resources and network bandwidth. Although Retrieval-Augmented Generation (RAG) mitigates some challenges by integrating external knowledge bases, inefficient cache management can still result in high retrieval latency and frequent cache updates. To address these issues, we propose an Adaptive Contextual Caching (ACC) framework that anticipates user needs by proactively caching semantically relevant data for mobile-edge LLMs. ACC utilizes a deep reinforcement learning (DRL) module to refine cache replacement policies, balancing user context, document similarity, and the overhead associated with cache misses. Experimental results demonstrate that ACC increases cache hit rates to over 80% after only 11 training episodes, outperforming FIFO, LRU, and semantic-only caching while reducing retrieval latency by up to 40%. In particular, ACC also reduces local caching overhead (i.e., the cost of updating the cache when a miss occurs) by as much as 55%, enabling scalable, low-latency LLM services in resource-constrained edge environments. © 2025, CC BY.

关键词： Deep reinforcement learning

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GraCo: Granularity-Controllable Interactive Segmentation

arXiv

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arXiv 2024年

作者： Zhao, Yian Li, Kehan Cheng, Zesen Qiao, Pengchong Zheng, Xiawu Ji, Rongrong Liu, Chang Yuan, Li Chen, Jie School of Electronic and Computer Engineering Peking University Shenzhen China Peng Cheng Laboratory Shenzhen China -Preferred Program Peking University Shenzhen Graduate School China Key Laboratory of Multimedia Trusted Perception and Efficient Computing Ministry of Education of China Xiamen University China Department of Automation and BNRist Tsinghua University Beijing China

Interactive Segmentation (IS) segments specific objects or parts in the image according to user input. Current IS pipelines fall into two categories: single-granularity output and multi-granularity output. The latter aims to alleviate the spatial ambiguity present in the former. However, the multi-granularity output pipeline suffers from limited interaction flexibility and produces redundant results. In this work, we introduce Granularity-Controllable Interactive Segmentation (GraCo), a novel approach that allows precise control of prediction granularity by introducing additional parameters to input. This enhances the customization of the interactive system and eliminates redundancy while resolving ambiguity. Nevertheless, the exorbitant cost of annotating multi-granularity masks and the lack of available datasets with granularity annotations make it difficult for models to acquire the necessary guidance to control output granularity. To address this problem, we design an any-granularity mask generator that exploits the semantic property of the pre-trained IS model to automatically generate abundant mask-granularity pairs without requiring additional manual annotation. Based on these pairs, we propose a granularity-controllable learning strategy that efficiently imparts the granularity controllability to the IS model. Extensive experiments on intricate scenarios at object and part levels demonstrate that our GraCo has significant advantages over previous methods. This highlights the potential of GraCo to be a flexible annotation tool, capable of adapting to diverse segmentation scenarios. The project page: https://***/GraCo. Copyright © 2024, The Authors. All rights reserved.

关键词： Pipelines

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A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders

A Power-Efficient FFT Hardware Architecture Exploiting Appro...

引用

IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Guilherme Ferreira Pedro T. L. Pereira Guilherme Paim Eduardo Costa Sergio Bampi Graduate Program in Microelectronics (PGMICRO) Federal University of Rio Grande do Sul (UFRGS) Brazil Graduate Program in Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Brazil

ISBN: (数字)9781728176703

ISBN: (纸本)9781728176710

This work presents an energy-efficient Fast Fourier Transform (FFT) hardware architecture exploiting approximate adder circuits. The FFT hardware architecture consists of a fixed-point fully sequential architecture with a radix-2 butterfly with decimation in time (DIT). In this paper, we explore a set of approximate adders (LOA, ETA-I, Copy-A, Copy-B, Trunc0, Trunc1) in the butterfly by varying the approximation level (K term). The Root-Mean-Square Error (RMSE) metric shows which approximate level term allows the FFT processing without widely signal losses. The results show that our best-proposed FFT employing Trunc0 approximate adder with K =10 saves up to 35% of power dissipation compared to the FFT with the original radix-2 butterfly using the synthesis tool operators.

关键词： Measurement Fast Fourier transforms Circuits and systems Hardware Energy efficiency Topology Power dissipation

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Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations

Boosting the Efficiency of the Harmonics Elimination VLSI Ar...

引用

IEEE International Conference on electronics, Circuits and Systems (ICECS)

作者： Patricia da Costa Pedro T. L. Pereira Guilherme Paim Eduardo da Costa Sergio Bampi Graduate Program in Microelectronics (PGMICRO) - Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil Graduate Program in Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil

Approximate computing emerged as a key alternative for trading off accuracy against energy efficiency and area reduction. Error-tolerant applications, such as multimedia processing, machine learning, and signal processing, can process the information with lower-than-standard accuracy at the circuit level while still fulfilling a good and acceptable service quality at the application level. Adaptive filtering-based systems have been demonstrating high resiliency against hardware errors due to their intrinsic self-healing characteristic. This paper investigates the design space exploration of arithmetic approximations in a Very Large-Scale Integration (VLSI) harmonic elimination (HE) hardware architecture based on Least Mean Square (LMS) adaptive filters. We evaluate the Pareto front of the area- and power versus quality curves by relaxing the arithmetic precision and by adopting both approximate multipliers (AxMs) in combination with approximate adders (AxAs). This paper explores the benefits and impacts of the Dynamic Range Unbiased (DRUM), Rounding-based Approximate (RoBA), and Leading one Bit-based Approximate (LoBA) multipliers in the power dissipation, circuit area, and quality of the VLSI HE architectures. Our results highlight the LoBA 0 as the most efficient AxM applied in the HE architecture. We combine the LoBA 0 with Copy and LOA AxAs with variations in the approximation level (L). Notably, LoBA 0 and LOA with $L=6$ resulted in savings of 43.7% in circuit area and 45.2% in power dissipation, compared to the exact HE, which uses multiplier and adder automatically selected by the logic synthesis tool. Finally, we demonstrate that the best hardware architecture found in our investigation successfully eliminates the contaminating spurious noise (i.e., 60 Hz and its harmonics) from the signal.

关键词： Power quality Computer architecture Very large scale integration Harmonic analysis Boosting Hardware Power dissipation

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GraCo: Granularity-Controllable Interactive Segmentation

GraCo: Granularity-Controllable Interactive Segmentation

引用

Conference on Computer Vision and Pattern Recognition (CVPR)

作者： Yian Zhao Kehan Li Zesen Cheng Pengchong Qiao Xiawu Zheng Rongrong Ji Chang Liu Li Yuan Jie Chen School of Electronic and Computer Engineering Peking University Shenzhen China AI for Science (AI4S)-Preferred Program Peking University Shenzhen Graduate School China Peng Cheng Laboratory Shenzhen China Key Laboratory of Multimedia Trusted Perception and Efficient Computing Ministry of Education of China Xiamen University China Department of Automation and BNRist Tsinghua University Beijing China

ISBN: (数字)9798350353006

ISBN: (纸本)9798350353013

Interactive Segmentation (IS) segments specific objects or parts in the image according to user input. Current IS pipelines fall into two categories: single-granularity out-put and multi-granularity output. The latter aims to allevi-ate the spatial ambiguity present in the former. However, the multi-granularity output pipeline suffers from limited interaction flexibility and produces redundant results. In this work, we introduce Granularity-Controllable Interactive Segmentation (GraCo), a novel approach that allows precise control of prediction granularity by introducing ad-ditional parameters to input. This enhances the customization of the interactive system and eliminates redundancy while resolving ambiguity. Nevertheless, the exorbitant cost of annotating multi-granularity masks and the lack of avail-able datasets with granularity annotations make it difficult for models to acquire the necessary guidance to control out-put granularity. To address this problem, we design an any-granularity mask generator that exploits the semantic property of the pre-trained IS model to automatically gen-erate abundant mask-granularity pairs without requiring additional manual annotation. Based on these pairs, we propose a granularity-controllable learning strategy that efficiently imparts the granularity controllability to the IS model. Extensive experiments on intricate scenarios at ob-ject and part levels demonstrate that our GraCo has signifi-cant advantages over previous methods. This highlights the potential of GraCo to be a flexible annotation tool, capable of adapting to diverse segmentation scenarios. The project page: https://***/GraCo.

关键词： Image segmentation Adaptation models Annotations Interactive systems Pipelines Semantics Redundancy

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Discover and align taxonomic context priors for open-world semi-supervised learning 23

Discover and align taxonomic context priors for open-world s...

引用

Proceedings of the 37th International Conference on Neural Information Processing Systems

作者： Yu Wang Zhun Zhong Pengchong Qiao Xuxin Cheng Xiawu Zheng Chang Liu Nicu Sebe Rongrong Ji Jie Chen School of Electronic and Computer Engineering Peking University Shenzhen China and AI for Science (AI4S)-Preferred Program Peking University Shenzhen Graduate School China School of Computer Sceince University of Nottingham United Kingdom School of Electronic and Computer Engineering Peking University Shenzhen China and Department of Information Engineering and Computer Science University of Trento Italy School of Electronic and Computer Engineering Peking University Shenzhen China Peng Cheng Laboratory Shenzhen China and Key Laboratory of Multimedia Trusted Perception and Efficient Computing Ministry of Education of China Xiamen University Department of Automation Tsinghua University Beijing China Department of Information Engineering and Computer Science University of Trento Italy School of Electronic and Computer Engineering Peking University Shenzhen China and Peng Cheng Laboratory Shenzhen China and AI for Science (AI4S)-Preferred Program Peking University Shenzhen Graduate School China

Open-world Semi-Supervised Learning (OSSL) is a realistic and challenging task, aiming to classify unlabeled samples from both seen and novel classes using partially labeled samples from the seen classes. Previous works typically explore the relationship of samples as priors on the pre-defined single-granularity labels to help novel class recognition. In fact, classes follow a taxonomy and samples can be classified at multiple levels of granularity, which contains more underlying relationships for supervision. We thus argue that learning with single-granularity labels results in sub-optimal representation learning and inaccurate pseudo labels, especially with unknown classes. In this paper, we take the initiative to explore and propose a uniformed framework, called Taxonomic context prIors Discovering and Aligning (TIDA), which exploits the relationship of samples under various granularity. It allows us to discover multi-granularity semantic concepts as taxonomic context priors (i.e., sub-class, target-class, and super-class), and then collaboratively leverage them to enhance representation learning and improve the quality of pseudo labels. Specifically, TIDA comprises two components: i) A taxonomic context discovery module that constructs a set of hierarchical prototypes in the latent space to discover the underlying taxonomic context priors; ii) A taxonomic context-based prediction alignment module that enforces consistency across hierarchical predictions to build the reliable relationship between classes among various granularity and provide additions supervision. We demonstrate that these two components are mutually beneficial for an effective OSSL framework, which is theoretically explained from the perspective of the EM algorithm. Extensive experiments on seven commonly used datasets show that TIDA can significantly improve the performance and achieve a new state of the art. The source codes are publicly available at https://***/rain305f/TIDA.

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Hardware Architecture for the Regular Interpolation Filter of the AV1 Video Coding Standard

Hardware Architecture for the Regular Interpolation Filter o...

引用

European Signal Processing Conference (EUSIPCO)

作者： Daiane Freitas Rafael da Silva Ícaro Siqueira Cláudio M. Diniz Ricardo A. L. Reis Mateus Grellert Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil Graduate Program on Microelectronics Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil Embedded Computing Lab Federal University of Santa Catarina (UFSC) Florianopólis Brazil

ISBN: (数字)9789082797053

ISBN: (纸本)9781728150017

This work proposes a hardware architecture for fractional-pixel interpolation filter defined in the royalty-free AV1 video coding standard. Analysis conducted in this work shows that the AV1 Regular family of filters has the highest usage especially when considering high resolution videos. The proposed architecture implements the 15 interpolation filters of the AV1 Regular family and is capable to interpolate videos of up to 8K video resolution at 120 fps. The proposed architecture achieves the highest throughput compared to related works.

关键词： Video coding Interpolation Computer architecture Parallel processing Filtering algorithms Hardware Standards

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An Efficient N-bit 8-2 Adder Compressor with a Constant Internal Carry Propagation Delay

An Efficient N-bit 8-2 Adder Compressor with a Constant Inte...

引用

IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Thomas V. Fontanari Guilherme Paim Leandro M. G. Rocha Patrícia Ücker Eduardo Costa Sergio Bampi Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9781728134277

ISBN: (纸本)9781728134284

Adder compressors (AC) have been extensively used in digital circuits like multipliers and transforms where several multi-bit operands have to be summed in parallel. Most available AC structures on the literature do not handle efficiently the intermediary carry propagation on wider bit-widths, potentially leading to longer critical paths and higher energy consumption. Hence, this paper proposes a novel non-hierarchical 8-2 adder compressor CMOS design with limited and constant carry propagation path for N-bit operands, minimizing both circuit delay and power dissipation. The proposed architecture as well as the state-of-the-art ACs are synthesized in a 65 nm CMOS commercial standard cell library, for multiple operands bit-widths. Logic synthesis results show that our proposed design reaches a maximum operating frequency at least 15.2% higher than current state-fo-th-art ACs, while also achieving up to 13.6% of power dissipation savings, increasing the savings with the bitwidth.

关键词： Adders Power dissipation Computer architecture Logic gates Proposals Propagation delay Transforms

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