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Compact Model Build Upon Dynamic Weighting Artificial Neural Network Approach for Complementary Field Effect Transistors

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IEEE Transactions on Electron Devices 2024年第1期71卷 246-253页

作者： Butola, Rajat Li, Yiming Kola, Sekhar Reddy National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan Institute of Pioneer Semiconductor Innovation The Institute of Artificial Intelligence Innovation National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program The Institute of Communications Engineering the Institute of Biomedical Engineering Department of Electronics and Electrical Engineering Hsinchu300093 Taiwan

In this work, a dynamic weighting-artificial neural network (DW-ANN) methodology is presented for quick and automated compact model (CM) generation. It takes advantage of both TCAD simulations for high accuracy and SPICE simulations for cost-effectiveness. This methodology is developed for gate-all-around (GAA) silicon (Si) nanosheet (NS) complementary field effect transistor (CFET), a potential candidate for future CMOS technology due to its innate properties. The critical process variation (PV) sources that severely degrade the CFET performance are estimated using DW-ANN. It reduces the computation cost and predicts the effects of PV sources with less than 1% error. Furthermore, a compact DW-ANN-based Verilog-A model has been developed that captures the dc as well as transient behavior accurately for circuit-level analysis. CFET-based circuits such as inverter, 6T-static random access memory (SRAM), and ring oscillator (RO) are characterized and implemented using DW-ANN-based CM. The overall average error of the model is reported as less than 2%. Therefore, the proposed device and circuit modeling approach provides a feasible solution for the rapid compact modeling of new emerging devices with good convergence and high accuracy. © 1963-2012 IEEE.

关键词： Neural networks

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Correntropy-Based Data Selective Adaptive Filtering

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IEEE Transactions on Circuits and Systems I: Regular Papers 2024年第2期71卷 754-766页

作者： Chien, Ying-Ren Wu, Sheng-Teng Tsao, Hen-Wai Diniz, Paulo S.R. Adaptive and Autonomous Communication Laboratory Department of Electrical Engineering National Ilan University Yilan City260007 Taiwan College of Electrical Engineering and Computer Science Graduate Institute of Communication Engineering National Taiwan University Taipei10617 Taiwan Program of Electrical Engineering Department of Electronics and Computer Engineering COPPE/Poli Universidade Federal do Rio de Janeiro Rio de Janeiro68504 Brazil

Data selection can be used in conjunction with adaptive filtering algorithms to avoid unnecessary weight updating and thereby reduce computational overhead. This paper presents a novel correntropy-based data selection method as an alternative to conventional data selection mechanisms based on squared error values. We developed a variable correntropy sensing algorithm to maximize the instantaneous correntropy function for the Gaussian kernel function to mitigate the impact of impulse noise and other forms of noise that can be disregarded in data selection. The proposed data selection mechanism can be implemented with any adaptive filtering algorithm. In simulations, the proposed method (implemented with the least mean squared algorithm) outperformed comparable error-based data selection schemes in terms of hit rate and miss rate, and the resulting weight updating ratio was close to the expected weight updating ratio. © 2023 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.

关键词： Adaptive filters

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Fuzzy Logic for Assessing the Health of a Corn Crop within Family Farming

Fuzzy Logic for Assessing the Health of a Corn Crop within F...

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2024 IEEE Latin American Conference on Computational Intelligence, LA-CCI 2024

作者： Mendonca, Vanessa Santos, Mikael Munoz, Daniel M. Humberto Llanos, Carlos Federal Institute of Brasilia Department of Computer Science Brazil Mechatronics Graduate Program Department of Mechanical Engineering Brazil Federal Institute of Brasilia Department of Agronomy Brazil University of Brasilia Faculty of Gama Electronics Engineering Undergraduate Program Brasilia Brazil

ISBN: (纸本)9798350374575

Technological advancements are increasingly evident across various sectors, including automobiles, industry, and healthcare. In precision agriculture, significant progress has been made, with AgroTICs and Smart Agriculture gaining substantial traction in the market. However, a gap remains between cutting-edge technology and family farming, presenting a challenge from both social and applied research perspectives. However, there is still a gap between cutting-edge technology and family farming, which creates a challenge from a social and applied research point of view. In this context, this paper proposes a monitoring model based on Fuzzy Logic and sensor automation applied to estimate the health of a corn crop. The proposed Fuzzy inference system involves calculating an indicator of nutrients as well as the average color and area of corn plants. The nutrient indicator is automatically computed by an ESP32 microcontroller using sensor readings, while the average color and area inputs are manually entered via a mobile application. Additionally, the Fuzzy inference is integrated into the ESP32. The model underwent experimental validation on the health of the plantation, and the results were evaluated in four areas: one was designated for testing, and three were for validation. The model achieved an accuracy of 97.5% in Scenario 3, categorized as 'Very Favorable', and an accuracy of 65% in Scenarios 2 and 4, categorized as 'Unfavorable'. The implications of this research contribute to the advancement of AgroTICs among small producers, with the potential to enhance and automate the monitoring of their harvest production. © 2024 IEEE.

关键词： Agribusiness

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Overview of Versatile Video Coding (H.266/VVC) and Its Coding Performance Analysis

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IEIE Transactions on Smart Processing and Computing 2023年第2期12卷 122-154页

作者： Lee, Minhun Song, HyeonJu Park, Jeeyoon Jeon, Byeungwoo Kang, Jungwon Kim, Jae-Gon Lee, Yung-Lyul Kang, Je-Won Sim, Donggyu Department of Computer Engineering Kwangwoon University Seoul Korea Republic of Department of Computer Engineering Sejong University Seoul Korea Republic of Department of Electrical and Computer Engineering Sungkyunkwan University Kyunggi-do Korea Republic of Communication and Media Research Laboratory Electronics and Telecommunications Research Institute Deajeon Korea Republic of School of Electronics and Information Engineering Korea Aerospace University Kyunggi-do Korea Republic of Department of Electronic and Electrical Engineering Graduate Program in Smart Factory Ewha Womans University Seoul Korea Republic of

Versatile Video Coding (H.266/VVC) is the newest video coding standard jointly developed by the Joint Video Experts Team (JVET), which is organized by the ITU-T Video Coding Experts Group (VCEG) and the ISO/IEC Moving Picture Experts Group (MPEG). H.266/VVC provides about 40% bitrate reduction compared with High Efficiency Video Coding (H.265/HEVC) for the same visual quality. This paper introduces in detail the core structure of H.266/VVC by highlighting its features within block partitioning structure, intra/inter prediction, transform, quantization, and in-loop filtering, compared to its predecessor (H.265/HEVC). H.266/VVC yields significantly improved the coding performance, but it increased the computational complexity, particularly for the encoder side, which remains a problem to be tackled for successful commercialization in the future. This paper examined the statistical performance of H.266/VVC coding tools from the bitstreams encoded by the VVC test model (VTM12.0) encoder through rate-distortion optimization under the JVET common test conditions. In addition, the complexity and performance analyses are conducted on the block partitioning structure and group of picture structure. It is expected that an optimized H.266/VVC encoder can be designed and developed by minimizing the coding loss based on the analysis data. © 2023 Institute of electronics and Information Engineers. All rights reserved.

关键词： Image compression

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AxRSU- : Higher-Order m-Bit Approximate Encoders for Radix- Squarer Units

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Circuits, Systems, and Signal Processing 2024年第6期43卷 1-30页

作者： da Rosa, Morgana M. A. Paim, Guilherme da Costa, Eduardo A. C. Soares, Rafael Bampi, Sergio Graduate Program on Computing Federal University of Pelotas (UFPel) Pelotas Brazil Graduate Program in Microelectronics Federal University of RGS Porto Alegre Brazil Graduate Program in Electronics and Computer Engineering Catholic University of Pelotas Pelotas Brazil

Approximate computing has emerged as a design alternative to enhance design efficiency by capitalizing on the inherent error resilience observed in numerous applications. Various error-resilient and compute-intensive applications, such as signal, image and video processing, computer vision, and supervised machine learning, necessitate dedicated hardware accelerators for mean squared error estimation during runtime. In these application domains, using efficient arithmetic operators, particularly a squarer unit, represents one of the most effective strategies for low-power design. This work introduces an approximate Radix- $$2^{m}$$ squarer unit, denoted as AxRSU- $$2^{m}$$ . The proposed squarer unit employs m-bit approximate encoders to execute operations on m-bit data concurrently. The AxRSU- $$2^{m}$$ under consideration explores encoders with m equal to 2 (AxRSU-4), 3 (AxRSU-8), and 4 (AxRSU-16). These approximate encoders exhibit low complexity and diminish the necessary partial products operating on m bits simultaneously, thereby substantially enhancing energy efficiency and reducing circuit area in the AxRSU- $$2^{m}$$ . To illustrate the trade-off between error and quality in the AxRSU- $$2^{m}$$ , we apply it to an SSD (sum squared difference) hardware accelerator designed for video processing, with a square-accumulate serving as a case study. Our findings reveal a novel Pareto front, presenting eight optimal AxRSU- $$2^{m}$$ solutions that achieve accuracy levels ranging from 3.76 to 75.53%. These solutions yield energy savings ranging from 46.20 to 95.57% and circuit area reductions ranging from 37.68 to 66.73%.

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A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors

IEEE Open Journal of Nanotechnology

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IEEE Open Journal of Nanotechnology 2023年 4卷 181-194页

作者： Butola, Rajat Li, Yiming Kola, Sekhar Reddy National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Institute of Communications Engineering the Institute of Biomedical Engineering the Department of Electronics and Electrical Engineering the Institute of Pioneer Semiconductor Innovation and the Institute of Artificial Intelligence Innovation Hsinchu300093 Taiwan

Machine learning (ML) is poised to play an important part in advancing the predicting capability in semiconductor device compact modeling domain. One major advantage of ML-based compact modeling is its ability to capture complex relationships and patterns in large datasets. Therefore, in this paper a novel design scheme based on dynamically adaptive neural network (DANN) is proposed to develop fast and accurate compact model (CM). This framework constitutes a powerful yet computationally efficient methodology and exhibits emergent dynamic behaviors. This paper demonstrates that the compact model based on ML can be designed to replicate the performance of conventional compact model for nanodevices. For this work, gate-all-around (GAA) nanosheet (NS) device characteristics are comprehensively analyzed for process variability sources using the proposed model. The device geometry parameters such as channel length, nanosheet width and nanosheet thickness are fed as input features to the DANN model. The adaptive neural network learns dynamically by updating weights of the model in accordance with the input features and achieves accurate neural weight convergence. The proposed model predicted the electrical characteristics of NS devices with less than 1% error rate. The model is also implemented and validated for the simulations of digital circuit designs such as inverter, and logic gates. ©;2023 The Authors.

关键词： Circuit simulation

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A Physical-Based Artificial Neural Networks Compact Modeling Framework for Emerging FETs

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IEEE Transactions on Electron Devices 2024年第1期71卷 223-230页

作者： Yang, Ya-Shu Li, Yiming Kola, Sekhar Reddy Reddy National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory The Institute of Communications Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Institute of Communications Engineering Institute of Biomedical Engineering Department of Electronics and Electrical Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan

We report a compact modeling framework based on the Grove-Frohman (GF) model and artificial neural networks (ANNs) for emerging gate-all-around (GAA) MOSFETs. The framework consists of two ANNs;the first ANN constructed with the drain current model not only can capture the main trend of device I - V characteristics but also can predict its variation even when the amount of training data for the ANN is insufficient or outside the range of applied biases. The second one is then designed to improve the model accuracy by further minimizing the errors between the target and the model outputs. We implement the proposed framework to accurately model emerging GAA nanosheet (NS) MOSFETs and complementary FETs (CFETs) without suffering from divergent issues in circuit simulation. In addition, nonphysical behaviors, such as nonzero current at zero bias, do not occur in the modeling framework. Compared to recently reported machine-learning (ML) models, our approach can achieve a similar level of model accuracy with merely 20% amount of the training data. © 1963-2012 IEEE.

关键词： Neural networks

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Statistical Device Simulation and Machine Learning of Process Variation Effects of Vertically Stacked Gate-All-Around Si Nanosheet CFETs

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IEEE Transactions on Nanotechnology 2024年 23卷 386-392页

作者： Kola, Sekhar Reddy Li, Yiming Butola, Rajat National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Department of Electronics and Electrical Engineering Institute of Communications Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Institute of Biomedical Engineering Institute of Pioneer Semiconductor Innovation Institute of Artificial Intelligence Innovation Hsinchu300093 Taiwan

In this study, we report the process variation effect (PVE) including the work function fluctuation (WKF) on the DC/AC characteristic fluctuation of stacked gate-all-around silicon complementary field-effect transistors (CFETs). The PVE affects characteristic fluctuation significantly;in particular, for the variability of off-state current. Owing to the bottom channel of a fin-type, the P-FET suffers from the worst off-state current fluctuation (more than 200% variation) compared to the N-FET. The device variability induced by the WKF is marginal because of amorphous-type metal grains. As input features to an artificial neural network (ANN) model, low and high work function values, as well as parameters of PVE that have prevalent effects on CEFT transfer characteristics are further considered and modeled. The estimated values of R2-score prove that the ANN model properly grasps information from the dataset successfully;thus, it can be used to model emerging CFETs for circuit simulation. © 2002-2012 IEEE.

关键词： Neural networks

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Temperature-Dependent Hydrogen Modulations of Ultra-Scaled a-IGZO Thin Film Transistor Under Gate Bias Stress

IEEE Open Journal of Nanotechnology

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IEEE Open Journal of Nanotechnology 2024年 5卷 9-16页

作者： Aslam, Muhammad Chang, Shu-Wei Chuang, Min-Hui Chen, Yi-Ho Lee, Yao-Jen Li, Yiming Parallel and Scientific Computing Laboratory National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Electrical Engineering and Computer Science International Graduate Program National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Department of Electrical Engineering National Cheng Kung University Tainan701401 Taiwan Institute of Communications Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Graduate Degree Program of College of Electrical and Computer Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Institute of Pioneer Semiconductor Innovation National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Institute of Biomedical Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan Department of Electronics and Electrical Engineering National Yang Ming Chiao Tung University Hsinchu300093 Taiwan

Recently, a-IGZO has advanced toward the next-generation electronics system because of its compatibility with complementary metal oxide semiconductor (CMOS) and back-end-of-line (BOEL) based systems. A systematic electrical characterization of a-IGZO TFT related to reliability issues, such as positive bias temperature stress (PBTS) and negative bias temperature stress (NBTS), would entitle its integration into novel electronics systems. Unexpectedly, PBTS is characterized by the transition of positive Vth shift to negative Vth shift (ΔVth, the positive shift followed by the stress and temperature activated negative shift). This transition is attributed to charge trapping/trap-site generations and hydrogen migration to the active layer. The ΔVth shift mechanism depends on the temperature and voltage stress. On the other hand, a negative ΔVth shift has been observed during the NBTS operation and could be attributed to the hole trapping at the interface of GI/IGZO. An effective suppression of the gate leakage current has also been observed during reliability tests. Simulation results reveal a pronounced potential at the edges of source and drain regions, and considered the origin of hydrogen migration into the IGZO layer. Thermal image results also reveal the strong temperature/potential distribution at the edges of the source/drain regions, indorsing the simulation results. © 2020 IEEE.

关键词： Oxide semiconductors

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Auxiliary Classifier based Residual RNN for Image Captioning 30

Auxiliary Classifier based Residual RNN for Image Captioning

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30th European Signal Processing Conference, EUSIPCO 2022

作者： Çayli, Özkan Kiliç, Volkan Onan, Aytug Wang, Wenwu Electrical and Electronics Engineering Graduate Program Izmir Katip Çelebi University Turkey Department of Computer Engineering Izmir Katip Çelebi University Turkey University of Surrey United Kingdom

ISBN: (纸本)9789082797091

Image captioning aims to generate a description of visual contents with natural language automatically. This is useful in several potential applications, such as image understanding and virtual assistants. With recent advances in deep neural networks, natural and semantic text generation has been improved in image captioning. However, maintaining the gradient flow between neurons in consecutive layers becomes challenging as the network gets deeper. In this paper, we propose to integrate an auxiliary classifier in the residual recurrent neural network, which enables the gradient flow to reach the bottom layers for enhanced caption generation. Experiments on the MSCOCO and VizWiz datasets demonstrate the advantage of our proposed approach over the state-of-the-art approaches in several performance metrics. © 2022 European Signal Processing Conference, EUSIPCO. All rights reserved.

关键词： Recurrent neural networks

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