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检索条件"机构=Graduate Program in Microelectronics"

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A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference 7

A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Refere...

引用

7th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2016

作者： Cordova, David Klimach, Hamilton Toledo, Pedro Bampi, Sergio Fabris, Eric NSCAD Microeletronica UFRGS Porto Alegre RS Brazil Graduate Program on Microelectronics UFRGS Porto Alegre RS Brazil

ISBN: (纸本)9781467378352

Electromagnetic Interference (EMI) degrades the performance of voltage and current references, due to its finite Power Supply Rejection Ratio (PSRR). The design of a 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference is herein presented. The Voltage Reference is designed based on the Zero Temperature Coefficient (ZTC) transistor point. The high-PSRR is obtained using zero-VT transistors as active loads in the open and feedback loop of the circuit. The final circuit was designed in a 130 nm CMOS process and occupies around 0.014 mm2 of silicon area while consuming just 1.15 μW. Postlayout simulations present a 206 mV of Voltage Reference with a Temperature Coefficient of 321 ppm/° C, for the temperature range from -55 to 125 ° C. An EMI source of 4 dBm (1 Vpp) injected in the power supply, according to the Direct Power Injection (DPI) standard, yield in a maximum DC Shift and Peak-to-Peak ripple of -0.17 % and 822 μVpp, respectively. © 2016 IEEE.

关键词： Temperature

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Stable ring oscillator for ultra low supply voltages 7

Stable ring oscillator for ultra low supply voltages

引用

7th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2016

作者： Rodovalho, Luis Henrique Fabris, Eric Klimach, Hamilton Microelectronics Graduate Program Federal University of Rio Grande Do sul Porto Alegre Rio Grande do Sul Brazil

ISBN: (纸本)9781467378352

This paper presents an alternative to crystal based oscillators for reference frequencies in highly integrated SoCs. The frequency reference through the usage of an active bias controlled ring oscillator operating with a supply voltage from 300 to 500 mV for an temperature from-40 to 125 ° C. The oscillator shows a very good temperature and supply voltage frequency stability coming from the active biasing using a stable current reference. © 2016 IEEE.

关键词： Crystal oscillators

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A novel electrical circuit model for ion-sensitive field-effect transistor

A novel electrical circuit model for ion-sensitive field-eff...

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International Symposium on Instrumentation Systems, Circuits and Transducers (INSCIT)

作者： Luciano Lourenço F. da Silva Jair Fernandes de Souza Marcus Vinicius Pelegrini Carlos Augusto de Moraes Cruz Valtemar Fernandes Cardoso Graduate Program in Electrical Engineering - Department of Electronics and Computation Federal University of Amazonas Manaus AM Brazil Department of Electrical Engineering Federal Institute of Amazonas Manaus AM Brazil Senai Institute of Innovation in Microelectronics Manaus AM Brazil

An alternative electrical model for Ion-Sensitive Field-Effect Transistor (ISFET) sensors is presented in this work. The proposed model is worth to be employed in both DC and transient simulations where the behavior of the ISFET sensor coupled to its readout circuit can therefore be investigated. Whereas, previous models found in the literature could only be employed to perform DC simulations. The electrochemical stage of an ISFET is responsible to emulate the device's sensitivity to ion concentration. The alternative electrical model enables the representation of the ISFET electrochemical stage through a much simpler circuit topology than those found in the literature, without loss of generality. The simulation results employing the proposed ISFET model are compliant with those presented in the literature, asserting thus its effectiveness.

关键词： Integrated circuit modeling Ions Semiconductor device modeling Sensors Logic gates MOSFET Electrodes

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An enzymatic glucose detection sensor using ZnO nanostructure

An enzymatic glucose detection sensor using ZnO nanostructur...

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作者： Marie, Mohammed Mandal, Sanghamitra Manasreh, Omar Microelectronics and Photonics Graduate Program University of Arkansas FayettevilleAR72701 United States Department of Electrical Engineering University of Arkansas FayettevilleAR72701 United States

Glucose sensor based on ITO/ZnO NRs/GOx/nafion is fabricated and tested under different glucose concentrations. Hydrothermal growth method along with sol-gel technique is used to grow high quality ZnO nanorods that have well-alignment and high density with an acceptable aspect ratio. The as-grown of ZnO nanorods are used to fabricate a working electrode that can be used for glucose detection in blood after a modification process with GOx and nafion membrane. Annealing at 110°C helped in improves the crystallinity of the seed layer and as a result, a high density and well alignment as-grown ZnO nanorods were obtained. High sensitivity and short response time were obtained from the fabricated device with an acceptable lower limit of detection. © Copyright Materials Research Society 2016.

关键词： Sol-gels

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Low cost automatic test vector generation for structural analog testing

Low cost automatic test vector generation for structural ana...

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Latin American Test Workshop, LATW

作者： André L. Chinazzo Paulo C. Comassetto de Aguirre Tiago R. Balen Microelectronic System Design Group Technische Universität Kaiserslautern Kaiserslautern Germany Universidade Federal do Pampa Bage RS BR Graduate Program on Microelectronics Universidade Federal do Rio Grande do Sul Porto Alegre RS Brazil

ISBN: (纸本)9781538604168

This work presents a low cost automatic method to test vector generation for defect-oriented structural analog testing. An optimal set of analog single tone signals is obtained by computing the frequency response of circuit nodes, while iteratively injecting faults, using a SPICE simulator. The method also allows to identify the nodes of the circuit with higher observabilities to the injected faults, by comparing the obtained fault coverage as a function of frequency. A 130 nm ΣΔ modulator is used as case study to validate the technique under fault injection campaigns. Up to 100% fault coverage is obtained depending on the number of test points. A trade-off is identified, in such a way that a single test point may be used, achieving 95% of fault coverage. The optimized sets of single tone signals can be either combined in a multi-tone testing strategy or sequentially applied during the test application phase.

关键词： Circuit faults Frequency modulation Integrated circuit modeling Frequency response Transistors

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A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference

A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Refere...

引用

IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： David Cordova Pedro Toledo Hamilton Klimach Sergio Bampi Eric Fabris Graduate Program on Microelectronics UFRGS Porto Alegre RS Brazil

Electromagnetic Interference (EMI) degrades the performance of voltage and current references, due to its finite Power Supply Rejection Ratio (PSRR). The design of a 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference is herein presented. The Voltage Reference is designed based on the Zero Temperature Coefficient (ZTC) transistor point. The high-PSRR is obtained using zero-V T transistors as active loads in the open and feedback loop of the circuit. The final circuit was designed in a 130 nm CMOS process and occupies around 0.014 mm 2 of silicon area while consuming just 1.15 μW. Postlayout simulations present a 206 mV of Voltage Reference with a Temperature Coefficient of 321 ppm/° C, for the temperature range from -55 to 125 ° C. An EMI source of 4 dBm (1 V pp ) injected in the power supply, according to the Direct Power Injection (DPI) standard, yield in a maximum DC Shift and Peak-to-Peak ripple of -0.17 % and 822 μV pp , respectively.

关键词： Electromagnetic interference Transistors Power supplies Logic gates Resistance Temperature distribution Threshold voltage

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A 0.7V Fully Differential First Order GZTC-C filter

A 0.7V Fully Differential First Order GZTC-C filter

引用

Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： Pedro Toledo Renê Timbo David Cordova Hamilton Klimach Sergio Bampi Eric Fabris NSCAD Microeletronica Graduate Program on Microelectronics-UFRGS Porto Alegre RS Brazil

A 0.7 V supply voltage fully differential first order GZTC-C filter is herein proposed. The GZTC-C filter definition is used in this paper as a Transconductance-Capacitor filter (Gm-C) in which its gm stage is biased exactly on transconductance zero-temperature (GZTC) bias condition. This special bias point has all necessary conditions to design MOSFET transconductors with low temperature dependence. Additionally, two calibrate-points with three-bit resolution have been added to mitigate process variations which may cause bias shift errors on sensitive nodes, driving the circuit out of its normal GZTC operation region. The final circuit has been designed in a 130 nm CMOS process generating a 5 MHz cutoff frequency. The filter occupies around 0.01 mm 2 of silicon area while consuming just 21 μW. Monte Carlo (MC) post-layout and post-calibrated simulation has presented an Effective Cutoff Frequency Temperature Co-efficient (TC eff ) average of 73.4 ppm/°C with 30.6 ppm/°C standard deviation for a temperature range from -40 to +120°C and has estimated a cutoff frequency fabrication sensitivity of σ/μ = 0.87%, including average process and local mismatch variability.

关键词： MOSFET Temperature dependence Transconductance Temperature sensors Semiconductor device modeling Threshold voltage

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A 0.3 V, high-PSRR, picowatt NMOS-only voltage reference using zero-VT active loads

A 0.3 V, high-PSRR, picowatt NMOS-only voltage reference usi...

引用

Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： David Cordova Arthur C. de Oliveira Pedro Toledo Hamilton Klimach Sergio Bampi Eric Fabris NSCAD Microeletronica RS Brazil Graduate Program on Microelectronics UFRGS Porto Alegre RS Brazil

A low-voltage high-PSRR CMOS voltage reference operating with picowatt power consumption is presented. The voltage reference is generated from the threshold voltage (V T ) difference of two transistors biased in weak inversion. The V T difference is achieved through its dependence with the transistor dimensions. The high-PSRR is obtained using zero-V T transistors as active loads. The final circuit was designed in a 130 nm CMOS process and occupies around 0.0007 mm 2 of silicon area while consuming just 18.5 pW at 27°C. Post-layout simulations present a 62 mV reference voltage with a temperature coefficient of 15 ppm/°C, for a temperature range from -25 to 125 °C and a Power Supply Rejection Ratio (PSRR) of -68.7 dB at 0.3 V of supply voltage.

关键词： Logic gates Transistors

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System energy analysis for shared memory multiprocessing applications

System energy analysis for shared memory multiprocessing app...

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IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Dieison S. Silveira Sergio Bampi Gabriel B. Moro Eduardo H. M. da Cruz Philippe O. A. Navaux Lucas Mello Schnorr Federal University of Rio Grande do Sul - Brazil Graduate Program in Microelectronics (PGMicro) Federal University of Rio Grande do Sul - Brazil Graduate Program in Computing (PPGC)

ISBN: (纸本)9781509061143

This paper presents a detailed energy consumption analysis, considering the energy consumption related to CPU, cache memory and main memory of parallel applications on a 16-core HPC platform. The correlations between energy consumption, speedup, and execution time are also herein presented. Tests are conducted with the NAS parallel benchmarks using three different measurement tools: i) Perf, for the measurement of hardware cache memory events; ii) CACTI, used to estimate the cache memory energy consumption by access; and iii) PCM, for CPU and DRAM energy consumption estimates. Our results show that the lowest overall energy consumption occurs only when all physical cores are used, reducing by 62%, on average, the total system energy consumption when compared to the sequential version for the execution. Moreover, the cache memories results are even better, achieving a reduction of 80% in most of the cases, despite the increase in cache miss rate generated by the increased number of threads.

关键词： Energy consumption Benchmark testing Cache memory Memory management Phase change materials Random access memory Hardware

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0.3 V supply, 17 ppm/°C 3-transistor picowatt voltage reference

0.3 V supply, 17 ppm/°C 3-transistor picowatt voltage refer...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Arthur Campos de Oliveira Jhon Gomez Caicedo Hamilton Duarte Klimach Sergio Bampi Microelectronics Graduate Program Federal University of Rio Grande do Sul Porto Alegre RS Brazil

In this work a novel resistorless MOSFET 3-transistor voltage reference that operates in the picowatt range and occupies very small area is proposed. The circuit is based on a self-cascode structure that is biased in subthreshold condition using the leakage current provided by a reverse biased MOSFET diode. Its electrical behavior is analytically described and a design methodology is presented to allow the transistors sizing for optimal temperature compensation. Simulation results for a standard 130 nm CMOS process are presented to validated the proposed circuit topology. A reference voltage of 85 mV is obtained with a temperature coefficient (TC) of 17.4 ppm/°C and consuming only 7 pW under 0.3 V of power supply at room temperature. Monte Carlo analysis shows that the reference voltage σ/μ

关键词： Threshold voltage Temperature dependence Power demand Integrated circuit modeling MOSFET

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