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检索条件"机构=Graduate Program in Microelectronics"

共 156 条记录，以下是51-60 订阅

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Maximizing the Power-Efficiency of the Approximate Pruned Modified Rounded DCT Exploiting Approximate Adder Compressors

Maximizing the Power-Efficiency of the Approximate Pruned Mo...

引用

IEEE International New Circuits and Systems Conference

作者： Guilherme Paim Leandro M. G. Rocha Eduardo A. C. da Costa Sergio Bampi Graduate Program in Microelectronics (PGMicro) Federal University of Rio Grande do Sul (UFRGS) Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Brazil

This paper proposes the use of approximate adder compressors for a low-power 8-point Modified Rounded Discrete Cosine Transform (MRDCT_(10)) implementation. The algebraic approximation of the MRDCT was previously introduced in the literature, whose resultant matrix is only composed of 0, 1 and -1 values. Therefore, the MRDCT can be efficiently implemented using only adders and subtractors. We present an environment for the synthesis of the MRDCT in Cadence Encounter RTL Compiler tool. The synthesis reports are based on a set of real images as input vectors to obtain valid power results. Our results show that the use of approximate adder/subtractor compressors in hardwired state-of-the-art 8-point approximate MRDCT_(10) achieves savings ranging from 26% to 52.54% when compared with the macro function (+) from the tool.

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Exploring Architectural Solutions for an Energy-Efficient Kalman Filter Gain Realization

Exploring Architectural Solutions for an Energy-Efficient Ka...

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IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Pedro T. L. Pereira Guilherme Paim Patrícia Ücker Eduardo Costa Sérgio Almeida Sergio Bampi Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Brazil Graduate Program on Microelectronics (PGMicro) Federal University of Rio Grande do Sul (UFRGS) Brazil

The Kalman filter is a signal processing algorithm that plays an essential role in real-time mobile applications as nano drones navigation, spacecraft orbit control, GPS positioning, image recognition, and sensor data fusion for wearable health monitoring. However, the Kalman filter is a compute-intensive kernel since it implements a high amount of complex matrix operations like multiplications and inversions. The most timing-consuming tasks of the Kalman filter is the Kalman gain. Therefore, this work presents four architectural solutions to explore real-time and energy-efficient Kalman gain processing.

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0.3 V supply, 17 ppm/°C 3-transistor picowatt voltage reference

0.3 V supply, 17 ppm/°C 3-transistor picowatt voltage refer...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Arthur Campos de Oliveira Jhon Gomez Caicedo Hamilton Duarte Klimach Sergio Bampi Microelectronics Graduate Program Federal University of Rio Grande do Sul Porto Alegre RS Brazil

In this work a novel resistorless MOSFET 3-transistor voltage reference that operates in the picowatt range and occupies very small area is proposed. The circuit is based on a self-cascode structure that is biased in subthreshold condition using the leakage current provided by a reverse biased MOSFET diode. Its electrical behavior is analytically described and a design methodology is presented to allow the transistors sizing for optimal temperature compensation. Simulation results for a standard 130 nm CMOS process are presented to validated the proposed circuit topology. A reference voltage of 85 mV is obtained with a temperature coefficient (TC) of 17.4 ppm/°C and consuming only 7 pW under 0.3 V of power supply at room temperature. Monte Carlo analysis shows that the reference voltage σ/μ

关键词： Threshold voltage Temperature dependence Power demand Integrated circuit modeling MOSFET

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A 300mV-Supply, 2nW-Power, 80pF-Load CMOS Digital-Based OTA for IoT Interfaces

A 300mV-Supply, 2nW-Power, 80pF-Load CMOS Digital-Based OTA ...

引用

IEEE International Conference on Electronics, Circuits and Systems

作者： Pedro Toledo Paolo Crovetti Hamilton Klimach Sergio Bampi Graduate Program in Microelectronics (PGMICRO) Federal University of Rio Grande do Sul Politecnico di Torino

This paper presents a power-efficient Ultra Low Voltage (ULV) Digital-Based Operational Transconductance Amplifier (DB-OTA), which uses static logic gates and processes digitally the analog input signal. Post-layout simulations in 180nm CMOS technology show that at 300mV supply voltage the circuit consumes just 2nW while driving a capacitive load of 80pF with Total Harmonic Distortion lower than 5% at 100mV input signal swing. The total silicon area is 1,426 μm~2. The maximum energy efficiency supply for the DB-OTA and its scalability to 40nm CMOS technology node are also demonstrated.

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Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design

Optimizing Iterative-based Dividers for an Efficient Natural...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Patrícia Ücker Miguel R. Weirich Guilherme Paim Eduardo A. C. da Costa Sergio Bampi Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Brazil Graduate Program on Microelectronics (PGMicro) Federal University of Rio Grande do Sul (UFRGS) Brazil

ISBN: (数字)9781728134277

ISBN: (纸本)9781728134284

This work proposes to optimize iterative-based dividers for a natural logarithm operator design. The logarithm operator approximates the function at the base e. Such an operator is implemented using Taylor Series approximation. In this approximation, the division is a costly operation. In this work, we explore two iterative-based divider circuits for logarithm operator. We also offer an algorithm responsible for allowing input values different from the ones in the convergence region of the Taylor Series, with a reduced number of iterations. Through co-simulation using both the Matlab ® and ModelSim ® softwares, it was possible to determine the approximation quality of the implemented circuits, with a curve response very close to the Matlab one. Moreover, the Goldschmidt divider presents a slightly fewer relative error, mainly for higher input values comparing with Newton-Raphson. Synthesis results show that although the logarithm circuit with Newton-Raphson divider has marginally more area, it is more power-efficient than the one using Goldschmidt divider.

关键词： Approximation algorithms Taylor series Mathematical model Newton method Convergence Hardware Matlab

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Flexible Temperature-Pressure Organic Sensor

Flexible Temperature-Pressure Organic Sensor

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microelectronics Technology and Devices (SBMicro)

作者： L.P. Martins H.I. Boudinov Federal University of Rio Grande do Sul: Microelectronics Graduate Program (PPGMicro) Porto Alegre Brazil

Our work intends to develop dual-parameter pressure-temperature sensors by taking advantage of the independent thermoelectric and piezo resistive effects in a single flexible and compressible conductive foam. Such device allows to make measurements of simultaneous temperature and pressure monitoring by transducing external stimuli into separate electrical signals. The devices can be self-powered by a temperature gradient with a promising temperature and pressure detection resolution for applications in artificial intelligence and healthcare systems. Here, we describe the suggested method and discuss preliminary sensor results.

关键词： Temperature sensors Resistance Films Temperature measurement Skin Transistors

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Ultra-Low Power Relaxation Oscillators survey: Design Trends and Challenges

Ultra-Low Power Relaxation Oscillators survey: Design Trends...

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PhD Research in microelectronics and Electronics Latin America (PRIME-LA)

作者： William Teles Medeiros Hamilton Klimach Sergio Bampi Microelectronics Graduate Program - UFRGS - Porto Alegre RS Brazil UFRGS - Porto Alegre RS Brazil

ISBN: (数字)9781728131467

ISBN: (纸本)9781728131474

The Relaxation oscillators (ROSCs) offer a better trade-off between power consumption, physical area and accuracy. This paper presents a study of recently published ultra-low-power relaxation oscillators with low-temperature coefficient, identifying its characteristics, performance parameters, and main challenges. A brief review show as state-of-the-art circuits handle with PVT (Process, voltage, and temperature) variations. By the end of this analysis, some trends in relaxation oscillators design are discussed.

关键词： Oscillators Capacitors Delays Resistors Power demand Switches Temperature sensors

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A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders

A Power-Efficient FFT Hardware Architecture Exploiting Appro...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Guilherme Ferreira Pedro T. L. Pereira Guilherme Paim Eduardo Costa Sergio Bampi Graduate Program in Microelectronics (PGMICRO) Federal University of Rio Grande do Sul (UFRGS) Brazil Graduate Program in Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Brazil

ISBN: (数字)9781728176703

ISBN: (纸本)9781728176710

This work presents an energy-efficient Fast Fourier Transform (FFT) hardware architecture exploiting approximate adder circuits. The FFT hardware architecture consists of a fixed-point fully sequential architecture with a radix-2 butterfly with decimation in time (DIT). In this paper, we explore a set of approximate adders (LOA, ETA-I, Copy-A, Copy-B, Trunc0, Trunc1) in the butterfly by varying the approximation level (K term). The Root-Mean-Square Error (RMSE) metric shows which approximate level term allows the FFT processing without widely signal losses. The results show that our best-proposed FFT employing Trunc0 approximate adder with K =10 saves up to 35% of power dissipation compared to the FFT with the original radix-2 butterfly using the synthesis tool operators.

关键词： Measurement Fast Fourier transforms Circuits and systems Hardware Energy efficiency Topology Power dissipation

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A 0.45 V, 93 pW temperature-compensated CMOS voltage reference

A 0.45 V, 93 pW temperature-compensated CMOS voltage referen...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Arthur Campos de Oliveira David Cordova Hamilton Duarte Klimach Sergio Bampi Microelectronics Graduate Program Federal University of Rio Grande do Sul porto Alegre RS Brazil

ISBN: (纸本)9781509058600

This paper presents a self-biased self-cascode MOSFET (SBSCM) voltage reference that can operate with supply voltages as low as 0.45 V while consuming tens of pW. The voltage reference is generated through the self-cascode MOSFET (SCM) using transistors with different threshold voltages and is implemented in a way that the SCM itself composes the bias circuitry. The proposed topology was implemented in a standard 0.18 μm CMOS process and post-layout simulation results in a reference voltage of 248 mV with temperature coefficient around 7 ppm/ o C for the 0 o C to 125 o C range, while consuming 93 pW at room temperature with 0.45 V of supply voltage. The occupied silicon area is 0.002 mm 2 .

关键词： Threshold voltage Temperature dependence Integrated circuit modeling Semiconductor device modeling MOSFET Standards voltage reference threshold voltage Semiconductor device models integrated circuit modelling metal-oxide-semiconductor field effect transistors temperature dependence supply voltage subcarrier multiplexing Vanadium

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An Efficient NLMS-based VLSI Architecture for Robust FECG Extraction and FHR Processing

An Efficient NLMS-based VLSI Architecture for Robust FECG Ex...

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IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Patrícia U. L. da Costa Guilherme Paim Leandro Rocha Eduardo da Costa Sérgio Almeida Sergio Bampi Graduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Brazil Graduate Program on Microelectronics (PGMicro) - Federal University of Rio Grande do Sul (UFRGS) Brazil

ISBN: (数字)9781728160443

ISBN: (纸本)9781728160450

This work presents an efficient NLMS-based VLSI architecture to extract the fetal electrocardiogram (FECG) and detect the fetal heart rate (FHR), using the adaptive filter strategy. The efficient NLMS-based architecture herein investigated can robustly cancel the high-noised mother-related ECG signals, enabling the FHR measurement. We used the Improved Fetal Pan and Tompkins Algorithm (IFPTA) to detect fetal R-peak and calculate the FHR. Our NLMS-based VLSI architecture effectively detects the R-peaks in the extracted FECG with 93.2% accuracy with the only 2.4 mW of total power dissipation.

关键词： Fetal heart rate Very large scale integration Computer architecture Electrocardiography Hardware Thorax Power dissipation

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