检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

128 篇 会议
28 篇 期刊文献

馆藏范围

156 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

65 篇 工学
- 41 篇 电子科学与技术（可...
- 20 篇 电气工程
- 19 篇 计算机科学与技术...
- 12 篇 材料科学与工程（可...
- 12 篇 软件工程
- 9 篇 化学工程与技术
- 8 篇 动力工程及工程热...
- 6 篇 冶金工程
- 5 篇 机械工程
- 5 篇 仪器科学与技术
- 5 篇 信息与通信工程
- 4 篇 光学工程
- 4 篇 生物医学工程（可授...
- 2 篇 纺织科学与工程
- 2 篇 生物工程
38 篇 理学
- 30 篇 物理学
- 12 篇 数学
- 8 篇 化学
- 6 篇 统计学（可授理学、...
- 3 篇 生物学
- 1 篇 海洋科学
- 1 篇 地球物理学
5 篇 管理学
- 5 篇 管理科学与工程(可...
- 3 篇 工商管理
3 篇 法学
- 3 篇 社会学
3 篇 医学
- 3 篇 临床医学
- 2 篇 基础医学(可授医学...
1 篇 经济学
- 1 篇 应用经济学
1 篇 教育学
- 1 篇 教育学

主题

18 篇 computer archite...
18 篇 hardware
13 篇 threshold voltag...
13 篇 transistors
13 篇 logic gates
12 篇 adders
11 篇 mosfet
9 篇 semiconductor de...
9 篇 power dissipatio...
8 篇 integrated circu...
7 篇 cmos integrated ...
7 篇 standards
7 篇 energy efficienc...
6 篇 tools
6 篇 video coding
6 篇 very large scale...
6 篇 topology
6 篇 capacitors
5 篇 power demand
5 篇 energy consumpti...

机构

13 篇 graduate program...
12 篇 graduate program...
10 篇 microelectronics...
8 篇 graduate program...
7 篇 graduate program...
5 篇 graduate program...
5 篇 ceitec s.a. semi...
4 篇 electrical engin...
4 篇 graduate program...
4 篇 department of el...
4 篇 microelectronics...
4 篇 graduate program...
4 篇 informatics inst...
3 篇 graduate program...
3 篇 microelectronics...
3 篇 senai institute ...
3 篇 electrical engin...
3 篇 graduate program...
3 篇 microelectronics...
3 篇 graduate program...

作者

62 篇 sergio bampi
20 篇 guilherme paim
18 篇 hamilton klimach
17 篇 bampi sergio
10 篇 eric fabris
9 篇 david cordova
9 篇 eduardo costa
8 篇 pedro toledo
7 篇 klimach hamilton
7 篇 tiago r. balen
7 篇 eduardo a. c. da...
7 篇 eduardo da costa
6 篇 pedro t. l. pere...
6 篇 mateus grellert
5 篇 leandro m. g. ro...
5 篇 brito juan pablo...
5 篇 leonardo bandeir...
4 篇 luciano agostini
4 篇 marcelo porto
4 篇 morgana m. a. da...

语言

153 篇 英文
3 篇 中文

检索条件"机构=Graduate Program in Microelectronics"

共 156 条记录，以下是71-80 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Low cost automatic test vector generation for structural analog testing 18

Low cost automatic test vector generation for structural ana...

引用

18th IEEE Latin-American Test Symposium, LATS 2017

作者： Chinazzo, André L. De Aguirre, Paulo C. Comassetto Balen, Tiago R. Microelectronic System Design Group Technische Universität Kaiserslautern Kaiserslautern Germany Universidade Federal Do Pampa Alegrete RS Brazil Graduate Program on Microelectronics Universidade Federal Do Rio Grande Do sul Porto Alegre RS Brazil

ISBN: (纸本)9781538604151

This work presents a low cost automatic method to test vector generation for defect-oriented structural analog testing. An optimal set of analog single tone signals is obtained by computing the frequency response of circuit nodes, while iteratively injecting faults, using a SPICE simulator. The method also allows to identify the nodes of the circuit with higher observabilities to the injected faults, by comparing the obtained fault coverage as a function of frequency. A 130 nm ΣΔ modulator is used as case study to validate the technique under fault injection campaigns. Up to 100% fault coverage is obtained depending on the number of test points. A trade-off is identified, in such a way that a single test point may be used, achieving 95% of fault coverage. The optimized sets of single tone signals can be either combined in a multi-tone testing strategy or sequentially applied during the test application phase. © 2017 IEEE.

关键词： Frequency response

来源：评论

学校读者我要写书评

暂无评论

Energy-efficient Gaussian filter for image processing using approximate adder circuits

Energy-efficient Gaussian filter for image processing using ...

引用

IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： R. Oliveira Julio Leonardo B. Soares E. A. C. Costa Sergio Bampi Graduate Program on Electronic Engineering and Computing Universidade Catolica de Pelotas Pelotas Rio Grande do Sul BR Graduate Program on Microelectronics (PGMicro) Federal University of Rio Grande do Sul (UFRGS) Pelotas / Porto Alegre Brazil Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPEL) Graduate Program on Microelectronics (PGMicro) Universidade Federal do Rio Grande do Sul Porto Alegre RS BR

This paper proposes the use of approximate adder circuits for 3×3 and 5×5 Gaussian filter implementations. The Gaussian filter is a convolution operator which is used to blur images and to remove noise, whose convolution implementation can be designed in hardware using only shifts and addition operations. In this work we evaluate the levels of approximations in computing or loss of accuracy in the arithmetic dataflow that the Gaussian filter can tolerate for a set of eight images. Our work deals with different levels of approximation in Ripple Carry Adders (RCA) which are part of the Gaussian filters adder tree implemented in hardware, and later compared to the best precise implementation of the same filter. Our results show an average energy savings of up to 40% and 25% for the approximate 3×3 and 5×5 Gaussian filters, respectively, without compromising the overall filtered images quality.

关键词： Adders Finite impulse response filters Kernel Energy efficiency Convolution Energy consumption Image processing

来源：评论

学校读者我要写书评

暂无评论

Exploring Efficient Adder Compressors for Power-Efficient Sum of Squared Differences Design

Exploring Efficient Adder Compressors for Power-Efficient Su...

引用

IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Morgana M. A. da Rosa Guilherme Paim Leandro M.G. Rocha Eduardo A.C. da Costa Sergio Bampi Graduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil Graduate Program on Microelectronics (PGMicro) Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil

ISBN: (数字)9781728160443

ISBN: (纸本)9781728160450

This work explores the 8-2 adder compressor in the addition tree of the Sum of Squared Differences (SSD) architecture. SSD is a distortion metric of the motion estimation in the High-Efficiency Video Coding (HEVC) standard. Distortion metrics are the most time-consuming operations of the encoder. SSD hardware architecture consists of a sum tree that accumulates the calculation of the partial values. The addition tree in the SSD opens an opportunity of exploring efficient addition schemes such as the combinations of efficient adder compressors. The SSD architectures herein presented are compared regarding power dissipation using real video sequences. Our work overcomes the state-of-the-art related work which they investigated different SSD hardware architectures concluding that employing the synthesis tool arithmetic operators are the best choice to reduce the power dissipation. According to our results, we reveal that the SSD employing the 8-2 hierarchical adder compressor combined with a Brent-Kung adder in the final sum saves on average 29.4 % of total power dissipation, when comparing with SSD implemented using the arithmetic operators automatically selected by the synthesis tool.

关键词： Compressors Adders Logic gates Computer architecture Tools Measurement Distortion

来源：评论

学校读者我要写书评

暂无评论

Energy-Efficient Haar Transform Architectures Using Efficient Addition Schemes

Energy-Efficient Haar Transform Architectures Using Efficien...

引用

IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Henrique Seidel Morgana da Rosa Guilherme Paim Eduardo da Costa Sergio Almeida Sergio Bampi Graduate Program on Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil Graduate Program on Microelectronics (PGMicro) Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil

ISBN: (数字)9781728134277

ISBN: (纸本)9781728134284

This paper proposes an energy-efficient Haar transform architecture using efficient adders circuits. Nine levels of decomposition in a fixed-point format are used in the architectures. The Processing Module (PM) of Haar explores efficient Parallel Prefix Adders (PPA) and adder compressors. Since power-of-two operations approximate one of the inputs of the PM module, efficient adder compressors implement them. It allowed a very high precision adjustment of the transform coefficient. The architectures were described in VHDL and synthesized using the ST 65nm CMOS cell library. The results show that the Haar architecture with 4-2 and 5-2 compressors in the PM module, both with the recombination line with a Sklansky (SK) adder, is more efficient. It has a reduction of 33.6% in the cell area, with a 35.7% reduction in total power in comparison with the literature. Moreover, the Haar architecture with 4-2 and 5-2 adder compressors is more efficient than the one using the tool-selected implementation of the behavioral "+" (sum) in VHDL, with 23% of power reduction.

关键词： Adders Compressors Computer architecture Discrete wavelet transforms Microprocessors

来源：评论

学校读者我要写书评

暂无评论

The Radix-2m Squared Multiplier

The Radix-2m Squared Multiplier

引用

IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Morgana M. A. da Rosa Guilherme Paim Leandro M. G. Rocha Eduardo A. C. da Costa Sergio Bampi Graduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil Graduate Program on Microelectronics (PGMICRO) Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil

ISBN: (数字)9781728160443

ISBN: (纸本)9781728160450

Multipliers are present in a large variety of applications. However, it is usually responsible for most of the power dissipation. On the other hand, the squared multiplier is a particular case of the general-purpose multiplier, in which both operands are the same, proportioning many architecture optimizations. This paper introduces the radix-2 m squared array multiplier architecture. Our architecture proposal for the squared multiplier is the first to reduces the partial products by splitting the operands into mbit groups. Our squared multiplier architecture explores different adder schemes in the multipliers adder tree. As a case study, we demonstrate our squared multiplier proposal for m=2 (radix-4). We investigated the Wallace and Dadda addition trees employing as final carry propagating adder (CPA) the Ripple Carry adder (RCA) and with the adder automatically selected by the synthesis tool. Our best radix-4 squared multiplier proposal employs the Dadda technique and the RCA to implement the adder tree, showing significant energy savings of 20.5%, 56.5%, and 47.4%, for 8, 16, and 32 bits, respectively, compared to the squared multiplier automatically selected by the synthesis tool. Furthermore, our best radix-4 squared multiplier proposal outperforms the Vedic squared multiplier with energy savings in about 21.5%, 71.0%, and 9.0%, respectively, for 8, 16, and 32 bits.

关键词： Adders Tools Proposals Vegetation Computer architecture Optimization Logic gates

来源：评论

学校读者我要写书评

暂无评论

Improving the Partial Product Tree Compression on Signed Radix-2m Parallel Multipliers

Improving the Partial Product Tree Compression on Signed Rad...

引用

Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS)

作者： Leandro M. G. Rocha Morgana Macedo Guilherme Paim Eduardo Costa Sergio Bampi Graduate Program in Microelectronics (PGMicro) - Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil Graduate Program on Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (数字)9781728170442

ISBN: (纸本)9781728170459

Arithmetic operations are intrinsic to any embedded devices, and they usually have a significant impact on the circuit speed, area, and power consumption. Applications like video processing, digital signal processing, machine learning, among others, rely heavily on multipliers to execute their algorithms. Radix-2 m multipliers have been reported as one of the most power-efficient circuits. However, their architecture has not been explored nor optimized to improve the circuit quality. This work proposed two sign extension optimization techniques for these multipliers, aiming for better power efficiency and a smaller area. The baseline radix-4 (m=2) multiplier and its optimized versions were synthesized in a commercial 65nm technology to evaluate their performance. Results show that the optimized versions achieve power efficiency gains from 16.4% up to 78.6%, with circuit area reduction up to 49.2%.

关键词： Adders Optimization Power dissipation Computer architecture Digital signal processing Signal processing algorithms Standards

来源：评论

学校读者我要写书评

暂无评论

Stable ring oscillator for ultra low supply voltages

Stable ring oscillator for ultra low supply voltages

引用

IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Luis Henrique Rodovalho Eric Fabris Hamilton Klimach Microelectronics Graduate Program Federal University of Rio Grande do Sul Porto Alegre Rio Grande do Sul

This paper presents an alternative to crystal based oscillators for reference frequencies in highly integrated SoCs. The frequency reference through the usage of an active bias controlled ring oscillator operating with a supply voltage from 300 to 500 mV for an temperature from -40 to 125 ° C. The oscillator shows a very good temperature and supply voltage frequency stability coming from the active biasing using a stable current reference.

关键词： Ring oscillators Thermal stability Transistors Inverters Circuit stability Stability analysis

来源：评论

学校读者我要写书评

暂无评论

LEX - A Cell Switching Arcs Extractor: A Simple SPICE-Input Interface for Electrical Characterization

LEX - A Cell Switching Arcs Extractor: A Simple SPICE-Input ...

引用

IEEE Computer Society Annual Symposium on VLSI

作者： Rodrigo N. Wuerdig Vitor H. Maciel Ricardo Reis Sergio Bampi Graduate Program in Microelectronics (PGMICRO) Universidade Federal do Rio Grande do Sul (UFRGS) Porto Alegre Brazil

The characterization of logic cells is a critical step in the design of digital circuits. Existing open-source cell characterization tools typically require significant extra information beyond the SPICE netlist. In this paper, we present a new open-source tool - LEX - that serves as a very useful interface for these characterization tools, enabling the extraction of essential input and output information, Boolean expressions, truth tables, and transition (switching) arcs directly from the SPICE netlist. Our LEX tool offers several advantages over existing open-source methods. First, it simplifies the cell electrical characterization process by eliminating the need for manual input of additional information. This saves time and reduces the incidence of errors. Second, our tool provides a more comprehensive set of information than existing tools, including Boolean expressions and truth tables. Third, LEX is highly flexible and can be integrated with a wide range of existing open-source cell characterization tools. We conducted experiments using a test set of netlists to demonstrate LEX effectiveness. By providing a more comprehensive set of information, eliminating the need for manual input of additional information, and improving efficiency, our tool offers a powerful new option to be integrated into already existing and future open-source characterization tools.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Exploiting Partial Distortion Elimination in the Sum of Absolute Differences for Energy-Efficient HEVC Integer Motion Estimation

Exploiting Partial Distortion Elimination in the Sum of Abso...

引用

Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： Brunno Abreu Gustavo Santana Mateus Grellert Guilherme Paim Leandro Rocha Eduardo A. C. da Costa Sergio Bampi Graduate Program in Microelectronics (PGMicro) Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil Graduate Program in Electronic Engineering and Computing Catholic University of Pelotas (UCPel) Pelotas Brazil

ISBN: (纸本)9781538674321

Integer Motion Estimation (IME) is an important tool that explores the temporal redundancies in video encoders. It stands out among the most time-consuming and memory intensive tasks in the encoding process. Most of the IME processing is spent on the computation of similarities between pixel blocks, usually using the Sum of Absolute Differences (SAD) as block selection criterion. Designing high-throughput and energy-efficient SAD units is an effective way of increasing the performance of IME architectures. This paper proposes an optimization of SAD units considering the state-of-the-art High Efficiency Video Coding (HEVC) standard, which avoids the computation of candidates that will surely not be selected in the IME search, by applying Partial Distortion Elimination (PDE). The method achieves, without any loss in coding performance, an average reduction of 16.41% and 11.64% in the energy consumption for 1080p and 2160p (4K) videos, respectively, when compared to an HEVC SAD implementation without PDE.

关键词： Encoding Software Motion estimation Computer architecture Video coding Hardware Software algorithms

来源：评论

学校读者我要写书评

暂无评论

Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations

Boosting the Efficiency of the Harmonics Elimination VLSI Ar...

引用

IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Patricia da Costa Pedro T. L. Pereira Guilherme Paim Eduardo da Costa Sergio Bampi Graduate Program in Microelectronics (PGMICRO) - Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil Graduate Program in Electronic Engineering and Computing - Catholic University of Pelotas (UCPel) Pelotas Brazil

Approximate computing emerged as a key alternative for trading off accuracy against energy efficiency and area reduction. Error-tolerant applications, such as multimedia processing, machine learning, and signal processing, can process the information with lower-than-standard accuracy at the circuit level while still fulfilling a good and acceptable service quality at the application level. Adaptive filtering-based systems have been demonstrating high resiliency against hardware errors due to their intrinsic self-healing characteristic. This paper investigates the design space exploration of arithmetic approximations in a Very Large-Scale Integration (VLSI) harmonic elimination (HE) hardware architecture based on Least Mean Square (LMS) adaptive filters. We evaluate the Pareto front of the area- and power versus quality curves by relaxing the arithmetic precision and by adopting both approximate multipliers (AxMs) in combination with approximate adders (AxAs). This paper explores the benefits and impacts of the Dynamic Range Unbiased (DRUM), Rounding-based Approximate (RoBA), and Leading one Bit-based Approximate (LoBA) multipliers in the power dissipation, circuit area, and quality of the VLSI HE architectures. Our results highlight the LoBA 0 as the most efficient AxM applied in the HE architecture. We combine the LoBA 0 with Copy and LOA AxAs with variations in the approximation level (L). Notably, LoBA 0 and LOA with $L=6$ resulted in savings of 43.7% in circuit area and 45.2% in power dissipation, compared to the exact HE, which uses multiplier and adder automatically selected by the logic synthesis tool. Finally, we demonstrate that the best hardware architecture found in our investigation successfully eliminates the contaminating spurious noise (i.e., 60 Hz and its harmonics) from the signal.

关键词： Power quality Computer architecture Very large scale integration Harmonic analysis Boosting Hardware Power dissipation

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共16页 << < 4 5 6 7 8 9 10 11 12 13 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：