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RE-SEGNN:recurrent semantic evidence-aware graph neural network for temporal knowledge graph forecasting

science China(Information sciences) 2025年第2期68卷 103-119页

作者： Wenyu CAI Mengfan LI Xuanhua SHI Yuanxin FAN Quntao ZHU Hai JIN National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and Technology

Temporal knowledge graph(TKG) reasoning, has seen widespread use for modeling real-world events, particularly in extrapolation settings. Nevertheless, most previous studies are embedded models, which require both entity and relation embedding to make predictions, ignoring the semantic correlations among different entities and relations within the same timestamp. This can lead to random and nonsensical predictions when unseen entities or relations occur. Furthermore, many existing models exhibit limitations in handling highly correlated historical facts with extensive temporal depth. They often either overlook such facts or overly accentuate the relationships between recurring past occurrences and their current counterparts. Due to the dynamic nature of TKG, effectively capturing the evolving semantics between different timestamps can be *** address these shortcomings, we propose the recurrent semantic evidenceaware graph neural network(RE-SEGNN), a novel graph neural network that can learn the semantics of entities and relations simultaneously. For the former challenge, our model can predict a possible answer to missing quadruples based on semantics when facing unseen entities or relations. For the latter problem, based on an obvious established force, both the recency and frequency of semantic history tend to confer a higher reference value for the current. We use the Hawkes process to compute the semantic trend, which allows the semantics of recent facts to gain more attention than those of distant facts. Experimental results show that RE-SEGNN outperforms all SOTA models in entity prediction on 6 widely used datasets, and 5 datasets in relation prediction. Furthermore, the case study shows how our model can deal with unseen entities and relations.

关键词： knowledge graph reasoning temporal knowledge graph Hawkes process semantic evidence

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Minimal Context-Switching Data Race Detection with Dataflow Tracking

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Journal of computer science & Technology 2024年第1期39卷 211-226页

作者：郑龙李洋辛杰刘海峰郑然廖小飞金海 National Engineering Research Center for Big Data Technology and System School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Services Computing Technology and System Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China

Data race is one of the most important concurrent anomalies in multi-threaded *** con-straint-based techniques are leveraged into race detection,which is able to find all the races that can be found by any oth-er sound race ***,this constraint-based approach has serious limitations on helping programmers analyze and understand data ***,it may report a large number of false positives due to the unrecognized dataflow propa-gation of the ***,it recommends a wide range of thread context switches to schedule the reported race(in-cluding the false one)whenever this race is exposed during the constraint-solving *** ad hoc recommendation imposes too many context switches,which complicates the data race *** address these two limitations in the state-of-the-art constraint-based race detection,this paper proposes DFTracker,an improved constraint-based race detec-tor to recommend each data race with minimal thread context ***,we reduce the false positives by ana-lyzing and tracking the dataflow in the *** this means,DFTracker thus reduces the unnecessary analysis of false race *** further propose a novel algorithm to recommend an effective race schedule with minimal thread con-text switches for each data *** experimental results on the real applications demonstrate that 1)without removing any true data race,DFTracker effectively prunes false positives by 68%in comparison with the state-of-the-art constraint-based race detector;2)DFTracker recommends as low as 2.6-8.3(4.7 on average)thread context switches per data race in the real world,which is 81.6%fewer context switches per data race than the state-of-the-art constraint based race ***,DFTracker can be used as an effective tool to understand the data race for programmers.

关键词： data race satisfiability modulo theory multi-threaded program dynamic detection

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Secure Speculation via Speculative Secret Flow Tracking

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Journal of computer science & Technology 2023年第2期38卷 422-438页

作者：崔宏伟杨春程旭 School of Computer Science Engineering Research Center of Microprocessor and System Peking UniversityBeijing 100871China

Speculative execution attacks can leak arbitrary program data under malicious speculation,presenting a severe security *** on two key observations,this paper presents a software-transparent defense mechanism called speculative secret flow tracking(SSFT),which is capable of defending against all cache-based speculative execution attacks with a low performance ***,we observe that the attacker must use array or pointer variables in the victim code to access arbitrary memory ***,we propose a strict definition of secret data to reduce the amount of data to be ***,if the load is not data-dependent and control-dependent on secrets,its speculative execution will not leak any ***,this paper introduces the concept of speculative secret flow to analyze how secret data are obtained and propagated during speculative *** tracking speculative secret flow in hardware,SSFT can identify all unsafe speculative loads(USLs)that are dependent on ***,SSFT exploits three different methods to constrain USLs’speculative execution and prevent them from leaking secrets into the cache and translation lookaside buffer(TLB)*** paper evaluates the performance of SSFT on the SPEC CPU 2006 workloads,and the results show that SSFT is effective and its performance overhead is very *** defend against all speculative execution attack variants,SSFT only incurs an average slowdown of 4.5%(Delay USL-L1Miss)or 3.8%(Invisible USLs)compared to a non-secure *** analysis also shows that SSFT maintains a low hardware overhead.

关键词： cache side channel attack hardware speculative execution attack security

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Towards High-Performance Graph Processing: From a Hardware/Software Co-Design Perspective

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Journal of computer science & Technology 2024年第2期39卷 245-266页

作者：廖小飞赵文举金海姚鹏程黄禹王庆刚赵进郑龙张宇邵志远 National Engineering Research Center for Big Data Technology and System School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Services Computing Technology and System Laboratory School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Zhejiang Lab Hangzhou 311121China

Graph processing has been widely used in many scenarios,from scientific computing to artificial *** processing exhibits irregular computational parallelism and random memory accesses,unlike traditional ***,running graph processing workloads on conventional architectures(e.g.,CPUs and GPUs)often shows a significantly low compute-memory ratio with few performance benefits,which can be,in many cases,even slower than a specialized single-thread graph *** domain-specific hardware designs are essential for graph processing,it is still challenging to transform the hardware capability to performance boost without coupled software *** article presents a graph processing ecosystem from hardware to *** start by introducing a series of hardware accelerators as the foundation of this ***,the codesigned parallel graph systems and their distributed techniques are presented to support graph ***,we introduce our efforts on novel graph applications and hardware *** results show that various graph applications can be efficiently accelerated in this graph processing ecosystem.

关键词： graph processing hardware accelerator software system high performance ecosystem

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Precise control of page cache for containers

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Frontiers of computer science 2024年第2期18卷 17-30页

作者： Kun WANG Song WU Shengbang LI Zhuo HUANG Hao FAN Chen YU Hai JIN National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing Lab School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China

Container-based virtualization isbecoming increasingly popular in cloud computing due to its efficiency and *** isolation is a fundamental property of *** works have indicated weak resource isolation could cause significant performance degradation for containerized applications and enhanced resource ***,current studies have almost not discussed the isolation problems of page cache which is a key resource for *** leverage memory cgroup to control page cache ***,existing policy introduces two major problems in a container-based ***,containers can utilize more memory than limited by their cgroup,effectively breaking memory ***,the Os kernel has to evict page cache to make space for newly-arrived memory requests,slowing down containerized *** paper performs an empirical study of these problems and demonstrates the performance impacts on containerized *** we propose pCache(precise control of page cache)to address the problems by dividing page cache into private and shared and controlling both kinds of page cache separately and *** do so,pCache leverages two new technologies:fair account(f-account)and evict on demand(EoD).F-account splits the shared page cache charging based on per-container share to prevent containers from using memory for free,enhancing memory *** EoD reduces unnecessary page cache evictions to avoid the performance *** evaluation results demonstrate that our system can effectively enhance memory isolation for containers and achieve substantial performance improvement over the original page cache management policy.

关键词： page cache memory cgroup container isolation cloud computing

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A hybrid memory architecture supporting fine-grained data migration

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Frontiers of computer science 2024年第2期18卷 31-41页

作者： Ye CHI Jianhui YUE Xiaofei LIAO Haikun LIU Hai JIN National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Department of Computer Science Michigan Technological UniversityMichigan 49931USA

Hybrid memory systems composed of dynamic random access memory(DRAM)and Non-volatile memory(NVM)often exploit page migration technologies to fully take the advantages of different memory *** previous proposals usually migrate data at a granularity of 4 KB pages,and thus waste memory bandwidth and DRAM *** this paper,we propose Mocha,a non-hierarchical architecture that organizes DRAM and NVM in a flat address space physically,but manages them in a cache/memory *** the commercial NVM device-Intel Optane DC Persistent Memory Modules(DCPMM)actually access the physical media at a granularity of 256 bytes(an Optane block),we manage the DRAM cache at the 256-byte size to adapt to this feature of *** design not only enables fine-grained data migration and management for the DRAM cache,but also avoids write amplification for Intel Optane *** also create an Indirect Address Cache(IAC)in Hybrid Memory Controller(HMC)and propose a reverse address mapping table in the DRAM to speed up address translation and cache ***,we exploit a utility-based caching mechanism to filter cold blocks in the NVM,and further improve the efficiency of the DRAM *** implement Mocha in an architectural *** results show that Mocha can improve application performance by 8.2%on average(up to 24.6%),reduce 6.9%energy consumption and 25.9%data migration traffic on average,compared with a typical hybrid memory architecture-HSCC.

关键词： non-volatile memory hybrid memory system data migration fine-grained caching

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Answering reachability queries with ordered label constraints over labeled graphs

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Frontiers of computer science 2024年第1期18卷 105-117页

作者： Daoliang HE Pingpeng YUAN Hai JIN National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science&TechnologyHuazhong University of Science and TechnologyWuhan 430074China

Reachability query plays a vital role in many graph analysis *** researches proposed many methods to efficiently answer reachability queries between vertex *** many real graphs are labeled graph,it highly demands Label-Constrained Reachability(LCR)query inwhich constraint includes a set of labels besides vertex *** researches proposed several methods for answering some LCR queries which require appearance of some labels specified in constraints in the *** that constraint may be a label set,query constraint may be ordered labels,namely OLCR(Ordered-Label-Constrained Reachability)queries which retrieve paths matching a sequence of ***,no solutions are available for ***,we propose DHL,a novel bloom filter based indexing technique for answering OLCR *** can be used to check reachability between vertex *** the answers are not no,then constrained DFS is ***,we employ DHL followed by performing constrained DFS to answer OLCR *** show that DHL has a bounded false positive rate,and it's powerful in saving indexing time and *** experiments on 10 real-life graphs and 12 synthetic graphs demonstrate that DHL achieves about 4.8-22.5 times smaller index space and 4.6-114 times less index construction time than two state-of-art techniques for LCR queries,while achieving comparable query response *** results also show that our algorithm can answer OLCR queries effectively.

关键词： graph ordered-label-constrained reachability partial index bloom filter query processing

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Large circuit models: opportunities and challenges

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science China(Information sciences) 2024年第10期67卷 25-66页

作者： Lei CHEN Yiqi CHEN Zhufei CHU Wenji FANG Tsung-Yi HO Ru HUANG Yu HUANG Sadaf KHAN Min LI Xingquan LI Yu LI Yun LIANG Jinwei LIU Yi LIU Yibo LIN Guojie LUO Hongyang PAN Zhengyuan SHI Guangyu SUN Dimitrios TSARAS Runsheng WANG Ziyi WANG Xinming WEI Zhiyao XIE Qiang XU Chenhao XUE Junchi YAN Jun YANG Bei YU Mingxuan YUAN Evangeline F.Y.YOUNG Xuan ZENG Haoyi ZHANG Zuodong ZHANG Yuxiang ZHAO Hui-Ling ZHEN Ziyang ZHENG Binwu ZHU Keren ZHU Sunan ZOU Huawei Noah’s Ark Lab School of Integrated Circuits Peking University Faculty of Electrical Engineering and Computer Science Ningbo University Department of Electronic and Computer Engineering Hong Kong University of Science and Technology Department of Computer Science and Engineering The Chinese University of Hong Kong School of Integrated Circuits Southeast University Huawei HiSilicon Peng Cheng Laboratory School of Computer Science Peking University School of Microelectronics State Key Laboratory of Integrated Chips and System Fudan University School of Artificial Intelligence Shanghai Jiao Tong University

Within the electronic design automation(EDA) domain, artificial intelligence(AI)-driven solutions have emerged as formidable tools, yet they typically augment rather than redefine existing methodologies. These solutions often repurpose deep learning models from other domains, such as vision, text, and graph analytics, applying them to circuit design without tailoring to the unique complexities of electronic circuits. Such an “AI4EDA” approach falls short of achieving a holistic design synthesis and understanding,overlooking the intricate interplay of electrical, logical, and physical facets of circuit data. This study argues for a paradigm shift from AI4EDA towards AI-rooted EDA from the ground up, integrating AI at the core of the design process. Pivotal to this vision is the development of a multimodal circuit representation learning technique, poised to provide a comprehensive understanding by harmonizing and extracting insights from varied data sources, such as functional specifications, register-transfer level(RTL) designs, circuit netlists,and physical layouts. We champion the creation of large circuit models(LCMs) that are inherently multimodal, crafted to decode and express the rich semantics and structures of circuit data, thus fostering more resilient, efficient, and inventive design methodologies. Embracing this AI-rooted philosophy, we foresee a trajectory that transcends the current innovation plateau in EDA, igniting a profound “shift-left” in electronic design methodology. The envisioned advancements herald not just an evolution of existing EDA tools but a revolution, giving rise to novel instruments of design-tools that promise to radically enhance design productivity and inaugurate a new epoch where the optimization of circuit performance, power, and area(PPA) is achieved not incrementally, but through leaps that redefine the benchmarks of electronic systems' capabilities.

关键词： AI-rooted EDA large circuit models (LCMs) multimodal circuit representation learning circuit optimization

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Resource investment for DDoS attack resistant SDN: a practical assessment

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science China(Information sciences) 2023年第7期66卷 112-129页

作者： Bin YUAN Fan ZHANG Jun WAN Huan ZHAO Shui YU Deqing ZOU Qiangsheng HUA Hai JIN School of Cyber Science and Engineering Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Hubei Engineering Research Center on Big Data Security Shenzhen Huazhong University of Science and Technology Research Institute School of Computer Science and Technology Huazhong University of Science and Technology Cluster and Grid Computing Lab School of Computer Science University of Technology Sydney

Software-defined networks(SDNs) present a novel network architecture that is widely used in various datacenters. However, SDNs also suffer from many types of security threats, among which a distributed denial of service(DDoS) attack, which aims to drain the resources of SDN switches and controllers,is one of the most common. Once the switch or controller is damaged, the network services can be *** defense schemes against DDoS attacks have been proposed from the perspective of attack detection;however, such defense schemes are known to suffer from a time consuming and unpromising accuracy, which could result in an unavailable network service before specific countermeasures are taken. To address this issue through a systematic investigation, we propose an elaborate resource-management mechanism against DDoS attacks in an SDN. Specifically, by considering the SDN topology, we leverage the M/M/c queuing model to measure the resistance of an SDN to DDoS attacks. Network administrators can therefore invest a reasonable number of resources into SDN switches and SDN controllers to defend against DDoS attacks while guaranteeing the quality of service(QoS). Comprehensive analyses and empirical data-based experiments demonstrate the effectiveness of the proposed approach.

关键词： SDN security DDoS attacks resource management queueing theory QoS

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Orbit-Orbit Interaction in Spatiotemporal Optical Vortex

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engineering 2025年第2期45卷 44-51页

作者： Jian Chen Jie Zhao Xi Shen Dewei Mo Cheng-Wei Qiu Qiwen Zhan School of Optical-Electrical and Computer Engineering University of Shanghai for Science and TechnologyShanghai 200093China Shanghai Key Laboratory of Modern Optical System University of Shanghai for Science and TechnologyShanghai 200093China Department of Electrical and Computer Engineering National University of SingaporeSingapore 117583Singapore

While spin-orbit interaction has been extensively studied,few investigations have reported on the interaction between orbital angular momenta(OAMs).In this work,we study a new type of orbit-orbit coupling between the longitudinal OAM and the transverse OAM carried by a three-dimensional(3D)spatiotemporal optical vortex(STOV)in the process of tight *** 3D STOV possesses orthogonal OAMs in the x-y,t-x,and y-t planes,and is preconditioned to overcome the spatiotemporal astigmatism effect.x,y,and t are the axes in the spatiotemporal *** corresponding focused wavepacket is calculated by employing the Debye diffraction theory,showing that a phase singularity ring is generated by the interactions among the transverse and longitudinal vortices in the highly confined *** Fourier-transform decomposition of the Debye integral is employed to analyze the mechanism of the orbit-orbit *** is the first revelation of coupling between the longitudinal OAM and the transverse OAM,paving the way for potential applications in optical trapping,laser machining,nonlinear light-matter interactions,and more.

关键词： Spatiotemporal optical vortex Orbital angular momentum Momentum interaction Highly confined wavepacket Diffraction

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