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Parallel algorithms for force directed scheduling of flattened and hierarchical signal flow graphs

Parallel algorithms for force directed scheduling of flatten...

引用

IEEE International Conference on computer Design: VLSI in computers and Processors, (ICCD)

作者： P. Prabhakaran P. Banerjee Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois Urbana IL USA Center for Parallel and Distributed Computing Department of Electrical and Computer Engineering Northwestern University Evanston IL USA

In this paper we present some novel algorithms for scheduling hierarchical signal flow graphs in the domain of high-level synthesis. There are several key contributions of this paper. First, we develop a novel extension of the force directed scheduling problem which naturally handles loops and conditionals by coming up with a scheme of scheduling hierarchical signal flow graphs. Second, we develop three new parallel algorithms for the scheduling problem. Third, our parallel algorithms are portable across a wide range of parallel platforms. We report results on a set of high-level synthesis benchmarks on 8-processor SGI Challenge and a network of 4 SUN SPARCstation5 work stations. Finally, while some parallel algorithms for VLSI CAD reported by earlier researchers have reported a loss of qualities of results, our parallel algorithms produce exactly the same results as the sequential algorithms on which they are based.

关键词： Parallel algorithms Flow graphs Processor scheduling Concurrent computing Scheduling algorithm Contracts Cost function Broadcasting

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Automatic Refactoring of Legacy Fortran Code to the Array Slicing Notation

Automatic Refactoring of Legacy Fortran Code to the Array Sl...

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International Conference on Parallel and Distributed Systems (ICPADS)

作者： Chandrasehar Rajaseharan Wen Jun Tan Wai Teng Tang Stephen John Turner Shyh-Hao Kuo Rick Siow Mong Goh Weng-Fai Wong School of Computer Engineering Nanyang Technological University Singapore Agency for Science Technology and Research Institute of High Performance Computing Singapore Agency for Science Technology and Research Singapore SG Department of Computer Science National University of Singapore Singapore

There are many legacy Fortran programs still in use today, especially scientific codes which were written decades ago. Many of these codes use explicit DO-loops in programs that tend to clutter the code and make it harder to understand and maintain. Modern features of the Fortran language, such as the array slicing notation and introduction of commonly used intrinsic functions, go a long way in helping programmers write code that is easier to read and maintain. We introduce a refactoring tool that can help to transform code to make use of the array slicing notation and related intrinsic functions.

关键词： Arrays Educational institutions Jacobian matrices Optimization Java Clutter Transforms

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Moment Invariants with Data Augmentation for Tongue Image Segmentation

Moment Invariants with Data Augmentation for Tongue Image Se...

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2021 IEEE International Conference on Bioinformatics and Biomedicine, BIBM 2021

作者： Lin, Senlin Song, Xuekun Xu, Ziheng Zhang, Xinyue Lin, Yinqing Zhang, Rui Chen, Yulong Zhang, Fa Qiu, Dehui Zheng, Yuling Wan, Xiaohua Institute of Computing Technology Chinese Academy of Sciences High Performance Computer Research Center Beijing China University of Chinese Academy of Sciences Beijing China Henan University of Chinese Medicine Henan China The First Affiliated Hospital of Henan University of Chinese Medicine Henan China Information Engineering College Capital Normal University Beijing China Department of Computer Science Shantou University Shantou China

ISBN: (纸本)9781665401265

Tongue diagnosis plays an essential role in diagnosing the syndrome types, pathological types, lesion location and clinical stages of cancers in Traditional Chinese Medicine (TCM). The quality of the tongue image datasets is crucial to tongue image segmentation in modern tongue diagnosis. However, the tongue image dataset maintains a challenging problem because of the lack of datasets for the sublingual image, the complexity and scarcity of the tongue images. In this paper, we propose an effective segmentation framework for tongue images, called Moment Invariants with Data Augmentation (DAMI), which can be flexibly applied to different segmentation models. To overcome over-fitting caused by excessive data augmentation, a data augmentation module with random transformations is designed to achieve appropriate data augmentation. Meanwhile, we develop a new moment invariants module to optimize data augmentation in image segmentation. In addition, a novel tongue image dataset, Lingual-Sublingual Image Dataset (LSID), has been established for the classification and segmentation of tongue or sublingual veins. Experimental results confirm that the models using DAMI can remarkably outperform the existing methods on LID, SID and BioHit for the tongue image segmentation. © 2021 IEEE.

关键词： Image segmentation

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Malware behavioral analysis system: TWMAN

Malware behavioral analysis system: TWMAN

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IEEE Symposium on Intelligent Agents, IA

作者： Hsien-De Huang Chang-Shing Lee Hung-Yu Kao Yi-Lang Tsai Jee-Gong Chang National Center of High-Performance Computing National Applied Research Laboratories Tainan Taiwan Department Computer Science and Information Engineering National University of Tainan Tainan Taiwan Department Computer Science and Information Engineering National Cheng Kung University Tainan Taiwan

Malware is an important topic of security threat research. In this paper, a behavioral malware analysis system TWMAN was presented. This study focuses on using real operation system (OS) environment to analysis malware behavioral. Many researchers try to use virtual machine (VM) system to monitor the malware behaviors. These malware samples will only compromise the virtual operating system or virtual machine, which cannot reflect in the real operating system or real environment. Therefore, some malware researchers don't want their systems to be analyzed in VM environment, because the analyzer cannot much useful information in VM environment. There are many Anti-VM techniques which are used to ward off the collection, analysis, and reverse engineering features of the VM based malware analysis platform. There are differences between these two behaviors: malware behavior in real environment and in virtual environment. Therefore, malware researcher would get inaccurate analysis results from VM based malware analysis platform. In order to retrieve correct malware behavioral information, we need flexible, adaptable, and quickly analysis environment, which could discovery malware behavioral in real operation system environment, and which can quickly restore clear operation system to analysis another malware sample. For this reason, this study developed Taiwan Malware Analysis Net(TWMAN), a real operation system environment for malware behavioral analysis and analysis report. We believe this system would be helpful to improve the correctness of malware analysis result and reduce the loss rate of malware analysis.

关键词： Malware IP networks Internet Software Forensics Image restoration

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A self-consistent SDD-NEGF approach for modelling magnetic tunnel junctions

A self-consistent SDD-NEGF approach for modelling magnetic t...

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作者： Siu, Z.B. Jalil, M.B.A. Tan, S.G. Wang, J.-S. Department of Physics Center for Computational Science and Engineering National University of Singapore 117542 Singapore Singapore Data Storage Institute Agency for Science Technology and Research (A STAR) 117608 Singapore Singapore Information Storage Materials Laboratory Electrical and Computer Engineering Department National University of Singapore 117576 Singapore Singapore Computational Nanoelectronics and Nano-device Laboratory Electrical and Computer Engineering Department National University of Singapore 117576 Singapore Singapore Institute of High Performance Computing Agency for Science Technology and Research (A STAR) 138632 Singapore Singapore

Most contemporary work on magnetic tunnel junctions either consider ballistic quantum transport across the tunneling barrer, for instance via the Non Equilibrium Green's Function (NEGF) formalism, or treat the tunneling region as a lump resistance connected to bulk metallic leads in the Spin Drift-Diffusion (SDD) approach. The effects of interfacial barriers and central device physics on the spin accumlation in the leads have largely been ignored in most NEGF calculations. In this work we introduce a self consistent approach that combines the NEGF and SDD methods. We calculate the effects of the barrier potential height and spin orbit interaction on the spin injection from a ferromagnet to a semiconductor through the barrier. © 2006 IEEE.

关键词： Tunnel junctions

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Transfer Learning for Object Detection using State-of-the-Art Deep Neural Networks

Transfer Learning for Object Detection using State-of-the-Ar...

引用

International Conference on Signal Processing and Integrated Networks (SPIN)

作者： J. Talukdar S. Gupta P. S. Rajpura R. S. Hegde Dept. of Electronics & Communication Engineering Nirma University Ahmedabad Dept. of Computer Engineering & Information Science BITS Pilani Hyderabad Campus High Performance Computing Lab Indian Institute of Technology Gandhinagar

Transfer learning through the use of synthetic images and pretrained convolutional neural networks offers a promising approach to improve the object detection performance of deep neural networks. In this paper, we explore different strategies to generate synthetic datasets and subsequently improve them to achieve better object detection accuracy (mAP) when trained with state-of-the-art deep neural networks, focusing on detection of packed food products in a refrigerator. We develop novel techniques like dynamic stacking, pseudo random placement, variable object pose, distractor noise etc. which not only aid in diversifying the synthetic data but also help in improving the overall object detection mAP by more than 40%. The synthetic images, generated using Blender-Python API, are clustered in a variety of configurations to cater to the diversity of real scenes. These datasets are then utilized to train TensorFlow implementations of state-of-the-art deep neural networks like Faster-RCNN, R-FCN, and SSD and their performance is tested on real scenes. The object detection performance of various deep CNN architectures is also studied, with Faster-RCNN proving to be the most suitable choice, achieving the highest mAP of 70.67.

关键词： Object detection Neural networks Feature extraction Solid modeling Pipelines computer architecture Task analysis

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Programmer Productivity Analyzer Tool

Programmer Productivity Analyzer Tool

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IEEE International Conference on Computational Intelligence and computing Research

作者： Tejaswini Srushti Patil Suman Salimath Venuprasad Naik Ritam Nandi Mahesh S. Patil Indira Bidari Satyadhyan Chickerur Department of Computer Science and Engineering B.V.B.College of Engineering and Technology K L E Technological University Centre for High Performance Computing Hubballi Karnataka 580 031 INDIA

Software companies seek for productive programmer who writes codes that are reusable, maintainable, efficient and documented with coding standards. But companies face challenges in finding and monitoring such programmers due to lack of programmer productivity measuring tools. The available tools are limited to measure parameters like coding standards, bugs and some rule violation. Hence there is need for tools that can measure bad programming constructs, reusability and specific demands of companies in coding to judge a programmer. This paper proposes a novel method and tool to measure programmer productivity based on parameters such as efficient usage of memory and machine cycles. It also assist programmer to improve their productivity. The tool is able to detect 3-4 types and 1-2 types of bad programming constructs in code written by novices and experienced programmers respectively. In future, the tool shall be designed to measure the productivity using other parameters reusability and maintainable.

关键词： Productivity Tools Programming Encoding Standards Companies computer bugs

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Harvest rate of reconfigurable pipelines

Harvest rate of reconfigurable pipelines

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IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

作者： Weiping Shi Ming-Feng Chang W. Kent Fuchs Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois Urbana-Champaign Urbana IL USA Department of Computer Science and Information Engineering National Chiao Tung University Taiwan

Yield analysis for reconfigurable structures is often difficult, due to the defect distribution and irregularity of reconfiguration algorithms. In this paper, the authors give a method to analyze the yield of reconfigurable pipelines for the following model: Given n pipelines with m stages, where each stage of a pipeline is defective with constant probability and spare wires are provided for reconfiguration, the authors calculate the expected percentage of pipelines they can harvest after reconfiguration. By modeling the 'shifting' reconfiguration as weighted chains in a lattice and applying poset theory, they give upper and lower bounds for the harvest rate as a function of m and n.< >

关键词： Pipelines Wires Lattices Very large scale integration Switches Algorithm design and analysis Parallel architectures Supercomputers Equations engineering management

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Parallel algorithms for simultaneous scheduling, binding and floorplanning in high-level synthesis

Parallel algorithms for simultaneous scheduling, binding and...

引用

IEEE International Symposium on Circuits and Systems (ISCAS)

作者： P. Prabhakaran P. Banerjee Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois Urbana-Champaign IL USA Center for Parallel and Distributed Computing Department of Electrical and Computer Engineering Northwestern University Evanston IL USA

With small device features in submicron technologies, interconnection delays play a dominant part in cycle time. Hence, it is important to consider the impact of physical design during high level synthesis. In comparison to a traditional approach which separates high-level synthesis from physical design, an algorithm which is able to make these stages interact very closely, would result in solutions with lower latency and area. However, such an approach could result in increased runtimes. Parallel processing is an attractive way of reducing the runtimes. In this paper, two parallel algorithms for simultaneous scheduling, binding and floorplanning algorithm are presented. A detailed hardware model is considered, taking into account multiplexor and register areas and delays. Experimental results are reported on an IBM SP-2 multicomputer, with close to linear speedups for a set of benchmark circuits.

关键词： Parallel algorithms high level synthesis Runtime Integrated circuit interconnections Delay effects Algorithm design and analysis Parallel processing Scheduling algorithm Hardware Registers

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HAPIC: A Scalable, Lightweight and Reactive Cache for Persistent-Memory-Based Index

HAPIC: A Scalable, Lightweight and Reactive Cache for Persis...

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IEEE International Conference on computer-Aided Design

作者： Chih-Ting Lo Yun-Chih Chen Yuan-Hao Chang Tei-Wei Kuo Department of Computer Science and Information Engineering National Taiwan University Academia Sinica Institute of Information Science Taiwan Department of Computer Science Mohamed bin Zayed University of Artificial Intelligence NTU High Performance and Scientific Computing Center National Taiwan University

In-memory index delivers low-latency responses for data services. It has been ported to high-capacity persistent memory (PM) to accommodate more data. However, read-heavy, extremely-skewed, and highly-dynamic workloads can suffer from degraded performance on PM-based indexes. We present HAPIC, a scalable cache over PM-based indexes to capture the constantly-changing query hotspots in skewed workloads. HAPIC embodies the data access frequency gradient in a hierarchy of hash tables to efficiently identify hotspots and reacts quickly to workload changes with epoch-based promotion. Compared with the state-of-the-art strategy, HAPIC reacts to hotspot shifts significantly faster, with up to 14% higher stable read throughput, 26% lower median latency, and 13% lower P99 latency.

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