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32nd International Conference on high performance computing, ISC high performance 2017

作者： Kuity, Animesh Peddoju, Sateesh Kumar High Performance Computing Lab Department of Computer Science and Engineering Indian Institute of Technology Roorkee247667 India

ISBN: (纸本)9783319676296

Container-based high performance computing (HPC) has started gaining popularity due to its almost negligible performance penalty compared to the BareMetal hardware. Although HPC hardware architectures and programming models are continuously evolving, the platform models are suffering from the HPC community’s awareness. Power-awareness, hardware and application-aware co-design along with security related concerns have attracted the most in recent time to empower the platform models. Otherside, the OpenPOWER ecosystems have stepped into our life to fulfill the thirst of exploiting the last drop of a performance benefit from our invested system. It has Power8 compliant processor with a larger cache, big fat instructions and data path accompanied by the popular coherent accelerator. In this paper, we have proposed a container-based HPC ecosystem established using OpenPOWER machine. The performance of the designed and developed ecosystem is evaluated stressing on different subcomponents of the system such as processor, memory, IO, and interconnect. Finally, the results are compared with the performance of the equivalent environments made of virtual machines and BareMetal hardware. © Springer International Publishing AG 2017.

关键词： Ecosystems

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Towards design of a file location selection system in grid environments

Towards design of a file location selection system in grid e...

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1st International Conference on Hybrid Information Technology

作者： Wu, Tsung-Ying Li, Kuan-Ching Wang, Hsiao-Hsi Hsu, Ching-Hsien Cheng, Kuo-Yang Su, Wei-Shun Lee, Ming-Hsiao National Center of High-performance Computing Taiwan Department of Computer Science and Information Engineering Providence University Taiwan Department of Computer Science and Information Engineering Chung Hua University Taiwan

ISBN: (纸本)9780769526744

Data Grid is one of key factors to build up large-scale dataset storage system and providing high performance computing capacity, by connecting distributed resources in the Grid. One major challenge in data grids is how to provide good and timely access to huge amount of data in distributed locations, given the high latency of interconnection networks. Parallel downloading methods can improve download efficiency and performance, but the download process should have started from appropriate locations for such achievement. In this paper, we present the design of Location Selection System (LSS) for data grid environments, aiming at the problem of downloading locations. The proposed Location Selection System (LSS) not only provides users for setting their own priority strategies, but also provides two downloading modes, manual and automatic. The proposed techniques included as middleware over data grid platforms optimize Me downloads, by improving its efficiency and performance.

关键词： data grid SRB data location selection file selection

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FPGA-accelerated deep convolutional neural networks for high throughput and energy efficiency

FPGA-accelerated deep convolutional neural networks for high...

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作者： Qiao, Yuran Shen, Junzhong Xiao, Tao Yang, Qianming Wen, Mei Zhang, Chunyuan Department of Computer State Key Laboratory of High Performance Computing National University of Defense Technology ChangshaHunan China

Recent breakthroughs in the deep convolutional neural networks (CNNs) have led to great improvements in the accuracy of both vision and auditory systems. Characterized by their deep structures and large numbers of parameters, deep CNNs challenge the computational performance of today. Hardware specialization in the form of field-programmable gate array offers a promising path towards major leaps in computational performance while achieving high-energy efficiency. In this paper, we focus on accelerating deep CNNs using the Xilinx Zynq-zq7045 FPGA SoC. As most of the computational workload can be converted to matrix multiplications, we adopt a matrix multiplier-based accelerator architecture. Dedicated units are designed to eliminate the conversion overhead. We also design a customized memory system according to the memory access pattern of CNNs. To make the accelerator easily usable by application developers, our accelerator supports Caffe, which is a widely used software framework of deep CNN. Different CNN models can be adopted by our accelerator, with good performance portability. The experimental results show that for a typical application of CNN, image classification, an average throughout of 77.8 GFLOPS is achieved, while the energy efficiency is 4.7× better than an Nvidia K20 GPGPU. © 2016 The Authors. Concurrency and Computation: Practice and Experience Published by John Wiley & Sons Ltd. © 2016 The Authors. Concurrency and Computation: Practice and Experience Published by John Wiley & Sons Ltd

关键词： Matrix algebra

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A channel-level RAID5 schema based physical address in SSD 20th

A channel-level RAID5 schema based physical address in SSD

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20th Annual Conference on computer engineering and Technology, NCCET 2016

作者： Feng, Ya Xing, Yuxuan Xiao, Nong Liu, Fang State Key Laboratory of High Performance Computing Department of Computer Science National University of Defense Technology Changsha China

ISBN: (纸本)9789811031588

Flash-based solid state disks (SSDs) have been widely used for its high performance, low power, and concurrency features. With the increase in storage capacity, the reliability problem of SSD is becoming increasingly serious. In this paper, we implemented a technique based SSDs by constructing RAID-5 to enhance the reliability of SSD while maintaining its performance. First, we construct RAID-5 stripe based on SSD physical address which means no mapping tables to store stripe information. Second, our schema constructs dynamic stripe with log-structure to solve the inherent small write problem associated with conventional RAID-5. Third, since the correlation between data stripe, we realize garbage collection based on stripe group. Finally, we conduct extensive simulations using real-world traces and synthetic benchmarks in the SSDsim [1]. The experimental results show that we consume less than 7% of the performance and 6% of the storage consumption of SSD to achieve inner-channel RAID-5 to improve the reliability of SSD. © Springer Nature Singapore Pte Ltd. 2016.

关键词： Reliability

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Single-vehicle scheduling problem on a straight line with time window constraints 1st

Single-vehicle scheduling problem on a straight line with ti...

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1st Annual International computing and Combinatorics Conference, COCOON 1995

作者： Chan, Chi-Lok Young, Gilbert H. High Performance Computing Laboratory Department of Computer Science The Chinese University of Hong Kong ShatinNT Hong Kong

ISBN: (纸本)354060216X

The problem of single-vehicle scheduling with ready time and deadline constraints can be apphcable to many practical transportation problems. But the general case is a generalization of classical Traveling Salesman Problem and it is NP-hard. Psaraftis et al. [5] presented an O(n 2) algorithm for vehicle scheduling problems where the topological structure of sites are restricted to straight hne and there is no deadline for each site. They conjectured that this problem is NP-hard if each site has an arbitrary ready time and deadline (called time window). In this paper, we prove the conjecture and show that the decision versions of vehicle scheduling problems on a straight hne topology with time window are NP-complete for both path and tour versions. We also give an O(n 2) algorithm to solve a special case of this problem in which all sites have a common ready time. This algorithm is applicable to both path and tour versions. Keywords: deadline, NP-complete, optimal schedule, ready time, vehicle scheduling problem, time windows. © 1995, Springer-Verlag. All Rights Reserved.

关键词： Traveling salesman problem

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Parseval Frame Wavelet Multipliers in L^2(R^d)

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Chinese Annals of Mathematics,Series B 2012年第6期33卷 949-960页

作者： Zhongyan LI Xianliang SHI College of Mathematics and Computer Science Key Laboratory of High Performance Computing and Stochastic Information Processing(HPCSIP)Ministry of Education of ChinaHunan Normal Univer-sity Department of Mathematics and Physics North China Electric PowerUniversity

Let A be a d x d real expansive matrix. An A-dilation Parseval frame wavelet is a function φ E n2 （Rd）, such that the set {｜det A｜n/2φ（Ant -l）：n ∈ Z, l∈ Zd} forms a Parseval frame for L2 （Rd）. A measurable function f is called an A-dilation Parseval frame wavelet multiplier if the inverse Fourier transform of fφ is an A-dilation Parseval frame wavelet whenever φ is an A-dilation Parseval frame wavelet, where φ denotes the Fourier transform of φ. In this paper, the authors completely characterize all A-dilation Parseval frame wavelet multipliers for any integral expansive matrix A with ｜ det（A）｜= 2. As an application, the path-connectivity of the set of all A-dilation Parseval frame wavelets with a frame MRA in L2（Rd） is discussed.

关键词： Parseval frame wavelet Wavelet multiplier Frame multiresolutionanalysis

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Impact of selfish rate adaptation on the performance in IEEE 802.11-based wireless multi-hop networks

Impact of selfish rate adaptation on the performance in IEEE...

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28th International Conference on Distributed computing Systems Workshops, ICDCS Workshops 2008

作者： Li, Pei Xu, Yinlong Zhang, Chunpeng Department of Computer Science and Technology University of Science and Technology China Anhui Province High Performance Computing Key Laboratory

ISBN: (纸本)9780769531731

Multiple physical layer rates are supported in IEEE 802.11-based wireless networks, where links can adopt joint transmission power control and rate adaptation to achieve energy efficiency. This paper studies the selfish rate adaptation behavior under throughput requirement. A round-based non-cooperative game is proposed assuming there is only one link which can adjust its transmission strategy in each unit time. It is shown that there is an optimal transmission strategy for a link, and a greedy algorithm is presented to select a near-optimal transmission strategy. It is observed that scheduling order affects the feasibility and the total power consumption. To alleviate the influence of scheduling order, pricing function is introduced, which motivates selfish links to share the channel fairly and efficiently. Simulation results show the proposed approach leads to not only more feasible solutions, but also power efficiency. © 2008 IEEE.

关键词： Scheduling

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A peer-to-peer file resource sharing system for mobile devices

A peer-to-peer file resource sharing system for mobile devic...

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3rd International Conference on Grid and Pervasive computing Symposia/Workshops, GPC 2008

作者： Yang, Chao-Tung Chen, Chun-Jen Chen, Hung-Yen Hsu, Ching-Hsien High-Performance Computing Laboratory Department of Computer Science and Information Engineering Tunghai University Taichung 40704 Taiwan Department of Computer Science and Information Engineering Chung Hua University Hsinchu 30013 Taiwan

ISBN: (纸本)9780769531779

In this paper, we present a peer-to-peer file sharing platform combined with Data Grid system for mobile devices. Facing the limit of network bandwidth and unstable signal strength in wireless network, wireless peer-to-peer architecture is now widely accepted as a new computing paradigm for wireless devices. In wireless P2P architecture, one can speedup parallel file transfer and enhance the communication stability by establishing multiple concurrent P2P connections. This paper mainly applies Data Grid system to deal with the problems of file location discovery and client certification. We propose an architecture that uses GridFTP protocol to establish a video sharing platform for mobile devices. Combined with data grid, the system can perform video analysis and classification upon on its computing resources, keeping the files in the newest state at all times. © 2008 IEEE.

关键词： Network architecture

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Runtime support for multigrain and multiparadigm parallelism

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9th International Conference on high performance computing, HiPC 2002

作者： Hadjidoukas, Panagiotis E. Polychronopoulos, Eleftherios D. Papatheodorou, Theodore S. High Performance Computing Information Systems Laboratory Department of Computer Engineering and Informatics University of Patras Rio Patras26500 Greece

ISBN: (纸本)3540003037

This paper presents a general methodology for implementing on clusters the runtime support for a two-level dependence-driven thread model, initially targeted to shared-memory multiprocessors. The general ideal is to exploit existing programming solutions for these architectures, like Software DSM (SWDSM) and Message Passing Interface. The management of the internal runtime system structures and of the dependence-driven multilevel parallelism is performed with explicit messages, exploiting however the shared-memory hardware of the available SMP nodes whenever this is possible. The underlying programming models and hybrid programming solutions are not excluded, using threads for the intra-node parallelism. The utilization of shared virtual memory for thread stacks and a translator for allocating Fortran77 common blocks in shared memory enable the execution of unmodified OpenMP codes on clusters of SMPs. Initial performance results demonstrate the efficient support for fork-join and multilevel parallelism on top of SWDSM and MPI and confirm the benefits of explicit, though transparent, message passing. © Springer-Verlag Berlin Heidelberg 2002.

关键词： Message passing

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On the impact ionization in double-gate MOSFET using full band monte carlo method

On the impact ionization in double-gate MOSFET using full ba...

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2008 8th IEEE Conference on Nanotechnology, IEEE-NANO

作者： Bai, Ping Chang, Ken Kajen, R.S. Li, Erping Samudra, Ganesh Engineering Software and Applications Institute of High Performance Computing Singapore Department of Electrical and Computer Engineering National University of Singapore Singapore

ISBN: (纸本)9781424421046

We predict the impact ionization in a 13nm gate length double-gate MOSFET structures using full-band self-consistent ensemble Monte Carlo method with quantum correction. The effects of various design parameters such as gate oxide thickness, body thickness and channel length on the impact ionization onset voltages are investigated. The studies show that the reduction of channel length reduction remains as the major contributor to the impact ionization phenomena. On analyzing the distribution of impact ionization events in the structure, impact ionization induced hot carrier activity is shown to be largely confined to the channel-drain interface region. This allows for possible gate oxide hot carriers reliability issues to be greatly reduced through an optimal design. © 2008 IEEE.

关键词： Monte Carlo methods

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