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19th International Conference on Advanced Information Networking and Applications, AINA 2005

作者： Yang, Chao-Tung Hsiung, Yi-Chun Kan, Heng-Chuan High-Performance Computing Laboratory Department of Computer Science and Information Engineering Tunghai University Taichung City 40704 Taiwan Biotechnology Group South Region Office National Center for High-performance Computing Hsinshi Tainan County 744 Taiwan

ISBN: (纸本)0769522491

In the present study, THUBioGrid, an experimental distributed computing application for bioinformatics (BioGrid) is proposed. THUBioGrid incorporates directory services (data and software), grid computing methods (security, authentication, data transport and remote jobs), and gene sequence/genomic data processing methods. It uses Java CoG Kit plus bioinformatics Java packages to perform various computational tasks. The performance of THUBioGrid has been tested by executing the FASTA and mpiBLAST programs for protein sequence alignment applications. Results demonstrate the speed-up effects with increasing number of processors used in the computations. © 2005 IEEE.

关键词： Biomedical engineering

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Using ZPL to develop a parallel chaos router simulator 96

Using ZPL to develop a parallel chaos router simulator

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1996 Winter Simulation Conference (WSC 96)

作者： Richardson, W Bailey, ML Sanders, WH Department of Electrical and Computer Engineering University of Arizona Tucson AZ Computer Science Department University of Arizona Tucson AZ Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois at Urbana-Champaign Urbana IL

ISBN: (纸本)0780333837

This paper reports on our experience in writing a parallel version of a chaos router simulator using the new data-driven parallel language ZPL. The simulator is a large program that tests the capabilities of ZPL. The (parallel) ZPL program is compared with the existing serial implementation on two very different architectures: a 16-processor Intel Paragon and a cluster of eight Alpha workstations. On the Paragon, the simulator performs best when simulating medium- to large-sized routers, and on the Alpha cluster, it performs best when simulating large routers. Thus a user can choose the parallel platform best suited to the router size.

关键词： Parallel processing systems

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Privacy vulnerabilities with background information in data perturbation

Privacy vulnerabilities with background information in data ...

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9th SIAM International Conference on Data Mining 2009, SDM 2009

作者： Liu, Lian Wang, Jie Zhang, Jun Laboratory for High Performance Scientific Computing and Computer Simulation Department of Computer Science University of Kentucky Lexington KY 40506-0046 United States

ISBN: (纸本)9781615671090

The issue of data privacy is considered a significant hindrance to the development and industrial applications of database publishing and data mining techniques. Among many privacy-preserving methodologies, data perturbation is a popular technique for achieving a balance between data utility and information privacy. It is known that the attacker's background information about the original data can play a significant role in breaching data privacy. In this paper, we analyze data perturbation's potential privacy vulnerability in the presence of known background information in privacy-preserving database publishing and data mining based on the eigenspace of the perturbed data under some constraints. We study the situation in which data privacy may be compromised with the leakage of a few original data records. We first show that additive perturbation preserves the angle between data records during the perturbation. Based on this angle-preservation property, we show that, in a general perturbation model, even the leakage of only one single original data probably degrades the privacy of perturbed data in some cases. We theoretically and experimentally show that a general data perturbation model is vulnerable from this type of background privacy breach.

关键词： Data mining

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Parallel multilevel sparse approximate inverse preconditioners in large sparse matrix computations 03

Parallel multilevel sparse approximate inverse preconditione...

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2003 ACM/IEEE Conference on Supercomputing, SC 2003

作者： Wang, Kai Zhang, Jun Shen, Chi Laboratory for High Performance Scientific Computing and Computer Simulation Department of Computer Science University of Kentucky Lexington KY 40506-0046 United States

ISBN: (纸本)1581136951

We investigate the use of the multistep successive preconditioning strategies (MSP) to construct a class of parallel multilevel sparse approximate inverse (SAI) preconditioners. We do not use independent set ordering, but a diagonal dominance based matrix permutation to build a multilevel structure. The purpose of introducing multilevel structure into SAI is to enhance the robustness of SAI for solving difficult problems. Forward and backward preconditioning iteration and two Schur complement preconditioning strategies are proposed to improve the performance and to reduce the storage cost of the multilevel preconditioners. One version of the parallel multilevel SAI preconditioner based on the MSP strategy is implemented. Numerical experiments for solving a few sparse matrices on a distributed memory parallel computer are reported. © 2003 ACM.

关键词： Inverse problems

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Resolving the GPU responsiveness dilemma through program transformations

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Frontiers of computer science 2018年第3期12卷 545-559页

作者： Qi ZHU Bo WU Xipeng SHEN Kai SHEN Li SHEN Zhiying WANG National Key Laboratory of High Performance Computing National University of Defense Technology Changsha 410073 China Jiangnan Institute of Computing Technology Wuxi 214083 China Department of Computer Science North Carolina State University Raleigh NC 27695 USA EECS Colorado School of Mines Golden CO 80401 USA Department of Computer Science University of Rochester Rochester NY 14627 USA

The emerging integrated CPU-GPU architectures facilitate short computational kernels to utilize GPU acceleration. Evidence has shown that, on such systems, the GPU control responsiveness （how soon the host program finds out about the completion of a GPU kernel） is essential for the overall performance. This study identifies the GPU responsiveness dilemma： host busy polling responds quickly, but at the expense of high energy consumption and interference with co-running CPU programs; interrupt-based notification minimizes energy and CPU interference costs, but suffers from substantial response delay. We present a programlevel solution that wakes up the host program in anticipation of GPU kernel completion. We systematically explore the design space of an anticipatory wakeup scheme through a timerdelayed wakeup or kernel splitting-based pre-completion notification. Experiments show that our proposed technique can achieve the best of both worlds, high responsiveness with low power and CPU costs, for a wide range of GPU workloads.

关键词： program transformation GPU integrated architecture responsiveness

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Elastic parity logging for SSD RAID arrays 46

Elastic parity logging for SSD RAID arrays

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46th IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2016

作者： Li, Yongkun Chan, Helen H.W. Lee, Patrick P.C. Xu, Yinlong School of Computer Science and Technology University of Science and Technology of China China Collaborative Innovation Center of High Performance Computing National University of Defense Technology China Department of Computer Science and Engineering Chinese University of Hong Kong Hong Kong AnHui Province Key Laboratory of High Performance Computing China

ISBN: (纸本)9781467388917

Parity-based RAID poses a design trade-off issue for large-scale SSD storage systems: it improves reliability against SSD failures through redundancy, yet its parity updates incur extra I/Os and garbage collection operations, thereby degrading the endurance and performance of SSDs. We propose EPLOG, a storage layer that reduces parity traffic to SSDs, so as to provide endurance, reliability, and performance guarantees for SSD RAID arrays. EPLOG mitigates parity update overhead via elastic parity logging, which redirects parity traffic to separate log devices (to improve endurance and reliability) and eliminates the need of pre-reading data in parity computations (to improve performance). We design EPLOG as a user-level implementation that is fully compatible with commodity hardware and general erasure coding schemes. We evaluate EPLOG through reliability analysis and trace-driven testbed experiments. Compared to the Linux software RAID implementation, our experimental results show that our EPLOG prototype reduces the total write traffic to SSDs, reduces the number of garbage collection operations, and increases the I/O throughput. In addition, EPLOG significantly improves the I/O performance over the original parity logging design, and incurs low metadata overhead. © 2016 IEEE.

关键词： Reliability analysis

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Self-consistent simulation of quantum dot flash memory device with SiO 2 and HfO2 dielectrics

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International Journal of Nanoscience 2005年第2期4卷 171-178页

作者： Chong, Chee Ching Zhou, Kai Hong Bai, Ping Li, Er. Ping Samudra, Ganesh S. Institute of High Performance Computing Singapore Science Park II 1 Science Park Road Singapore 117528 Department of Electrical and Computer Engineering National University of Singapore 10 Kent Ridge Crescent Singapore 119260

Flash memory structure in which a silicon quantum dot embedded in the gate dielectric region between the channel and the control gate is considered. A self-consistent simulation for such memory devices is performed and aims to understand the relationship between the device structure and the meaningful quantities, as required for an efficient device operation. In this study, both the traditional SiO2 and HfO2 high-k dielectrics are being explored, and their results are compared and contrasted. In particular, the superiority of HfO2 over the SiO2 is demonstrated through various interlocking investigations on the relationships between the tunneling current, dielectric thickness, barrier height, programming and retention times. © World Scientific Publishing Company.

关键词： Data storage equipment

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Towards a performance-portable fft library for heterogeneous computing 14

Towards a performance-portable fft library for heterogeneous...

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11th ACM International Conference on computing Frontiers, CF 2014

作者： Del Mundo, Carlo Feng, Wu-Chun NSF Center for High-Performance Reconfigurable Computing Department of Electrical and Computer Engineering United States Department of Computer Science Blacksburg VA United States

ISBN: (纸本)9781450328708

The fast Fourier transform (FFT), a spectral method that computes the discrete Fourier transform and its inverse, per-vades many applications in digital signal processing, such as imaging, tomography, and software-dened radio. Its impor-tance has caused the research community to expend signi-cant resources to accelerate the FFT, of which FFTW is the most prominent example. With the emergence of the graph-ics processing unit (GPU) as a massively parallel computing device for high performance, we seek to identify architecture-aware optimizations across two different generations of high-end AMD and NVIDIA GPUs, namely the AMD Radeon HD 6970 and HD 7970 and the NVIDIA Tesla C2075 and K20c, respectively, to accelerate FFT performance. Despite architectural differences across GPU generations and vendors, we identify the following optimizations, when applied individually and in isolation of one another, as be-ing the most effective in accelerating FFT performance: (1) register preloading, (2) transposition via local memory, and (3) 8-or 16-byte vector access and scalar arithmetic. We then demonstrate the effcacy of combining individual opti-mizations together and nd that the most effective combi-nation of optimizations across all architectures encompasses register preloading, transposition via local memory, and use of constant memory. Our study suggests that FFT per-formance on GPUs is primarily limited by global memory data transfer. Overall, our optimizations deliver speed-ups as high as 31.5 over a baseline GPU implementation and 9.1 over a multithreaded FFTW CPU implementation with AVX vector extensions. © is held by the owner/authors.

关键词： Digital radio

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MPUS: A scalable parallel simulator for RedNeurons parallel computer (work-in-progress) 2

MPUS: A scalable parallel simulator for RedNeurons parallel ...

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2nd International Conference on Scalable Information Systems, InfoScale 2007

作者： Hui, Li Junming, Wu Guoliang, Chen Xiufeng, Sui Department of Computer Science and Technology Anhui Province Co-Key Laboratory of High Performance Computing and Application University of Science and Technology of China China

ISBN: (纸本)9781595937575

In this paper, we present a scalable parallel simulator - MPUS - for verifying the design of our next generation high performance parallel computer - RedNeurons(RN) parallel computer. The RedNeurons parallel computer is based on CMP technology, and it adopts an advanced but maybe some complicated architecture and topology. This paper mainly describes the design and implementation of the MPUS.

关键词： Simulators

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A scalable inline cluster deduplication framework for big data protection

A scalable inline cluster deduplication framework for big da...

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13th ACM/IFIP/USENIX International Middleware Conference, Middleware 2012

作者： Fu, Yinjin Jiang, Hong Xiao, Nong State Key Laboratory of High Performance Computing National University of Defense Technology China Department of Computer Science and Engineering University of Nebraska-Lincoln United States

ISBN: (纸本)9783642351693

Cluster deduplication has become a widely deployed technology in data protection services for Big Data to satisfy the requirements of service level agreement (SLA). However, it remains a great challenge for cluster deduplication to strike a sensible tradeoff between the conflicting goals of scalable deduplication throughput and high duplicate elimination ratio in cluster systems with low-end individual secondary storage nodes. We propose ?-Dedupe, a scalable inline cluster deduplication framework, as a middleware deployable in cloud data centers, to meet this challenge by exploiting data similarity and locality to optimize cluster deduplication in inter-node and intra-node scenarios, respectively. Governed by a similarity-based stateful data routing scheme, ?-Dedupe assigns similar data to the same backup server at the super-chunk granularity using a handprinting technique to maintain high cluster-deduplication efficiency without cross-node deduplication, and balances the workload of servers from backup clients. Meanwhile, ?-Dedupe builds a similarity index over the traditional locality-preserved caching design to alleviate the chunk index-lookup bottleneck in each node. Extensive evaluation of our ?-Dedupe prototype against state-of-the-art schemes, driven by real-world datasets, demonstrates that -Dedupe achieves a cluster-wide duplicate elimination ratio almost as high as the high-overhead and poorly scalable traditional stateful routing scheme but at an overhead only slightly higher than that of the scalable but low duplicate-elimination-ratio stateless routing approaches. © 2012 Springer-Verlag Berlin Heidelberg.

关键词： Big data

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