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第三届运筹学及其应用国际研讨会

作者： Gilbert H.F.Young Lai-man Wan Vincent S.Yiu Department of Computing Hong Kong Polytechnic University High Performance Computing Laboratory Department of Computer Science & Engineering The Chinese University of Hong Kong

The proliferation of the high-speed network and powerful workstation has narrowed the performance gap between workstation clusters and *** draws significant attention of using Network of Workstations(NOW) environment as parallel computing platform. Message Passing Interface(MPI) has been proposed as a standard for interprocess communication in message-passing parallel ***, it has language bindings for C,C++ and *** the Java technology appears to be able to unify the exist heterogeneous environment into one,we have implemented MPI in Java to exploit its usage in parallel computing *** this paper,we discuss the effectiveness of implementing MPI using *** also present some experimental results of our system called Java Message Passing Interface(JMPI).

关键词： Effectiveness of MPI in Java MPI

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Parallel Extended Kalman Filter Approach for Neural Network Learning and Data Cleaning

Parallel Extended Kalman Filter Approach for Neural Network ...

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第三届运筹学及其应用国际研讨会

作者： Wing-kay Kan Gilbert H.Young John Sum High Performance Computing Laboratory Department of Computer Science and Engineering Chinese University of Hong Kong Department of Computing Hong Kong Polytechnic University

In this paper,an extended Kalman filter（EKF） based training and data cleaning algorithm for neural network which can simultaneously train a neural network with good generalization and recover the original data from noise will be *** with the standard recursive least square（RLS） training approach,it is demonstrated that the proposed algorithm can have a better generalization *** also present in this paper a parallel algorithm for the implementation of this EKF based training method onto a SIMD *** a n processors SIMD machine together with this parallel algorithm,the time required for one-step update can be reduced by an order of n,where n is the total number of hidden units,compared with using single sequential machine.

关键词： Gaussian Kalman Parallel Extended Kalman Filter Approach for Neural Network Learning and Data Cleaning Filter

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An efficient group communication architecture over ATM networks

An efficient group communication architecture over ATM netwo...

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Heterogeneous computing Workshop

作者： Sung-Yong Park Joohan Lee S. Hariri High Performance Distributed Computing Laboratory Department of Electrical Engineering and Computer Science Syracuse University Syracuse NY USA

NYNET (ATM wide-area network testbed in New York state) Communication System (NCS) is a multithreaded message-passing tool developed at Syracuse University that provides low-latency and high-throughput communication services over Asynchronous Transfer Mode (ATM)-based high-performance distributed computing (HPDC) environments. NCS provides flexible and scalable group communication services based on dynamic grouping and tree-based multicasting. The NCS architecture, which separates the data and control functions, allows group operations to be implemented efficiently by utilizing the control connections when transferring status information (e.g. topology information, routing information). Furthermore, NCS provides several different algorithms for group communication and allows programmers to select an appropriate algorithm at runtime. The authors overview the general architecture of NCS and present the multicasting services provided by NCS. They analyze and compare the performance of NCS with that of other message-passing tools such as p4, PVM, and MPI in terms of primitive performance and performance.

关键词： Asynchronous transfer mode computer architecture Communication system control Multicast algorithms System testing Distributed computing Topology Routing Programming profession Runtime

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New approaches to spaceborne computing

New approaches to spaceborne computing

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1998 IEEE Aerospace Conference, AERO 1998

作者： Sterling, Thomas Kogge, Peter High Performance Computing Systems Group Jet Propulsion Laboratory Mail Stop 168-522 4800 Oak Grove Dr. PasadenaCA91109 United States Department of Computer Science and Engineering University of Notre Dame Notre DameIN46556 United States

ISBN: (纸本)0780343115

NASA's aggressive plans for extensive deep space exploration with a new generation of unmanned space craft requires a dramatic increase in responsibilities for onboard computing to reduce size, weight, and power to drastically reduce mission costs. No longer will all raw sensor data be transmitted back to Earth but rather only the results from extensive preprocessing to decrease total link capacity by one to three orders of magnitude. A new approach to on board data processing is necessitated by this new expanded mission requirement. Processor-In-Memory (PIM) architecture combines logic and memory on the same integrated circuit to permit direct access to memory row buffers, greatly increasing effective memory bandwidth, reducing overhead and latency, and improving power efficiency. Organizing and managing the resources of PIM based systems is challenging. The PIM-MT architecture is an innovative approach to harnessing the physical resources of PIM technology through a message driven multithreaded virtual execution model. This paper describes the concepts of PIM-MT and its role in future spaceborne computing. © 1998 IEEE.

关键词： NASA

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State-space support for path-based reward variables

State-space support for path-based reward variables

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International computer performance and Dependability Symposium

作者： W.D. Obal W.H. Sanders Center for Reliable and High-Performance Computing Department of Electrical and Computer Engineering Coordinated Science Laboratory University of Illinois Urbana-Champaign Urbana-Champaign IL USA

Many sophisticated formalisms exist for specifying complex system behaviors, but methods for specifying performance and dependability variables have remained quite primitive. To cope with this problem, modelers often must augment system models with extra state information and event types to support particular variables. This often leads to models that are non-intuitive, and must be changed to support different variables. To address this problem, we extend the array of performance measures that may be derived from a given system model by developing new performance measure specification and model construction techniques. Specifically, we introduce a class of path-based reward variables, and show how various performance measures may be specified using these variables. Path-based reward variables extend the previous work with reward structures to allow rewards to be accumulated based on sequences of states and transitions. To maintain the relevant history, we introduce the concept of a path automaton, whose state transitions are based on the system model state and transitions. Furthermore, we present a new procedure for constructing state spaces and the associated transition rate matrices that support path-based reward variables. Our new procedure takes advantage of the path automaton to allow a single system model to be used as the basis of multiple performance measures that would otherwise require separate models or a single more complicated model.

关键词： Automata Stochastic processes Indium tin oxide Electronic switching systems Read only memory State-space methods Contracts

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New approaches to spaceborne computing

New approaches to spaceborne computing

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IEEE Conference on Aerospace

作者： T. Sterling P. Kogge Jet Propulsion Laboratory High Performance Computing Systems Group Pasadena CA USA Department of Computer Science and Engineering University of Notre Dame Notre Dame IN USA

关键词： Space exploration Power generation Space missions Costs Capacitive sensors Earth Data processing Logic circuits Bandwidth Delay

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Parallel algorithms for simultaneous scheduling, binding and floorplanning in high-level synthesis

Parallel algorithms for simultaneous scheduling, binding and...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： P. Prabhakaran P. Banerjee Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois Urbana-Champaign IL USA Center for Parallel and Distributed Computing Department of Electrical and Computer Engineering Northwestern University Evanston IL USA

With small device features in submicron technologies, interconnection delays play a dominant part in cycle time. Hence, it is important to consider the impact of physical design during high level synthesis. In comparison to a traditional approach which separates high-level synthesis from physical design, an algorithm which is able to make these stages interact very closely, would result in solutions with lower latency and area. However, such an approach could result in increased runtimes. Parallel processing is an attractive way of reducing the runtimes. In this paper, two parallel algorithms for simultaneous scheduling, binding and floorplanning algorithm are presented. A detailed hardware model is considered, taking into account multiplexor and register areas and delays. Experimental results are reported on an IBM SP-2 multicomputer, with close to linear speedups for a set of benchmark circuits.

关键词： Parallel algorithms high level synthesis Runtime Integrated circuit interconnections Delay effects Algorithm design and analysis Parallel processing Scheduling algorithm Hardware Registers

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AQuA: an adaptive architecture that provides dependable distributed objects

AQuA: an adaptive architecture that provides dependable dist...

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Reliable Distributed Systems

作者： M. Cukier J. Ren C. Sabnis D. Henke J. Pistole W.H. Sanders D.E. Bakken M.E. Berman D.A. Karr R.E. Schantz Center for Reliable and High-Performance Computing Coordinated Science Laboratory and Electrical and Computer Engineering Department University of Illinois Urbana-Champaign Urbana IL USA BBN Technologies Inc. Cambridge MA USA

Dependable distributed systems are difficult to build. This is particularly true if they have dependability requirements that change during the execution of an application, and are built with commercial off-the-shelf hardware. In that case, fault tolerance must be achieved using middleware software, and mechanisms must be provided to communicate the dependability requirements of a distributed application to the system and to adapt the system's configuration to try to achieve the desired dependability. The AQuA architecture allows distributed applications to request a desired level of availability using the Quality Objects (QuO) framework and includes a dependability manager that attempts to meet requested availability levels by configuring the system in response to outside requests and changes in system resources due to faults. The AQuA architecture uses the QuO runtime to process and invoke availability requests, the Proteus dependability manager to configure the system in response to faults and availability requests, and the Ensemble protocol stack to provide group communication services. Furthermore, a CORBA interface is provided to application objects using the AQuA gateway. The gateway provides a mechanism to translate between process-level communication, as supported by Ensemble, and IIOP messages, understood by Object Request Brokers. Both active and passive replication are supported, and the replication type to use is chosen based on the performance and dependability requirements of particular distributed applications.

关键词： Availability Application software computer architecture Hardware Fault tolerant systems Middleware Communication system software Quality management Resource management Runtime

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Graph visualization for the analysis of the structure and dynamics of extreme-scale supercomputers

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Information Visualization 1997年第3期3卷 209-222页

作者： Summers, Kenneth L. Caudell, Thomas Preston Berkbigler, Kathryn Bush, Brian Davis, Kei Smith, Steve Center for High Performance Computing University of New Mexico Albuquerque NM United States Department of Electrical & Computer Engineering University of New Mexico Albuquerque NM United States Los Alamos National Laboratory Los Alamos NM United States

We are exploring the development and application of information visualization techniques for the analysis of new massively parallel supercomputer architectures. Modern supercomputers typically comprise very large clusters of commodity SMPs interconnected by possibly dense and often non-standard networks. The scale, complexity, and inherent non-locality of the structure and dynamics of this hardware, and the operating systems and applications distributed over them, challenge traditional analysis methods. As part of the á la carte (A Los Alamos computer Architecture Toolkit for Extreme-Scale Architecture Simulation) team at Los Alamos National laboratory, who are simulating these new architectures, we are exploring advanced visualization techniques and creating tools to enhance analysis of these simulations with intuitive three-dimensional representations and interfaces. This work complements existing and emerging algorithmic analysis tools. In this paper, we give background on the problem domain, a description of a prototypical computer architecture of interest (on the order of 10,000 processors connected by a quaternary fat-tree communications network), and a presentation of three classes of visualizations that clearly display the switching fabric and the flow of information in the interconnecting network. © 2004, SAGE Publications. All rights reserved.

关键词： graph visualization scalable representations virtual environments

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Parallel computing on SCSI network

Parallel computing on SCSI network

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IEEE National Conference on Aerospace and Electronics (NAECON)

作者： G.H. Young V.S. Yiu Lai-Man Wan High Performance Computer Laboratory Department of Computer Science and Engineering Chinese University of Hong Kong Sha Tin Hong Kong China High Performance Computing Laboratory Department of Computer Science and Engineering Chinese University of Hong Kong Sha Tin Hong Kong China

Different architectures of multicomputers have emerged rapidly in the last two decades. In this paper, we present the implementation of a network parallel system using the homogeneous Unix machines on SCSI networks. The system is different from the traditional systems in that we applied general purpose peripheral buses to connect the workstations. In this paper, we discuss the low level operations of the interconnecting network and the isomorphic property of SCSI.

关键词： Parallel processing Workstations Hardware Costs Communication system control high performance computing Laboratories computer science computer architecture Communication system software

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