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arXiv 2019年

作者： Mouris, Boules A. Ghauch, Hadi Thobaben, Ragnar Jonsson, B.L.G. KTH Royal Institute of Technology Stockholm 100 44 Sweden Department of COMELEC Telecom-ParisTech Institut Mines-Telecom Paris France

In this paper, we study optimization of multi-tone signals for wireless power transfer (WPT) systems. We investigate different non-linear energy harvesting models. Two of them are adopted to optimize the multi-tone signal according to the channel state information available at the transmitter. We show that a second-order polynomial curve-fitting model can be utilized to optimize the multi-tone signal for any RF energy harvester design. We consider both single-antenna and multi-antenna WPT systems. In-band coexisting communication links are also considered in this work by imposing a constraint on the received power at the nearby information receiver to prevent its RF front end from saturation. We emphasize the importance of imposing such constraint by explaining how inter-modulation products, due to saturation, can cause high interference at the information receiver in the case of multi-tone signals. The multi-tone optimization problem is formulated as a non-convex linearly constrained quadratic program. Two globally optimal solution approaches using mixed-integer linear programming and finite branch-and-bound techniques are proposed to solve the problem. The achieved improvement resulting from applying both solution methods to the multi-tone optimization problem is highlighted through simulations and comparisons with other solutions existing in the literature. Copyright © 2019, The Authors. All rights reserved.

关键词： Energy harvesting

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Preface

Lecture Notes in Geoinformation and Cartography

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Lecture Notes in Geoinformation and Cartography 2019年 v-vi页

作者： Altan, Orhan Chandra, Madhu Sunar, Filiz Tanzi, Tullio Joseph Department of Geomatics Faculty of Civil Engineering Istanbul Technical University Istanbul Turkey Microwave Engineering and Electromagnetic Theory Technische Universität Chemnitz Chemnitz Germany Department of Geomatics Faculty of Civil Engineering Istanbul Technical University Istanbul Turkey LabSoC Laboratory COMELEC Department Campus SophiaTech Institut Mines-Telecom-Telecom ParisTech Biot France

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Inserting permanent fault input dependence on PTM to improve robustness evaluation 16

Inserting permanent fault input dependence on PTM to improve...

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Proceedings of the 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains

作者： Rafael B. Schivittz Rafaél Fritz Denis T. Franco Lirida Naviner Cristina Meinhardt Paulo F. Butzen Universidade Federal do Rio Grande - FURG Universidade Federal do Rio Grande - FURG and Universidade Federal de Pelotas - UFPEL Institut TELECOM Télécom-ParisTech LTCI-CNRS COMELEC Paris France

ISBN: (纸本)9781509027361

Many of the nanometer CMOS challenges are seriously compromising the gains attained with technology scaling, mainly impacting the yield and the circuit reliability. To cope with these problems, new design methodologies are necessary to improve the robustness of the circuits. Given the overheads associated with the traditional fault-tolerant approaches, alternative solutions, based on partial fault tolerance and fault avoidance, are also being considered as possible solutions to the reliability problem. These approaches are based on the application of fault tolerance to a restricted part of the circuits or hardening of individual cells, allowing reliability improvements and limiting the associated overheads. In this context, a fast and accurate evaluation of circuit's reliability is fundamental, to allow a reliability-aware automated design flow, where the synthesis tool could rapidly cycle through several circuit configurations to assess the best option. This work presents a methodology to calculate circuit reliability, based on the Probabilistic Transfer Matrix (PTM) method, and using a probabilistic model for stuck-on faults that considers a fault probability for each input vector. The work shows that considering the same error probability for all input vectors underestimates the input influence on the overall circuit reliability. The proposed model of gate reliability associated with the PTM method can provide results that are more accurate in terms of circuit reliability. Results obtained with the proposed approach show a difference up to 15% when compared with the traditional application of the PTM method with equal input vector probabilities, when applied to a set of combinational circuits.

关键词： CMOS

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Improving the big mac attack on elliptic curve cryptography

Improving the big mac attack on elliptic curve cryptography

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International Conference on The New Codebreakers - Essays Dedicated to David Kahn on the Occasion of His 85th Birthday, 2010

作者： Danger, Jean-Luc Guilley, Sylvain Hoogvorst, Philippe Murdica, Cédric Naccache, David Secure-IC S.A.S 80 Avenue des Buttes de Cöesmes Rennes35700 France Département COMELEC Institut TELECOM TELECOM ParisTech CNRS LTCI Paris France Département d’informatique École Normale Supérieure 45 rue d’Ulm Paris Cedex 0575230 France

ISBN: (纸本)9783662493007

At CHES 2001, Walter introduced the Big Mac attack against an implementation of rsa. It is an horizontal collision attack, based on the detection of common operands in two multiplications. The attack is very powerful since one single power trace of an exponentiation permits to recover all bits of the secret exponent. Moreover, the attack works with unknown or blinded input. The technique was later studied and improved by Clavier et alii and presented at INDOCRYPT 2012. At SAC 2013, Bauer et alii presented the first attack based on the Big Mac principle on implementations based on elliptic curves with simulation results. In this work, we improve the attack presented by Bauer et alii to considerably increase the success rate. Instead of comparing only two multiplications, the targeted implementation permits to compare many multiplications. We give experiment results with traces taken from a real target to prove the soundness of our attack. In fact, the experimental results show that the original Big Mac technique given by Walter was better that the technique given by Clavier et alii. With our experiments on a real target, we show that the theoretical improvements are not necessarily the more suitable methods depending on the targeted implementations. © Springer-Verlag Berlin Heidelberg 2016.

关键词： Side channel attack

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Safe-errors on SPA protected implementations with the atomicity technique

Safe-errors on SPA protected implementations with the atomic...

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International Conference on The New Codebreakers - Essays Dedicated to David Kahn on the Occasion of His 85th Birthday, 2010

作者： Fouque, Pierre-Alain Guilley, Sylvain Murdica, Cédric Naccache, David Institut Universitaire de France Université de Rennes 1 Rennes France Secure-IC S.A.S 80 avenue des Buttes de Cöesmes Rennes35700 France Département COMELEC Institut TELECOM TELECOM ParisTech CNRS LTCI Paris France Département d’informatique École normale supérieure 45 rue d’Ulm Paris Cedex 0575230 France

ISBN: (纸本)9783662493007

ECDSA is one of the most important public-key signature scheme, however it is vulnerable to lattice attack once a few bits of the nonces are leaked. To protect Elliptic Curve Cryptography (ecc) against Simple Power Analysis, many countermeasures have been proposed. Doubling and Additions of points on the given elliptic curve require several additions and multiplications in the base field and this number is not the same for the two operations. The idea of the atomicity protection is to use a fixed pattern, i.e. a small number of instructions and rewrite the two basic operations of ecc using this pattern. Dummy operations are introduced so that the different elliptic curve operations might be written with the same atomic pattern. In an adversary point of view, the attacker only sees a succession of patterns and is no longer able to distinguish which one corresponds to addition and doubling. Chevallier- Mames, Ciet and Joye were the first to introduce such countermeasure. In this paper, we are interested in studying this countermeasure and we show a new vulnerability since the ecdsa implementation succumbs now to C Safe-Error attacks. Then, we propose an effective solution to prevent against C Safe-Error attacks when using the Side-Channel Atomicity. The dummy operations are used in such a way that if a fault is introduced on one of them, it can be detected. Finally, our countermeasure method is generic, meaning that it can be adapted to all formulæ. We apply our methods to different formulæ presented for Side-Channel Atomicity. © Springer-Verlag Berlin Heidelberg 2016.

关键词： Side channel attack

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Encoding the state of integrated circuits: A proactive and reactive protection against Hardware Trojans Horses 9

Encoding the state of integrated circuits: A proactive and r...

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9th Workshop on Embedded Systems Security, WESS 2014

作者： Ngo, Xuan Thuy Guilley, Sylvain Bhasin, Shivam Danger, Jean-Luc Najm, Zakaria Institut MINES-TELECOM TELECOM ParisTech Department COMELEC 46 rue Barrault Paris cedex 1375 634 France Secure-IC S.A.S. 80 avenue des Buttes de Coësmes Rennes35 700 France

ISBN: (纸本)9781450329323

Hardware Trojan Horses (HTH) are a serious threat to semiconductor industry with significant economic impact. However, most of the research in HTH focuses on detection. We propose the concept of "encoded circuit", as a technique to protect HTH insertion. Encoded circuit is based on the theory of codes. It encodes the internal state with a chosen code of security parameter d, such that knowledge of less than d bits of the encoded state reveals no information about the actual state. This parameter stems from a similar notion introduced by Ishai, Sahai and Wagner at CRYPTO 2003 for the prevention of probing attacks. Usually d

关键词： Encoding (symbols)

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Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security

Balancing WDDL dual-rail logic in a tree-based FPGA to enhan...

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International Conference on Field Programmable Logic and Applications

作者： Emna Amouri Shivam Bhasin Yves Mathieu Tarik Graba Jean-Luc Danger Habib Mehrez CNRS LTCI (UMR 5141) Departement COMELEC Institut TELECOM/TELECOM ParisTech. Paris France LIP6 Universite Pierre et Marie Curie 4 Paris France

The Tree-based FPGA offers better density and timing determinism than traditional mesh-based FPGA. Moreover, thanks to its multilevel structure, it offers greater easiness to balance dual signals in terms of routing resources number. In this paper, we study the use of the Wave Dynamic Differential Logic (WDDL) on a custom tree-based FPGA of 2048 cells. The WDDL technique offers an effective way to withstand Differential Power Attacks (DPA). However, the effectiveness of this countermeasure is guaranteed provided a symmetry is maintained between the routing of both the direct and complementary paths, which is very hard to achieve in FPGA. Thus, balancing aware Computer-Aided Design (CAD) tools must be developed. In this work, we propose first adjacent placement and balancing-aware routing techniques for tree-based FPGA to counter the routing unbalance. Then side channel analyses are performed on FPGA circuit implementing PRESENT crypto-processor. Experimental results show that the balancing methods enhance the design security against side channel attacks.

关键词： Routing Field programmable gate arrays Delays Cryptography Switches

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Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA

Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs F...

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2nd International Workshop on Hardware and Architectural Support for Security and Privacy, HASP 2013

作者： Cherif, Zouha Danger, Jean-Luc Lozac'h, Florent Mathieu, Yves Bossuet, Lilian Departement COMELEC TELECOM ParisTech France TELECOM ParisTech Secure-IC S.A.S. France Laboratoire Hubert Curien Université de Lyon France

ISBN: (纸本)9781450321181

This paper presents a comparative study of delay Physically Unclonable Functions (PUFs) designed in CMOS-65nm technology platforms: ASIC and FPGA (Xilinx Virtex-5). The performances are analyzed for two types of silicon PUFs, namely the arbiter and the loop PUFs. For this purpose, a PUF has been specifically designed, the \mixed PUF", to allow a fair comparison between the two structures. The principle of the mixed PUF design consists on the use of the same delay chains for both PUFs. The analysis is based on PUF responses obtained at different operating conditions for 18 ASICs. Each one embeds 49 PUF instances. The comparison analysis reveals that overall the arbiter PUF structure has the worst performance when compared to the loop PUF, on both platforms.

关键词： Field programmable gate arrays (FPGA)

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A low-entropy first-degree secure provable masking scheme for resource-constrained devices

A low-entropy first-degree secure provable masking scheme fo...

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8th Workshop on Embedded Systems Security, WESS 2013

作者： Bhasin, Shivam Danger, Jean-Luc Guilley, Sylvain Najm, Zakaria Institut Mines-Telecom Telecom ParisTech Department Comelec 46 rue Barrault 75634 Paris Cedex France Secure-IC S.A.S. 80 avenue des Buttes de Coësmes 35700 Rennes France

ISBN: (纸本)9781450321457

The trend in the protection against side-channel analysis is to be more secure with little consideration for the cost. However in small devices like RFID, traditional security solutions might be impractical due to limited availability of resources. Thus designers are often forced to use imperfect but low-cost security solutions. When implementing masking countermeasures on a low-resource device, designers are not only limited in memory or power but also lacks a high-throughput source of randomness. In this paper, we stick to a formal security notion (1st-degree security), but seek a low-cost countermeasure against side-channel attacks. The proposed countermeasure is based on masking but needs only one bit of random to resist first-degree attacks like correlation power analysis. Furthermore the implementation also resists side-channel collision attacks once the entropy of random is increased to 16 bits. We show that security can be obtained at extremely low overhead and with as few as a couple of random bytes. This is supported by an application on PRESENT which is provably masked at first-degree for performance overhead of only 1%. Side-channel laboratory evaluations are also provided to support our claim. © 2013 ACM.

关键词： Radio frequency identification (RFID)

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Low-cost countermeasure against RPA

Low-cost countermeasure against RPA

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11th Conference on Smart Card Research and Applications, CARDIS 2012

作者： Danger, Jean-Luc Guilley, Sylvain Hoogvorst, Philippe Murdica, Cédric Naccache, David Secure-IC S.A.S. 80 avenue des Buttes de Coësmes F-35700 Rennes France Département COMELEC Institut TELECOM TELECOM ParisTech Paris France École Normale Supérieure Département d'Informatique 45 rue d'Ulm F-75230 Paris Cedex 05 France

ISBN: (纸本)9783642372872

On smart-cards, Elliptic Curve Cryptosystems (ECC) can be vulnerable to Side Channel Attacks such as the Refined Power Analysis (RPA). This attack takes advantage of the apparition of special points of the form (0, y). In this paper, we propose a new countermeasure based on co-Z formulæ and an extension of the curve isomorphism countermeasure. It permits to transform the base point P = (x, y) into a base point P′ = (0, y′), which, with - P′, are the only points with a zero X-coordinate. In such case, the RPA cannot be applied. Moreover, the cost of this countermeasure is very low compared to other countermeasures against RPA. © 2013 Springer-Verlag.

关键词： Smart cards

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