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International Conference on Emerging Technologies and Factory Automation (ETFA)

作者： Huiyun Sheng Michael Schwarz Josef Börcsök Department of Computer architecture and System programming University of Kassel Kassel Germany

ISBN: (纸本)9781467347358

This paper proposes a continuous, non-invasive blood pressure monitoring system concept, which uses a safety microprocessor to connect sensors for building a body sensor network. The changes in Pulse Transit Time (PTT) can be detected with the sensor network. The microprocessor gathers the PTT and other vital signs of the patient to derive changes in blood pressure. Through the new Bluetooth protocol for safety systems, the current blood pressure value can be sent to a variety of terminals present in the wireless network, such as mobile phone, PC and medical monitoring systems. The 1oo2 architecture of the used microprocessor can provide high safety to a rating of safety integrity level 3 (SIL3), thus the whole network can meet the safety required in medical care systems.

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SRAM-based FPGA design techniques for safety related systems conforming to IEC 61508 a survey and analysis

SRAM-based FPGA design techniques for safety related systems...

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International Conference on Advances in Computational Tools for Engineering Applications, ACTEA

作者： Ali Hayek Josef Börcsök Chair of Computer Architecture and System Programming University of Kassel Kassel Germany

With the announcement and development of safety standards such as IEC 61508 and DO-254 standards a basis for the implementation of qualitative and quantitative analyzes in the areas of reliability and safety for electronic safety-related systems was laid. Especially with the publication of the second edition of the standard IEC 61508 standard and the introduction of new aspects such as on-chip redundancy and the use of integrated systems in such systems is becoming increasingly attractive. SRAM-based FPGAs are considered as the mainstream FPGA technology and represent an excellent platform for the development of system-on-chips due to their complexity and programming flexibility. In this paper, the implementation of FPGA-based safety-related systems according to the standard IEC 61508 is targeted. First, the advantages and challenges of FPGAs for the use in such systems are presented. Afterwards, measures and methodologies are discussed, which are required for the implementation of such systems. Finally suitable FPGA implementation of these measures is presented.

关键词： Field programmable gate arrays Safety IEC standards Hardware Software systematics

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New scientific contributions to the prediction of the reliability of critical systems which based on imperfect debugging method and the increase of quality of service

New scientific contributions to the prediction of the reliab...

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International Symposium on Telecommunications (BIHTEL)

作者： Ossmane Krini Josef Börcsök Computer Architecture and System Programming University of Kassel Kassel Germany Universitat Kassel Kassel Hessen DE

This paper presents a new method by which it is possible to realistically predict the software reliability of critical systems. The main feature of this method is that it allows estimating the number of remaining critical faults in the software. The algorithm employs well-known methods such as Imperfect Debugging and it provides a more reliable prognosis than the methods conventionally used for this purpose. Furthermore, the new approach describes two processes of handling critical failures (one for detection and one for correction). The new algorithm also takes into account the socalled repair time, a measurement that is vitally important for a reliable prognosis. For use in the prediction model, it is mathematically described as a time function. As every programmer knows, it can be difficult to have even the simplest program run without faults. So-called software reliability models (SRM's), based on stochastic and aiming to predict the reliability of both software and hardware, have been used since the 70's. SRM's rely on certain model assumptions some of which cannot be deemed realistic anymore. Hence, for today's reliability engineering, these models are insufficient. At this point in time, though, there are hardly any methods that enable us to obtain predictions as to how the reliability of critical faults or the failure rate of critical systems behave over time. Currently, there is no mathematical model distinguishing between critical and non-critical faults, and only few models consider Imperfect Debugging (ID). The method presented here, however, is based on ID and it is able to distinguish between critical and non-critical software faults. Moreover, this new method employs a so-called Time-Delay and thus two new processes have to be designed. Mathematically, these processes describe the detection of faults and their correction, respectively. It is necessary to define appropriate distribution functions and to clearly state the requisite model assumptions.

关键词： Reliability IP networks Lead Debugging

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The relationship between diagnostic coverage and proof test interval for 1002 and 1002D architectures

The relationship between diagnostic coverage and proof test ...

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13th IFAC Symposium on Control in Transportation systems, CTS 2012

作者： Üstoǧlu, Ilker Kaymakçi, Özgür T. Börcsök, Josef Yildiz Technical University Davutpaşa Campus A209 34220 34220 Esenler Istanbul Turkey Yildiz Technical University Davutpaşa Campus A210 34220 34220 Esenler Istanbul Turkey University Kassel Faculty of Electrical Engineering / Computer Science Department of Computer Architecture and System Programming Wilhelmshöher Allee 71 34121 Kassel Germany

ISBN: (纸本)9783902823137

In order to measure the effectiveness of safety protection systems there are several design parameters. Diagnostic coverage factor is one of the most important parameter which influences all architectures. In this short paper the relationship between PFDavg, DC and TI are presented. 1002 and 1002D architectures are considered as examples. © 2012 IFAC.

关键词： architecture

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Degradable on-chip safety controller with intra-chip communication for steer-by-wire systems

Degradable on-chip safety controller with intra-chip communi...

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International Symposium on Telecommunications (BIHTEL)

作者： Ali Hayek Evzudin Ugljesa Michael H. Schwarz Josef Börcsök Adnan Salihbegovic Chair for Computer Architecture and System Programming University of Kassel Kassel Germany Faculty of electrical engineering University of Sarajevo Sarajevo Bosnia and Herzegovina

High reliability and high availability are essential aspects for all critical elements used in automotive applications. This is particularly true for control and steering systems. In this regard, numerous steer by wire (x-by-wire) concepts were developed over the years. Most of them considered only standard single microcontroller system architectures with a low degree of reliability according to international reliability and safety standards. This paper presents a novel concept for a degradable safety controller for steer-by-wire systems. Based on a safety-related 1004-architecture, the presented concept offers higher safety, reliability and availability.

关键词： Safety IEC standards ISO standards Vehicles system-on-a-chip Redundancy

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Enhancing a simulation environment for computer architecture to a systemC based testbench tool for design verification

Enhancing a simulation environment for computer architecture...

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2011 23rd International Symposium on Information, Communication and Automation Technologies, ICAT 2011

作者： Westmeier, M. Herwig, B. Börcsök, J. Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9781457707469

This paper presents a simulation environment, which is a C++/systemC based integrated framework for functional verification of designed components or electronic architectures and enhances the existing computer architecture simulation tool named sefca. As the VHDL sources are converted to systemC it is sufficient for verification engineers to have a fundamental knowledge of C++ and the systemC library. The testbench framework uses the same graphical user interface (GUI) based on the wxPython library, which was presented in the sefca tool. Verification of the design is supported by the systemC verification library (SCV). Inter-Process-Communication is used to send the stimuli for simulation input from the GUI to the simulation process and the simulation results back to the online viewer in the GUI. With these enhancements sefca becomes a universal tool for testing the software and the hardware part of a new design at the same time. Working on the transaction level model (TLM) the proposed methodology offers a high performance and a high level of abstraction. © 2011 IEEE.

关键词： Graphical user interfaces

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New approach to determine the critical number of failure in software systems

New approach to determine the critical number of failure in ...

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2011 23rd International Symposium on Information, Communication and Automation Technologies, ICAT 2011

作者： Krini, Ossmane Börcsök, Josef Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9781457707469

Software-Engineering is very important today. In industry (specifically by software critical system) it is important to produce high reliable software, i.e. software with low proportion of faults. To produce such reliable software, a long handling process is required, and because this process consumes a large amount of time and resources to achieve the desired reliability goals it is useful to use Software Reliability Stochastic Models to predict the required software testing time. In this paper a new approach to reflecting the residual number of critical failures in software-systems is introduced. There are currently very few processes enabling us to predict the reliability of the critical failures or the critical failure rate for critical systems. Furthermore, we will focus on distinguishing the critical failures in the software. We will thus distinguish both critical as well as non-critical failures in the Software. Therefore it is important to divide the process into two classes, detection- and correction class. To develop an approach it is necessary to determine corresponding distribution functions and model assumptions. © 2011 IEEE.

关键词： Software reliability

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Approach to predict the software reliability with different methods

Approach to predict the software reliability with different ...

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7th International Conference on Electrical and Electronics Engineering, ELECO 2011

作者： Krini, Ossmane Börcsök, Josef Computer Architecture and System Programming University of Kassel Germany

ISBN: (纸本)9786050102048

This particular essay expounds upon how one can foresee and predict software reliability. There are two major components that exist within a computer system: hardware and software. The reliabilities between the two are comparable because both are stochastic processes, which can be described by probability distributions. With this said, software reliability is the probability that will function without failure in a given software and in a given environment during a specified period of time. Thus, this is why software reliability is a major and key factor in software developmental processes and quality. However, one can spot the difference between software reliability and hardware reliability where it concerns the quality duration and the fact that software reliability does not decrease its reliability over time. © 2011 Chamber of Turkish Electric.

关键词： Software reliability

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A partially automated HiL test environment for model-based development using Simulink® and OPC technology

A partially automated HiL test environment for model-based d...

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2011 23rd International Symposium on Information, Communication and Automation Technologies, ICAT 2011

作者： Chaaban, W. Schwarz, M. Batchuluun, B. Sheng, H. Börcsök, J. Department of Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9781457707469

This paper is concerned with the design procedures of an automated testing tool, developed in Matlab®/Simulink® environment, that performs software verification during runtime on a PLC (Programmable Logic Controller) or so called HiL test (Hardware-in-the-Loop) for model-based development of control applications. In addition to checking the "semantic" or "functional" correctness of the automatically generated C++ - Code with RTW (Real Time Workshop®) for algorithms designed and developed in Simulink® on hardware targets, the tool compares results obtained from the HiL test with the results of the MiL test (Model-in-the-Loop) performed in early stage of development for the same developed application. The main purpose behind this work is to develop reliable software that fulfil system requirements and to test its behaviour during realtime hardware simulation, in order to achieve the validation step which represents the terminating - step of almost all projects. © 2011 IEEE.

关键词： Simulink

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Auto-positioning mount system for Stereoscopic imaging on variable distances

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Journal of Physics: Conference Series 2012年第1期364卷

作者： Zh Yordanov E Fuchs S Löser J Börcsök Department for Computer Architecture and System Programming University of Kassel 34121 Kassel Germany

This paper describes a stereo-imaging system for variable distances. The setup includes a mechanical mount system-holder, a control unit for the correct positioning of the cameras, the cameras itself and the object to capture. The goal of this setup was to achieve a true sense of scale and depth of the filmed material on dynamically variable distances to the object. This demands certain requirements which are usually not necessary for many applications of stereoscopic filming. In the last step, the resulting material is prepared for viewing.

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