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检索条件"机构=Institute for Design Problems in Microelectronics of RAS"

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The Multi-Criteria Optimization in the LTspice Simulation Software of a JFet class AB Buffer Amplifier for Operation at Low Temperatures

The Multi-Criteria Optimization in the LTspice Simulation So...

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2019 IEEE International Conference on Electrical Engineering and Photonics, EExPolytech 2019

作者： Prokopenko, Nikolai N. Liashov, Maxim V. Bugakova, Anna V. Zhuk, Alexey A. Don State Technical University Institute for Design Problems in Microelectronics of RAS Department Information Systems and Radioengineering Rostov-on-Don Zelenograd Russia

ISBN: (纸本)9781728144399

A high-speed buffer amplifier (BA) for analog microcircuits on complementary junction field-effect transistors is proposed. The scheme differs from the known circuit solutions by a small number of elements and can operate within the range of cryogenic temperatures. In the LTSpice simulation software, the optimal control parameters were selected using the DEAP (Distributed Evolutionary Algorithm in Python) library of distributed evolutionary calculations and the NSGA-II multi-criteria optimization algorithm. Minimization of offset voltage, static current consumption and dead band width on the amplitude characteristic at low temperatures were chosen as the priority parameters of the control unit. © 2019 IEEE.

关键词： Operational amplifiers

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Antenna Arrays Calibration Using Recursive Least Squares Adaptive Filtering Algorithms Based on Inverse QR Decomposition

Antenna Arrays Calibration Using Recursive Least Squares Ada...

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2020 IEEE East-West design and Test Symposium, EWDTS 2020

作者： Djigan, Victor Kurganov, Vladislav Institute for Design Problems in Microelectronics of Ras Department of Integrated Circuits Design Methodology Moscow Russia Institute of Microdevices and Control Systems National Research University of Electronic Technology Moscow Russia

ISBN: (纸本)9781728198996

This paper considers the antenna arrays calibration by the using of the Recursive Least Squares (RLS) adaptive filtering algorithms. An algorithm, based on the inverse QR decomposition, has been selected among the diversity of the RLS algorithms. This is caused by its stable operation. Because the algorithm contains the computationally heavy square root operations, a square root free version of the algorithm is also presented. Both versions of the QR RLS algorithms are mathematically identical to each other if they operate in float point arithmetic. The proposed calibration can be used in the antenna arrays with digital beamforming, because the algorithms usage requires the access to the array channel signals. The calibration requires a known training signal, which can be easily provided not only in a laboratory environment, but also in a field operation, if an array is used as a directional antenna of the digital communication system equipment. In the second case, the calibration can be also conducted even in the presence of the interference signal sources. Simulation validates the proposed calibration algorithm, using linear antenna arrays with 4, 8 and 16 antennas with a half wavelength distance between the neighbor antennas. In this simulation, the array channel noise has been varied in 0.. 30 dB range of the Signal-to-Noise Ratio. Two interference sources with the-30 dB Signal-to-Interference Ratio each have been simulated. These sources were located symmetrically relatively the required main lobe direction of the array radiation pattern. A training signal has been simulated as a random one with no specific autocorrelation properties. The signal has been modulated by the Phase Shift Keying (PSK) and the Quadrature Amplitude Modulation. © 2020 IEEE.

关键词： Beamforming

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Least Squares Criterion Adaptive Filtering Algorithms as Tools for Calibration of Arrays with Digital Beamforming

Least Squares Criterion Adaptive Filtering Algorithms as Too...

引用

2020 IEEE Ukrainian Microwave Week, UkrMW 2020

ISBN: (纸本)9781728173139

This paper explores the application of the adaptive filtering algorithms, based on Least Squares (LS) criterion for the calibration of the receiving arrays with digital beamforming. The digital beamforming assumes the access to the signals in the array channels as a requirement, which has to be provided if the adaptive signal processing is used. In this case, the adaptive filtering algorithms, based on the minimization of the LS error between the desired and array output signals, are able to estimate the channel parameter spread, which values can be stored and used for correction of the array weights during the beam steering. If a set of steered beam positions is known, for example in scanning arrays, the proposed algorithm allows to create a codebook of the array weights, which ensures the random variation of channel's parameters compensation and correct beam steering. The architecture of the proposed solution and mathematical description of a Recursive Least Squares (RLS) adaptive filtering algorithm, on which the calibration is based on, are presented. The algorithm uses a dynamic regularization of the array input signal correlation matrix. No specific correlation properties are required for the algorithm training signal. The simulation results demonstrate the ability of the calibration algorithm to compensate the channel's parameters spread. If the array channel Signal-to-Noise Ratio (SNR) is 0... 30 dB, then the achieved spread of the calibrated channels gain errors is about -20 dB. The norm of the ideal and calibrated array difference is also about -20 dB. The results are obtained with the Phase Shift Keying (PSK) and Quadrature Amplitude Modulated (QAM) training signals. The ability of the proposed calibration algorithm to operate in interference conditions is also demonstrated © 2020 IEEE.

关键词： Beamforming

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Current Threshold Elements of Cyclic Shift for Constructing Specialized IP-Memory Modules in Automation and Systems for Tolerance Control of Analog Signals

Current Threshold Elements of Cyclic Shift for Constructing ...

引用

International Conference for Young Scientists on Issues of Physics and Technology in Science, Power Industry and Medicine 2019, IPTSPIM 2019

作者： Butyrlagin, N.V. Chernov, N.I. Prokopenko, N.N. Ya Yugai, V. Department of Information System and Radio Engineering Don State Technical University Gagarin Sq. 1 Rostov-on-Don344000 Russia Institute for Design Problems in Microelectronics of Russian Academy of Sciences Institute for Design Problems in Microelectronics Ras Sovetskaya St. 3 Zelenograd124681 Russia

The current threshold elements of direct and reverse cyclic shift are developed. This logical elements are recommended as memory elements for the construction of relevant controllers and devices for tolerance control of analog signals, which used in diagnosis of complex electronic equipment. The mathematical apparatus used in the design is a linear algebra. The basic equations and results of computer modeling of the developed cyclic shift schemes are presented. Computer simulation was carried out in the Cadence environment on models of field-effect transistors XB06. © Published under licence by IOP Publishing Ltd.

关键词： Linear algebra

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Triple CJFET (Si, SiN, GaN, GaAs) Analog of the CMOS Transistor and its Main Connection Circuits in Lowerature Electronics

Triple CJFET (Si, SiN, GaN, GaAs) Analog of the CMOS Transis...

引用

2020 IEEE International Conference on Electrical Engineering and Photonics, EExPolytech 2020

作者： Prokopenko, Nikolay N. Zhuk, Alexey A. Ivanov, Yuri I. Don State Technical University Institute for Design Problems in Microelectronics of RAS Rostov-on-Don Zelenograd Russia Southern Federal University Rostov-on-Don Russia

ISBN: (纸本)9781728188782

The structure of the CJFET composite transistor (CT) for JFET technologies (Si, SiC, GaN, GaAs, etc.) is proposed, which in its drain-gate characteristics is similar to a CMOS junction field-effect transistor with an induced channel. The structure of the CJFET CT under consideration has a typical off state zone with a gate-source voltage not exceeding its threshold voltage. When the voltage increases at the equivalent gate, the CT switches to the active mode and can be used in tasks of analog signal amplification. Besides, with respect to the equivalent drain terminal of the CT, the signal is not inverted in the proposed CT. This is its wonderful feature. The main connection silicon circuits of the CT in cryogenic electronics are considered. © 2020 IEEE.

关键词： Gallium arsenide

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Synthesis of Approximate Combinational Circuits based on Logic Regression Approach

Synthesis of Approximate Combinational Circuits based on Log...

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East-West design & Test Symposium (EWDTS)

作者： Alexander Stempkovsky Dmitry Telpukhov Roman Solovyev Institute for Design Problems in Microelectronics of RAS Moscow Russia Department of Integrated Circuits Design Methodology Institute for Design Problems in Microelectronics of RAS Moscow Russia

ISBN: (数字)9781728198996

ISBN: (纸本)9781728199009

Approximate synthesis is a modern trend in the field of logic synthesis, which makes it possible to obtain much more compact, high-speed and reliable solutions due to weakening requirements for the accuracy of the implemented functions. For a number of applications, small distortions at outputs can be more than acceptable, and the improvement of characteristics is a powerful argument in favor of this method. We propose a new approach to the approximate synthesis of combinational logic, which is built upon solving the logic regression problem with the use of iterative methods based on two-level minimization. In the paper we state the logic regression problem and describe its possible applications. Solution based on two-level minimization methods is presented. We performed experimental research, which demonstrates high efficiency of the method. We revealed a fundamental drawback of the proposed method, that is, complexity of implementing circuits with a large number of linearly non-separable elements (XOR, NXOR). The ways to overcome this drawback are outlined.

关键词： Task analysis Iterative methods Complexity theory microelectronics Approximation algorithms Convergence Prediction algorithms

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Backpass Trees for Modifying PathFinder-based Routing Algorithm for FPGA

Backpass Trees for Modifying PathFinder-based Routing Algori...

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IEEE Region 8 International Conference on Computational Technologies in Electrical and Electronics Engineering, SIBIRCON

作者： Alexander Y. Chistiakov Mariya A. Zapletina Sergey V. Gavrilov CAD Department Institute for Design Problems in Microelectronics of RAS Zelenograd Russia Administration Department Institute for Design Problems in Microelectronics of RAS Zelenograd Russia

ISBN: (纸本)9781665464819

In the field-programmable gate array and programmable system-on-a-chip design flow routing is a highly time-consuming stage that provides the last opportunity to make any design optimizations. Therefore, reducing its runtime with no significant losses in a quality of result occurs to be an extremely important problem to solve. This paper proposes a modification of a PathFinder-based algorithm to implement a directed search technique which contributes FPGA routing acceleration. The main idea is to direct the searching process by routing graph connectivity consideration in a form of backpass trees. The modification is relevant for the situation when there are no geometric coordinates known for FPGA/PSoC routing resources. The modified algorithm was tested on IWLS’2005 and some commercial benchmark sets. The obtained experimental results demonstrate an average runtime reduction by 10% while the average critical path delay and wirelength slightly increase (1.8% and 0.3% respectively) caused by usage of the introduced backpass trees structures.

关键词： Runtime design automation Forestry Benchmark testing Routing Delays System-on-chip

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Room Frequency Response Equalization Using Modified X-Filtered Adaptive Algorithms

Room Frequency Response Equalization Using Modified X-Filter...

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Siberian Conference on Control and Communications (SIBCON)

作者： Victor Djigan Institute for Design Problems in Microelectronics of RAS Moscow Russia

ISBN: (纸本)9781665476294

This article presents a technology of the acoustic frequency response equalization. It is based on the usage of the modified x-filtered adaptive algorithms in the equalizers. Comparing to the traditional x-filtered algorithms, the modified ones allow to accelerate the equalizer convergence if the computationally simple LMS or the NLMS adaptive algorithms based on the gradient search strategy are used for the equalizer weights computation. Besides, the modification allows to use the computationally complex but simultaneously efficient RLS adaptive algorithms in the x-filtered mode because the algorithms cannot be used in the traditional x-filtered mode. The proposed equalizer architectures and the computational procedures of the traditional and modified adaptive filtering algorithms are presented. Simulation demonstrates a better performance of the modified algorithms comparing to the traditional ones in the following terms: the equalized frequency response ripple value, the proximity of the PSD curves of the undistorted speech signal and the signal passed through the equalizer and acoustic medium, the initial duration of the transient response of the error signal and the response steady-state value.

关键词： Transient response Gradient methods Computational modeling Computer architecture Filtering algorithms Frequency response Acoustics

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The Analysis of Logic Resynthesis Methods to Increase the Fault Tolerance of Combinational Circuits for Single Failures

The Analysis of Logic Resynthesis Methods to Increase the Fa...

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IEEE NW Russia Young Researchers in Electrical and Electronic Engineering Conference (EIConRusNW)

作者： Nikolay O. Vasilyev Mariya A. Zapletina Galina A. Ivanova Institute for Design Problems in Microelectronics of RAS Zelenograd Russia

ISBN: (数字)9781665404761

ISBN: (纸本)9781665446426

The paper discusses the methods for protecting logic elements of combinational circuits from single failures. Until recently, the problem of manufacturing the microelectronic products resistant to single failures of logic elements was relevant mainly in the military and space industries. In these areas, the increased requirements are imposed on the fault tolerance of circuits, since the latter are functioning under the influence of external destabilizing factors. These factors can be heavy charged particles that affect the operation of logic elements and cause their single failures. Due to the solid-state devices scaling, the technological standards for integral circuits design and manufacturing change and the fault tolerance problem becomes relevant for devices of the civilian market, also. The paper proposes a technique for a resynthesis of vulnerable areas of logic combinational circuits. To assess the stability, the logic constraints derived from the resolution method are suggested to use.

关键词： Fault tolerance Sensitivity Fault tolerant systems Stability criteria Combinational circuits Manufacturing Standards

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Reduced Complexity Antenna Array Calibration Algorithm

Reduced Complexity Antenna Array Calibration Algorithm

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Digital Signal Processing and its Applications (DSPA), International Conference on

作者： Victor Djigan Institute for Design Problems in Microelectronics of RAS Moscow Russia

A phase-less algorithm of the antenna array calibration is presented in this paper. The algorithm is used to estimate and compensate the signal phase lag variation in the array channels. The estimated phase lags include the lags, caused by the channel equipment, and the lags, caused by the signal source spatial location in the case of the receiving array or, otherwise, the receiver spatial location in the case of the transmitting array. The compensation of the first-mentioned phase lags means the array calibration and the compensation of the second-mentioned phase lags means the array calibration and beam steering simultaneously, because the channel, space and phase lags are not separable. The proposed algorithm requires $\boldsymbol{4+4(M-1)}$ measurements of the array output power after the changing of the signal phase to the specific values sequentially in the pairs of the reference and each of the calibrated channels of the array. Here, $\boldsymbol{M}$ is the number of the array channels. This algorithm requires about 33% less power measurements, and therefore has less complexity comparing to the similar calibration algorithm, which requires $\boldsymbol{2+6(M-1)}$ of such measurements. The accuracy of the channel phase estimation using the proposed or known calibration algorithm does not exceed the value of one discrete of the phase quantization by means of the digitally controlled phaseshifter. The proposed algorithm can be used in arrays of arbitrary geometric configuration.

关键词： Phased arrays Antenna measurements Power measurement Phase measurement Array signal processing Signal processing algorithms Channel estimation

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