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Stability Analysis of Mutually Synchronized Spatially Distributed 24 GHz Oscillators

Stability Analysis of Mutually Synchronized Spatially Distri...

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IEEE Instrumentation and Measurement Technology Conference

作者： Christian Hoyer Lucas Wetzel Dimitris Prousalis Jens Wagner Frank Jü licher Frank Ellinger Chair for Circuit Design and Network Theory Technische Universit&#x00E4 t Dresden Germany Max Planck Institute for the Physics of Complex Systems Dresden Germany Centre for Tactile Internet With Human-in-the-Loop (CeTI) Technische Universit&#x00E4

In this work the basin of stability of synchronized states in a system of two mutually delay-coupled phase-locked loops (PLLs) is studied. For sufficiently large cross-coupling time delays several synchronized states with different frequencies and phase relations can exist. This is termed multistability. Using PLL nodes with voltage-controlled oscillators operating at 24 GHz the basin of stability of in- and anti-phase synchronized states is measured. The PLL nodes were modified accordingly to measure the transient dynamics during synchronization. A comparison to the results of time domain simulations of the transient dynamics reveals that such dynamics can be predicted qualitatively and quantitatively. Based on these results, a deeper understanding of the synchronization process at time delays resulting in multistable states in coupled PLL networks, can be obtained.

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A Broadband, High Dynamic Range DPST Switch and IF Amplifier IC

A Broadband, High Dynamic Range DPST Switch and IF Amplifier...

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IEEE Annual Conference on Wireless and Microwave Technology (WAMICON)

作者： M. Sakalas N. Joram F. Protze F. Ellinger RF Group Baltic Institute of Advanced Technology Lithuania Chair for Circuit Design and Network Theory Technische Universität Dresden Germany

ISBN: (纸本)9781728151762;9781728151779

This work presents a broadband double pole single throw (DPST) switch and an intermediate frequency (IF) amplifier combination integrated circuit (IC) designed for a multiple antenna frequency modulated continuous wave (FMCW) radar receiver front-end. The DPST switch and IF amplifier designs feature techniques for enhancing the linearity and bandwidth, whereas on the other hand low noise figure, low DC power consumption and good isolation is maintained. designed using High Voltage CMOS (HV-CMOS) devices from a 130 nm SiGe BiCMOS technology, the combined circuit can be operated at supply voltages in range from 3 V-5 V. At the nominal 5 V operation, it delivers a transducer gain of 20 dB, noise Figure of 10 dB, isolation better than 38 dB, whereas the 3 dB gain flatness was measured from 5 MHz to 270 MHz.

关键词： Microwave measurement Noise figure Voltage measurement Broadband amplifiers Linearity Switches Radar

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A 79 GHz Millimeter-Wave Receiver Frontend with High Linearity for Civil-Automotive Radars in a 22-nm FD-SOI CMOS Technology

A 79 GHz Millimeter-Wave Receiver Frontend with High Lineari...

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Asia-Pacific Conference on Microwave

作者： Songhui Li Mengqi Cui Laszlo Szilagyi Corrado Carta Frank Ellinger Chair for Circuit Design and Network Theory TU Dresden Dresden Germany GlobalFoundries Dresden Germany IHP Leibniz Institute for High Performance Microelectronics Frankfurt (Oder) Germany TU Berlin Berlin Germany CeTi Center for Tactile Internet Dresden Germany

ISBN: (数字)9784902339567

ISBN: (纸本)9781665451086

This paper investigates a concept for a 79 GHz millimeter-wave receiver (Rx) frontend optimized for highly linear frequency-modulated continuous-wave civil-automotive radars. It consists of a double-balanced passive ring mixer for the frequency down-conversion, and two highly-linear differential amplifiers as low-noise amplifier and driver for the local-oscillator (LO) signal. To prove the concept, the circuit is implemented in a 22nm FDSOI CMOS technology. It is also studied how the control of the threshold voltage by the back-gate (BG) biasing can increase the circuit performance. Leveraging this feature, no dc biasing is required for the passive mixer and the trade-off between gain and linearity of the amplifiers can be easily tuned with the BG voltage. To characterize the Rx, the chip is mounted on a print circuit board with external resistive loads. Measurements of the fabricated chip show a maximum differential voltage conversion gain (CG) of 10.8 dB at a $1 \mathrm{k}\Omega$ load and the minimum double side-band NF $\boldsymbol{(\text{NF}_{\text{dsb},\min})}$ of 9.7 dB with a 50Ω-load. The simulation shows that the $\boldsymbol{\text{NF}_{\text{dsb},\min}}$ can be further improved, while the Rx drives a higher resistive load. With a 1 kΩ load, the simulated NF dsb,min is 7.5 dB. In the measured RF signal range from -30 dBm to -5 dBm, the CG is nearly linear, and the simulated input-referred 1dB-compression-point is between -4 dBm to -2 dBm depending on the LO frequency. To the best knowledge of the authors, this is the highest reported.

关键词： Millimeter wave circuits Voltage measurement Linearity Receivers Radar CMOS technology Frequency measurement

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Green Circular Economy design Aspects for 6G Wireless Millimeter-Wave Transceivers

Green Circular Economy Design Aspects for 6G Wireless Millim...

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URSI Atlantic Radio Science Conference (URSI AT-RASC)

作者： F. Ellinger H. Morath X. An M. Katz L. Ott A.M. Castro-Chong J. Wagner R. Henker T. Meister F. Protze F. Fitzek G. Fettweis E. Steinbach M. Zimmerling Y. Vaynzof J. Gutzmer E. Günther Chair for Circuit Design and Network Theory (CCN) TU Dresden (TUD) Germany CeTI University of Oulu 6G Flagship Finland Chair for Emerging Electronic Technologies TUD Leibniz-Institute for Solid State and Materials Research Dresden Telekom Chair TUD Vodafone Chair TUD Chair for Media Techn. TU Munich Networked Embedded Systems Lab Darmstadt HZDR UNU-FLORES

ISBN: (数字)9789463968102

ISBN: (纸本)9798350360257

Application specific integrated circuits (ASICs) operating at millimeter-wave (MW) frequencies (30 to 300 GHz) are of key importance for future wireless communications. At present, MW transceivers are mainly optimized for high performance leading to a large DC power $\left(P_{D C}\right)$. In this paper, we propose a holistic design paradigm for wireless MW transceivers taking into account a wide range of green circular economy aspects. We discuss concepts to decrease $P_{D C}$ in operation and resource consumption in fabrication. We further discuss how to avoid toxicity and allow for a longer lifetime, DC supply via energy harvesting, batteryless operation and recycling. To demonstrate the feasibility of several of these concepts, we present the first selfsufficient supply of a 60 GHz CMOS on/off keying (OOK) data transmitter (TX) ASIC with highly-adaptive dutycycling. Since the required active solar cell area is only $4.5 \mathrm{mm}^{2}$, the way is paved for significantly advanced levels of miniaturization and resource saving for self-supplying MW-TX.

关键词： Wireless communication Application specific integrated circuits Fabrication Toxicology Photovoltaic cells Green products Radio transmitters

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A Multiple Input and Gain Adjustable Phase Detector in 130 nm SiGe BiCMOS Technology

A Multiple Input and Gain Adjustable Phase Detector in 130 n...

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BiCMOS and Compound Semiconductor Integrated circuits and Technology Symposium (BCICTS)

作者： Rabia Fatima Riaz Manu Viswambharan Thayyil Jens Wagner Lucas Wetzel Dimitrios Prousalis Frank Ellinger Chair for Circuit Design and Network Theory Technische Universität Dresden Germany Centre for Tactile Internet with Human-in-the-Loop (CeTI) Technische Universität Dresden Germany Max Planck Institute for the Physics of Complex Systems Dresden Germany BMBF Research Hub 6G-life Technische Universität Dresden Germany

ISBN: (纸本)9781665491334

Mutual network synchronization of electronic oscillators relies on their bidirectional coupling. Each oscillator receives at least one input signal from another oscillator. However, in most cases there is more than one input. Consequently, the architecture design of the phase-detectors (PD) of phase-locked loop (PLL) needs to be revised to allow for more than one input signal. This work investigates a PD which has three external inputs, in addition to the feedback signal. It is designed and fabricated in 130 nm SiGe BiCMOS technology. The inputs can be fed independently of each other over a wide range of high input frequencies, ranging from 6 GHz to 17 GHz and it’s gain can be adjusted to correct for variations in the PD output characteristics and to control the PLL’s loop gain. It’s architecture is scalable and can be easily modified to accommodate more input signals. Hence, arbitrary network coupling topologies where PLLs receive input from many other nodes in the network can be realized. It enables setting up, e.g., distributed systems of mutually coupled sensors and sustainable analog computers, so called Ising machines.

关键词： Couplings network topology Computer architecture BiCMOS integrated circuits Topology Synchronization Phase locked loops

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Mutual Synchronization with 24 GHz Oscillators

Mutual Synchronization with 24 GHz Oscillators

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IEEE International Symposium on circuits and Systems

作者： C. Hoyer D. Prousalis L. Wetzel R. Riaz Jens Wagner F. Julicher F. Ellinger Chair for Circuit Design and Network Theory Technische Universität Dresden Germany Max Planck Institute for the Physics of Complex Systems Dresden Germany Centre for Tactile Internet with Human-in-the-Loop (CeTI) Technische Universität Dresden Germany

This work presents synchronization of two bidirectionally delay-coupled phase locked loop (PLL) systems with voltage controlled oscillator frequencies of 24 GHz to validate a non-hierarchical clock distribution approach. For this purpose, a PLL architecture that allows mutual coupling between two such nodes is introduced. An existing phase domain model is extended to include the nonlinear response of the oscillator to the tuning signal. With this extension the frequencies and phase-relations of self-organized synchronized states can be precisely predicted. This is verified by measurements obtained from two synchronized PLLs for different time delays and division factors. The predictions of the model are in good agreement with the measurements. For time delays up to 14 ns it is shown that self-organized synchronization is feasible at microwave frequencies.

关键词： Time-frequency analysis Delay effects Voltage-controlled oscillators Predictive models Synchronization Phase locked loops Tuning

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Stability and Transient Dynamics of PLLs in theory and Experiments

Stability and Transient Dynamics of PLLs in Theory and Exper...

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European Conference on circuit theory and design, ECCTD

作者： Rabia Fatima Riaz Dimitrios Prousalis Christian Hoyer Jens Wagner Frank Ellinger Frank Jülicher Lucas Wetzel Chair for Circuit Design and Network Theory Technische Universität Dresden Germany Max Planck Institute for the Physics of Complex Systems Dresden Germany Centre for Tactile Internet with Human-in-the-Loop (CeTI) Technische Universit¨at Dresden Germany

ISBN: (数字)9781728171838

ISBN: (纸本)9781728171845

This paper presents a generalization of the classical phase-locked loop (PLL) theory. It includes the effects of time-delays and mutual coupling between PLLs. Two methods for finding stable solutions to locked states and their transient dynamics are discussed. The theoretical predictions of these methods are verified by experimental measurements obtained of a classical PLL entrained by a clock. For entrainment the generalized and classical PLL theory overlap. The analysis correctly predicts the phase-relations of phase-locked states, the loop-gain dependency on the component characteristics and time-delays and the transient dynamics, i.e., perturbation decay rate and the frequency of perturbation decay. Thus the generalized theory allows a deeper understanding of a PLL's response. The model covers PLLs of arbitrary order and number of inputs.

关键词： Phase locked loops Clocks Perturbation methods Voltage-controlled oscillators Delays Stability analysis Transient analysis

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A 180-GHz Super-Regenerative Oscillator with up to 58 dB Gain for Efficient Phase Recovery

A 180-GHz Super-Regenerative Oscillator with up to 58 dB Gai...

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IEEE Symposium on Radio Frequency Integrated circuits (RFIC)

作者： Hatem Ghaleb Christian Carlowitz David Fritsche Corrado Carta Frank Ellinger Chair for Circuit Design and Network Theory Technische Universität Dresden Germany Institute of Microwaves and Photonics University of Erlangen-Nuremberg Germany

This paper reports on the design of a 180-GHz super-regenerative oscillator in a 130nm SiGe BiCMOS technology. The oscillator has a tuning range of 6.5%, an output power of 0.5 dBm, and occupies an area of 0.72 mm 2 . When operated with a periodic quench signal, the circuit requires a minimum input power of -58 dBm for a phase coherent output, and can be switched at a rate up to 10 GHz. The circuit has a dc power consumption of 8.8 mW, and a maximum regenerative gain of 58 dB. QPSK and 8-PSK modulation up to 3 Gbit/s have been demonstrated at an energy efficiency of 2.9 pJ/bit. To the best knowledge of the authors, this work is the fastest reported phase-sampling super-regenerative oscillator to date.

关键词： Oscillators Gain Power generation Frequency measurement Silicon germanium Transmission line measurements Power demand

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Combinational Decompressors with Nonlinear Codes

Combinational Decompressors with Nonlinear Codes

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Euromicro Symposium on Digital System design

作者： Ondřej Novák Martin Rozkovec Jan Pliva Institute of Information Technologies and Electronics Technical University in Liberec Liberec Czech Republic Circuit Design and Network Theory Department Technical University Dresden Dresden Germany

ISBN: (纸本)9781728128634

Test patterns are transferred from the tester to the circuit under test in a compressed form as it minimizes test access mechanism bandwidth and transfer time. It was found that nonlinear binary codes could be useful for encoding test patterns in a similar way as linear ones and the compression efficiency may be higher. The key important characteristics of the nonlinear codes are that the number of codeword bits may be higher than it is for the linear code words while the number of specified bits is preserved. The nonlinear binary codes can be used in test pattern decompressors. It causes better encoding characteristics can be obtained for a higher number of parallel scan chains comparing with linear codes. In this paper, we propose a relatively fast heuristics that can be used for finding the nonlinear function truth tables guaranteeing the required number of specified bits and enables hardware overhead minimization. We quantify the benefits and costs of decompressors with nonlinear codes and verify the benchmark circuit test pattern encoding efficiency.

关键词： Binary codes Linear codes Digital systems Information technology Electronic circuits Bandwidth

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IPCEI subcontracts contributing to 22-FDX Add-On Functionalities at GF

IPCEI subcontracts contributing to 22-FDX Add-On Functionali...

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European Conference on Solid-State Device Research (ESSDERC)

作者： S. Kolodinski C. Mart W. Weinreich V. Sessi J. Trommer T. Chohan H. Mulaosmanovic W. M. Weber S. Slesazeck B. Peng C. Esposito Y. Zimmermann M. Schröter X. Xu P. V. Testa C. Carta F. Ellinger S. Lehmann M. Drescher M. Wiatr Technology Coordination GLOBALFOUNDRIES Management Services LLC & Co.KG IOT Components and Systems Fraunhofer Institute for Photonic Microsystems IPMS Dresden Germany Namlab gGmbH Dresden Germany Chair for Electron Devices and Integrated Circuits TU Dresden Dresden Germany Chair of Circuit Design and Network Theory Technische Universität Dresden Germany Technology & Integration GLOBALFOUNDRIES

Highlights from Silicon Device Physics, material sciences and electrical engineering are among the first results to be presented from GFs subcontracts in the IPCEI-project, namely a reconfigurable FET compatible with 22-FDX-technology, a CMOS compatible new material Si doped HfO 2 for electrocaloric/ pyroelectric effects on chip, modelling of the 22FDX devices in the higher GHz range and first 5G Dual Band transceiver blocks designed in 22FDX

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