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Proximity-based service discovery for distributed digital twin systems

Discover Internet of Things 2025年第1期5卷 1-24页

作者： Rothermel, Kurt Herzog, Otthein Zhiqiang, Siegfried Wu Institute Of Parallel and Distributed Systems University of Stuttgart Universitaetsstr. 38 Stuttgart70569 Germany College of Architecture and Urban Planning Tongji University 1239 Siping Road Shanghai200092 China Department of Mathematics and Computer Science University of Bremen Bibliothekstrasse 5 Bremen23884 Germany

Over the past decade, there has been a significant increase in interest in digital twin (DT) technology in a variety of domains. While research on DTs of single assets was initially prevalent, there has been a notable shift towards distributed systems of DTs, which connect to each other to collaborate. Typically, collaboration is enabled by DTs providing services that can be consumed by other DTs. In service-oriented systems, a service is typically identified by type information. However, this is not sufficient in distributed DT systems, where DTs associated with different physical entities may provide the same type of service. Consequently, selecting the appropriate service depends not only on the service type, but also on the associated physical entity. However, requiring DTs to know the mapping of services to their physical environment is not feasible for large dynamic systems. This paper presents a novel proximity-based service discovery method that allows DTs to select services based on service type and their proximity to other objects. That is, service specifications are fully abstracted from the mapping of services to physical objects, relieving DTs from maintaining information about this mapping. Furthermore, service discovery is robust to changes in the physical environment and service population. The proposed service discovery method has been implemented on top of a spatial DBMS. We argue that this implementation is optimal in terms of network utilization and latency, and perform comprehensive evaluations to show the performance of discovery queries as a function of their complexity. © The Author(s) 2025.

关键词： Location based services

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Scenario-based Test Content Optimization: Scan Test vs. System-Level Test

Scenario-based Test Content Optimization: Scan Test vs. Syst...

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VLSI Test Symposium

作者： Nourhan Elhamawy Jens Anders Ilia Polian Matthias Sauer Institute of Smart Sensors University of Stuttgart Institute of Computer Engineering and Computer Architecture University of Stuttgart Advantest Europe

ISBN: (数字)9798350363784

ISBN: (纸本)9798350363791

Test application to state-of-the-art integrated circuits usually consists of multiple test insertions: wafer sort, final test and system-level test (SLT). This paper considers optimization of test content, taking requirements of specific scenarios, such as expected yield levels, test costs and criticality of test escapes, into account. An integrated cost model is proposed and applied to four different test setups on a medium-complexity RISC-V microprocessor. Our results indicate opportunities for up to ~ 40% total cost reduction compared to today’s industrial practice. They also provide insights on the relative importance of various cost contributors, such as the number of available scan test insertions or the specific SLT workload used.

关键词： Semiconductor device modeling Costs Microprocessors Very large scale integration Integrated circuit modeling Optimization

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Synergistic Floorplanning and Routing Topology Co-design for Application-Specific NoC Synthesis

Synergistic Floorplanning and Routing Topology Co-design for...

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IEEE International Symposium on Embedded Multicore Socs (MCSoC)

作者： Shuang Liu Martin Radetzki Chair of Embedded Systems Institute of Computer Architecture and Computer Engineering University of Stuttgart Stuttgart Germany

ISBN: (数字)9798331530471

ISBN: (纸本)9798331530488

Network-on-Chip (NoC) offers a promising solution for on-chip communication in highly integrated System-on-Chips (SoCs). NoCs can be designed with either regular or application-specific network topologies. While regular topologies are easy to design, they are not ideal for systems with heterogeneous processing elements (PEs) that vary in size. The design of application-specific NoCs, however, involves several interrelated problems that impact each other. This work addresses the challenges in the synthesis of application-specific NoCs by proposing an Integer Linear Programming (ILP) framework. This framework enables the co-design of major problems, including floorplanning, routing topology generation, routing path construction, and application mapping. Although the ILP framework can be applied to each problem individually or in a stepwise manner, the co-design of these interconnected problems allows synthesis steps to interact, enabling designers to explore the entire design space. Using this framework, we have analyzed various design configurations in the synthesis of application-specific NoCs.

关键词： Network topology Multicore processing Fault tolerant systems Network-on-chip System recovery Integer linear programming Routing Linear programming Topology Wire

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Integer Linear Programming Based Design of Deadlock-Free Routing for Chiplet-Based Systems

Integer Linear Programming Based Design of Deadlock-Free Rou...

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IEEE International SOC Conference

作者： Shuang Liu Martin Radetzki Chair of Embedded Systems Institute of Computer Architecture and Computer Engineering University of Stuttgart Stuttgart Germany

ISBN: (数字)9798350377569

ISBN: (纸本)9798350377576

Chiplet-based systems have become prominent in large Systems-on-Chips (SoCs) as a means to mitigate increasing design costs. However, the integration of multiple chiplets introduces new challenges in the interconnection network, potentially leading to deadlocks. In this paper, we propose an Integer Linear Programming (ILP) based design approach to address this issue. Our method considers various design factors for deadlock-free routing, such as topology, latency, load balancing, path diversity, and fault tolerance, applicable to both general-purpose chiplets and application-specific chiplets. It facilitates the determination of optimal turn restrictions for general-purpose chiplets or constructs optimal deadlock-free routing paths for application-specific chiplets if the communication patterns are known. The results demonstrate the capability of the method to find optimal solutions under various design considerations.

关键词： Fault tolerance Network topology Chiplets Fault tolerant systems System recovery Integer linear programming Routing Load management Topology System-on-chip

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Synergistic Dynamical Decoupling and Circuit Design for Enhanced Algorithm Performance on Near-Term Quantum Devices

arXiv

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arXiv 2024年

作者： Ji, Yanjun Polian, Ilia Institute of Computer Architecture and Computer Engineering University of Stuttgart Pfaffenwaldring 47 Stuttgart70569 Germany

Dynamical decoupling (DD) is a promising technique for mitigating errors in near-term quantum devices. However, its effectiveness depends on both hardware characteristics and algorithm implementation details. This paper explores the synergistic effects of dynamical decoupling and optimized circuit design in maximizing the performance and robustness of algorithms on near-term quantum devices. By utilizing eight IBM quantum devices, we analyze how hardware features and algorithm design impact the effectiveness of DD for error mitigation. Our analysis takes into account factors such as circuit fidelity, scheduling duration, and hardware-native gate set. We also examine the influence of algorithmic implementation details, including specific gate decompositions, DD sequences, and optimization levels. The results reveal an inverse relationship between the effectiveness of DD and the inherent performance of the algorithm. Furthermore, we emphasize the importance of gate directionality and circuit symmetry in improving performance. This study offers valuable insights for optimizing DD protocols and circuit designs, highlighting the significance of a holistic approach that leverages both hardware features and algorithm design for the high-quality and reliable execution of near-term quantum algorithms. Copyright © 2024, The Authors. All rights reserved.

关键词： Inverse problems

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Optimal Qubit Reuse for Near-Term Quantum computers 4

Optimal Qubit Reuse for Near-Term Quantum Computers

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4th IEEE International Conference on Quantum Computing and engineering, QCE 2023

作者： Brandhofer, Sebastian Polian, Ilia Krsulich, Kevin Institute of Computer Architecture and Computer Engineering Center for Integrated Quantum Science and Technology University of Stuttgart Stuttgart Germany Ibm Quantum Ibm Tj Watson Research Center Yorktown HeightsNY United States

ISBN: (纸本)9798350343236

Near-term quantum computations are limited by high error rates, the scarcity of qubits and low qubit connectivity. Increasing support for mid-circuit measurements and qubit reset in near-term quantum computers enables qubit reuse that may yield quantum computations with fewer qubits and lower errors. In this work, we introduce a formal model for qubit reuse optimization that delivers provably optimal solutions with respect to quantum circuit depth, number of qubits, or number of swap gates for the first time. This is in contrast to related work where qubit reuse is used heuristically or optimally but without consideration of the mapping effort. We further investigate reset errors on near-term quantum computers by performing reset error characterization experiments. Using the hereby obtained reset error characterization and calibration data of a near-term quantum computer, we then determine a qubit assignment that is optimal with respect to a given cost function. We define this cost function to include gate errors and decoherence as well as the individual reset error of each qubit. We found the reset fidelity to be state-dependent and to range, depending on the reset qubit, from 67.5% to 100% in a near-term quantum computer. We demonstrate the applicability of the developed method to a number of quantum circuits and show improvements in the number of qubits and swap gate insertions, estimated success probability, and Hellinger fidelity of the investigated quantum circuits. © 2023 IEEE.

关键词： Optimization

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Text-guided diverse-expression diffusion model for molecule generation

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Chinese Physics B 2025年第5期34卷 106-113页

作者： Wenchao Weng Hanyu Jiang Xiangjie Kong Giovanni Pau College of Computer Science and Technology Zhejiang University of TechnologyHangzhou 310014China Hangzhou Dianzi University ITMO Joint Institute Hangzhou Dianzi UniversityHangzhou 310018China Faculty of Engineering and Architecture Kore University of EnnaItaly

The task of molecule generation guided by specific text descriptions has been proposed to generate molecules that match given text *** methods typically use simplified molecular input line entry system(SMILES)to represent molecules and rely on diffusion models or autoregressive structures for ***,the one-to-many mapping diversity when using SMILES to represent molecules causes existing methods to require complex model architectures and larger training datasets to improve performance,which affects the efficiency of model training and *** this paper,we propose a text-guided diverse-expression diffusion(TGDD)model for molecule *** combines both SMILES and self-referencing embedded strings(SELFIES)into a novel diverse-expression molecular representation,enabling precise molecule mapping based on natural *** leveraging this diverse-expression representation,TGDD simplifies the segmented diffusion generation process,achieving faster training and reduced memory consumption,while also exhibiting stronger alignment with natural *** outperforms both TGM-LDM and the autoregressive model MolT5-Base on most evaluation metrics.

关键词： molecule generation diffusion model AI for science

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Fault Tolerance in Stochastic Circuits for Recurrent Sequential Neural Networks

Fault Tolerance in Stochastic Circuits for Recurrent Sequent...

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Asian Test Symposium (ATS)

作者： Roshwin Sengupta Ilia Polian John P. Hayes Institute of Computer Architecture and Computer Engineering University of Stuttgart Stuttgart Germany Computer Engineering Laboratory University of Michigan Ann Arbor Michigan USA

ISBN: (数字)9798331529161

ISBN: (纸本)9798331529178

Stochastic computing (SC) provides low-area, power-efficient hardware solutions suitable for edge systems, but its scalability poses challenges due to its precision limitations, especially in noisy environments. This paper investigates the fault tolerance of key SC components, such as stochastic number generators (SNGs) and activation functions (AFs), within recurrent and sequential networks like long short-term memory (LSTM) networks. We inject bit-flip faults into a network’s most sensitive inputs, weights and AFs, and study fault propagation across different network layers. Our findings reveal that SC component choices significantly influence fault tolerance. For example, networks using Sobol-based SNGs with tanh AFs exhibited stronger resilience than those with LFSR-based SNGs and ReLU AFs, by maintaining higher accuracy under fault conditions. However, the accuracy of the networks declined significantly under simultaneous faults in inputs, weights and AFs. Additionally, while increasing stochastic number lengths improved fault tolerance, they also increased latency. Nevertheless, the SC networks achieved up to 54% area and 72% power savings, making them ideal for resource-constrained applications. We also found that there is a trade-off between efficiency and fault tolerance: SC designs that focus on resource efficiency may struggle in noisy environments, where fault-tolerant SC designs are more effective. This implies that fault resilience in SC architectures depend heavily on design choices and cannot be assumed inherent across all configurations.

关键词： Fault tolerance Accuracy Fault tolerant systems Robustness Hardware Circuit faults Noise measurement Transient analysis Long short term memory Resilience

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Performance and Error Tolerance of Stochastic Computing-Based Digital Filter Design

Performance and Error Tolerance of Stochastic Computing-Base...

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IEEE Design and Diagnostics of Electronic Circuits and Systems (DDECS)

Recent advances in near-sensor computing have prompted the need to design low-cost digital filters for edge devices. Stochastic computing (SC), leveraging its probabilistic bit-streams, has emerged as a compelling alternative to traditional deterministic computing for filter design. This paper examines error tolerance, area and power efficiency, and accuracy loss in SC-based digital filters. Specifically, we investigate the impact of various stochastic number generators and increased filter complexity on both FIR and IIR filters. Our results indicate that in an error-free environment, SC exhibits a 49% area advantage and a 64% power efficiency improvement, albeit with a slight loss of accuracy, compared to traditional binary implementations. Furthermore, when the input bit-streams are subject to a 2% bit-flip error rate, SC FIR and SC IIR filters have a much smaller performance degradation (1.3X and 1.9X, respectively) than comparable binary filters. In summary, this work provides useful insights into the advantages of stochastic computing in digital filter design, showcasing its robust error resilience, significant area and power efficiency gains, and trade-offs in accuracy compared to traditional binary approaches.

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An attention-based teacher-student model for multivariate short-term landslide displacement prediction incorporating weather forecast data

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Journal of Mountain Science 2024年第8期21卷 2739-2753页

作者： CHEN Jun HU Wang ZHANG Yu QIU Hongzhi WANG Renchao Sichuan Artificial Intelligence Research Institute Yibin 644000China School of Computer Science and Engineering University of Electronic Science and Technology of ChinaChengdu 611731China School of Architecture and Civil Engineering Chengdu UniversityChengdu 610106China

Predicting the displacement of landslide is of utmost practical importance as the landslide can pose serious threats to both human life and ***,traditional methods have the limitation of random selection in sliding window selection and seldom incorporate weather forecast data for displacement prediction,while a single structural model cannot handle input sequences of different lengths at the same *** order to solve these limitations,in this study,a new approach is proposed that utilizes weather forecast data and incorporates the maximum information coefficient(MIC),long short-term memory network(LSTM),and attention mechanism to establish a teacher-student coupling model with parallel structure for short-term landslide displacement *** MIC,a suitable input sequence length is selected for the LSTM *** investigate the influence of rainfall on landslides during different seasons,a parallel teacher-student coupling model is developed that is able to learn sequential information from various time series of different *** teacher model learns sequence information from rainfall intensity time series while incorporating reliable short-term weather forecast data from platforms such as China Meteorological Administration(CMA)and Reliable Prognosis(https://***)to improve the model’s expression capability,and the student model learns sequence information from other time *** attention module is then designed to integrate different sequence information to derive a context vector,representing seasonal temporal attention ***,the predicted displacement is obtained through a linear *** proposed method demonstrates superior prediction accuracies,surpassing those of the support vector machine(SVM),LSTM,recurrent neural network(RNN),temporal convolutional network(TCN),and LSTM-Attention *** achieves a mean absolute error(MAE)of 0.072 mm,root mean square error(RMSE)of 0.096 mm,and pearson correlation coefficients(PC

关键词： Landslide prediction MIC LSTM Attention mechanism Teacher Student model Prediction stability and interpretability

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