Approximate computing allows designers to trade-off precision with hardware cost and power consumption. The possible degree of approximation relies on a realistic quality assessment with functional input sequences and...
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ISBN:
(数字)9798350360349
ISBN:
(纸本)9798350360356
Approximate computing allows designers to trade-off precision with hardware cost and power consumption. The possible degree of approximation relies on a realistic quality assessment with functional input sequences and metrics to quantify the error magnitude. The complete exploration of the input space is impracticable in most cases but a partial input sequence might underestimate the severity of possible errors. The paper at hand presents an approach to generate patterns for efficient acceptability verification of an approximate circuit and to complement conventional quality assessment methods. A modified miter design indicates the differences between the approximate and the precise circuit, and an existing ATPG flow is used to maximize the differences. A case study on JPEG2000 decoder validates that our approach can efficiently and effectively identify unacceptable approximate results where conventional image quality assessment methods failed.
In the era of Industry 4.0, Smart Manufacturing is reshaping how things are made. At the heart of it is the Industrial Internet of Things (IIoT), where smart sensors and connections create a digital system for factori...
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System-Level Test (SLT) has been a part of the test flow for integrated circuits for over a decade and still gains importance. However, no systematic approaches exist for test program generation, especially targeting ...
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System-Level Test (SLT) is essential for testing integrated circuits, focusing on functional and non-functional properties of the Device under Test (DUT). Traditionally, test engineers manually create tests with comme...
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ISBN:
(数字)9798350366884
ISBN:
(纸本)9798350366891
System-Level Test (SLT) is essential for testing integrated circuits, focusing on functional and non-functional properties of the Device under Test (DUT). Traditionally, test engineers manually create tests with commercial software to simulate the DUT's end-user environment. This process is both time-consuming and offers limited control over non-functional properties. This paper proposes Large Language Models (LLMs) enhanced by Structural Chain of Thought (SCoT) prompting, a temperature schedule, and a pool of previously generated snippets to generate high-quality code snippets for SLT. We repeatedly query the LLM for a better snippet using previously generated snippets as examples, thus creating an iterative optimization loop. This approach can automatically generate snippets for SLT that target specific non-functional properties, reducing time and effort. Our findings show that this approach improves the quality of the generated snippets compared to unstructured prompts containing only a task description.
System-Level Test (SLT) has been an integral part of integrated circuit test flows for over a decade and continues to be significant. Nevertheless, there is a lack of systematic approaches for generating test programs...
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ISBN:
(数字)9798350349320
ISBN:
(纸本)9798350349337
System-Level Test (SLT) has been an integral part of integrated circuit test flows for over a decade and continues to be significant. Nevertheless, there is a lack of systematic approaches for generating test programs, specifically focusing on the non-functional aspects of the Device under Test (DUT). Currently, test engineers manually create test suites using commercially available software to simulate the end-user environment of the DUT. This process is challenging and laborious and does not assure adequate control over non-functional properties. This paper proposes to use Large Language Models (LLMs) for SLT program generation. We use a pre-trained LLM and fine-tune it to generate test programs that optimize non-functional properties of the DUT, e.g., instructions per cycle. Therefore, we use Gem5, a microarchitectural simulator, in conjunction with Reinforcement Learning-based training. Finally, we write a prompt to generate C code snippets that maximize the instructions per cycle of the given architecture. In addition, we apply hyperparameter optimization to achieve the best possible results in inference.
To automate surgical (sub-)tasks in robotic surgery, the knowledge of the exact pose of the instrument is mandatory. The application of Optical Coherence Tomography (OCT) to the problem of pose measurement appears pro...
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The current work aims to present abundant families of the exact solutions of Mikhailov-Novikov-Wang equation via three different *** adopted methods are generalized Kudryashov method(GKM),exponential rational function...
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The current work aims to present abundant families of the exact solutions of Mikhailov-Novikov-Wang equation via three different *** adopted methods are generalized Kudryashov method(GKM),exponential rational function method(ERFM),and modified extended tanh-function method(METFM).Some plots of some presented new solutions are represented to exhibit wave *** results in this work are essential to understand the physical meaning and behavior of the investigated equation that sheds light on the importance of investigating various nonlinear wave phenomena in ocean engineering and *** equation provides new insights to understand the relationship between the integrability and water waves’phenomena.
Cross-project defect prediction is a hot topic in the field of defect prediction. How to reduce the difference between projects and make the model have better accuracy is the core problem. This paper starts from two p...
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Cross-project defect prediction is a hot topic in the field of defect prediction. How to reduce the difference between projects and make the model have better accuracy is the core problem. This paper starts from two perspectives: feature selection and distance-weight instance transfer. We reduce the differences between projects from the perspective of feature engineering and introduce the transfer learning technology to construct a cross-project defect prediction model WCM-WTrA and multi-source model Multi-WCM-WTrA. We have tested on AEEEM and ReLink datasets, and the results show that our method has an average improvement of 23%compared with TCA+ algorithm on AEEEM datasets,and an average improvement of 5% on ReLink datasets.
Identification of DeepFake video content is a challenging scientific problem that addresses a growing societal concern. We investigate the relationship between DeepFake detection by humans and by automatic methods bas...
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Marginal defects, such as high-resistance short or low-resistance open defects, are hard to detect by conventional pass-fail test methods because their manifestations are practically indistinguishable from the effects...
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ISBN:
(数字)9798331529161
ISBN:
(纸本)9798331529178
Marginal defects, such as high-resistance short or low-resistance open defects, are hard to detect by conventional pass-fail test methods because their manifestations are practically indistinguishable from the effects of regular variations. However, their coverage is essential for circuits with high-quality requirements and/or when early-life failures are a concern. In this paper, we propose an alternative detection concept based on evaluating several parametric responses of a circuit against a machine learning (ML) model. We use a 14nm FinFET transistor model validated against industrial measurements. We show that high detection performance is possible even when unsupervised learning that does not consider defective behavior is used; to this end, the procedure is generic. Moreover, an AUC score of over 0.96 is achieved when only measurements from a single voltage level are utilized, in contrast to earlier work. We also present a procedure to select a reduced set of test sequences, achieving an improvement of 50% reduction with a limited impact on detection performance.
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