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1991 Euromicro Workshop on Real-Time Systems, ECRTS 1991

作者： Lindh, Lennart Stanischewski, Frank University of Erlangen-Nürnberg Institute for Computer Aided Circuit Design Prof. Müller-Glaser Wetterkreuz 13 D-8520 Erlangen Germany Martensstraße 3 D-8520 Erlangen Germany

ISBN: (纸本)0818622105

The designer of hard realtime systems requires deterministic behaviour of the system. Today there are problems because of the hardware and the real-time kernel. So one gets only statistic statements regarding timing. The article describes a new hardware structure that is deterministic, fast and includes a real-time kernel in hardware. But this structure is limited to small real-time systems. © 1991 IEEE.

关键词： Real time systems

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An algorithm for discrete event logic simulation on distributed systems

An algorithm for discrete event logic simulation on distribu...

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IEEE Region 10 International Conference TENCON

作者： S. Sundaram T.S. Mohan L.M. Patnaik Computer Aided Design Laboratory Indian Institute of Technology Bangalore India Knoirkdgr Based Computer System Laboratory Supercomputer Education and Research Centre Indian Institute of Technology Bangalore India Department of Compritei Scienceand Automation Indian Institute of Technology Bangalore India

Increase in the complexity of VLSI digital circuit design demands faster logic simulation techniques than those currently available. One of the ways of speeding up existing logic Simulation Agorithms is by exploiting the inherent parallelism of the sequential version. In this paper, we explore the possibility of mapping an event driven logic simulation algorithm onto a cluster of processors interconnected by an ethernet. The set of events at any simulation time. step is partitionecl by the Master Task (running on the host processor) anlong the Worker Tasks(running of the other processor's). The partitioning scheme ensures a balanced load. Each Worker Task determines the fanout, elementts, evaluates them independently and comes up with the new event list which is passed onto the Master Task. After receiving the event lists from all the workers, the Master Task increments the simulation time step, computes the new event list partition for the next simulation cycle. We have implemented this distributed logic simulation algorithm on a set of 8 VAXstations using CT - a package for distributed programming. The paper concludes with a note on the speedup figures obtained on the ISCAS benchmark circuits.

关键词： Discrete event simulation Circuit simulation Computational modeling Packaging Delay Partitioning algorithms Runtime Logic circuits Distributed computing Very large scale integration

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Goal orientated slicing enumeration through shape function clipping

Goal orientated slicing enumeration through shape function c...

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European Conference on design Automation

作者： G. Sigl U. Schlitchtmann Institute of Computer-Aided Design Department of Electrical Engineering Technical University Munich Munich Germany Dept. of Electr. Eng. Tech. Unvi. of Munich Germany

Two new methods for efficient enumeration of slicing structures useful for macro cell and sea-of-gates final placement are presented. Contrary to existing approaches a further preorder traversal of the slicing tree is added, which allows elimination of unnecessary shapes in an early design phase. Applying this look ahead strategy, memory and computation time requirements have been reduced drastically. Better placements have been achieved by using the saved resources to enlarge the search space for enumeration.< >

关键词： Shape Polynomials Upper bound Optimization methods design automation Printed circuits design optimization Delay Wiring Algorithm design and analysis

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SMALL SHIPS, ADVANCED TECHNOLOGY AND WARFIGHTING PERFORMANCE

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NAVAL ENGINEERS JOURNAL 1991年第3期103卷 30-45页

作者： SKOLNICK, DH SKOLNICK, A David H. Skolnickhas practiced naval engineering in both government and industry. He has supported the Military Sealift Command and the Naval Sea Systems Command Ship Design Group and Amphibious Ship Acquisition Program Office participating in the design and assessment of ship structure evaluation of intact and damaged stability and arrangements during design and construction phases of acquisition conversion and overhaul. He is currently involved in systems engineering and integration. Recent responsibilities have included requirements analyses and feasibility studies interface analyses and computer aided analyses. He received his B.S. in naval architecture and marine engineering from Webb Institute of Naval Architecture in 1982 (as an ASNE scholar) and is currently an M.S. candidate in systems engineering at the University of Virginia. Alfred Skolnickserved over 30 years as an engineering duty officer and retired from the Navy with the rank of captain in 1983. His early assignments included tactical missile engineering shipboard duty and Polaris submarine inertial navigation. He later served in the Deep Submergence Systems Project was project director surface effect ships (SES) David Taylor Model Basin director of technology Joint Navy-Commerce SES Program director combat systems Naval Sea Systems Command and project manager directed energy weapons. His awards include the Navy League's Parsons Award in 1979 for scientific and technical progress ASNE's Gold Medal in 1981 for high energy laser development the Navy Legion of Merit in 1983 National Capital Engineer of the Year in 1986 and the American Defense Preparedness Association Gold Medal in 1988 for contributions to strategic defense. He was president of ASNE from 1985–1989. He received his B.S. in mathematics from Queens College his M.A. in mathematics from Columbia University his M.S. in electrical engineering from U.S. Naval Postgraduate School and his Ph.D. in electrical engineering/applied mathematics from Polytechnic University. He w

Changing threat requirements and radical budget shifts imply that Navy operational needs will broaden and engineering solutions will face tougher constraints. Existing and emerging technology promise increased combat capability in smaller packages;space-based assets will allow operator orchestration of widely dispersed naval units via connectivity attributes previously unavailable. Tactical data relay by downlink may permit reallocation of responsibilities among several platforms, space, air, or seaborne, so ships can be outfitted for custom-use (sensing, unique data processing, high-firepower) and optimized to meet specific mission needs. These evolving capabilities demand a fresh look at ship concepts and prospective force structures consistent with global and fiscal realities. Warfighting performance formerly unknown in small ship design may offer a very effective solution to the intricate, interacting issues of falling defense budgets, diverse operational requirements and complex national priorities. Multimission ships which take advantage of new or current technology to reduce ship size, manning and cost could be affordable in sufficient numbers to meet our continuing worldwide obligations, complement our larger ships' force structure, and produce a balanced fleet. These same ships could satisfy U.S. maritime needs beyond the Navy and improve export trade through foreign military sales (FMS).

关键词： Naval Warfare

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An accurate model for ambiguity delay simulation

An accurate model for ambiguity delay simulation

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1990 European design Automation Conference, EDAC 1990

作者： Krodel, Thomas H. Antreich, Kurt J. Institute of Computer Aided Design Department of Electrical Engineering Technical University of Munich MunichD-8000 Germany

ISBN: (纸本)0818620242

This paper presents a new approach for the accurate computation of ambiguously delayed waveforms which is implemented in the event-driven logic simulation system LDSIM. Six logic values are defined to be sets of up to four basic values. The mapping function representing the ambiguity delay model only manipulates these basic values. This principle results in a powerful and versatile ambiguity delay model that is clearly presented, easy to implement and guarantees correct delay computation of arbitrary six-valued waveforms with respect to the concept of superposition and causality. © 1990 IEEE.

关键词： Computation theory

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On automatic testpoint insertion in sequential circuits

On automatic testpoint insertion in sequential circuits

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IEEE International Test Conference

作者： H.H.S. Gundlach K.-D. Muller-Glaser Institute for Computer Aided Circuit Design University Erlangen-Nuünberg Erlangen Germany

A novel tool, called TIP (testpoint insertion program), that serves to improve the testability of a sequential circuit is presented. It automatically identifies locations at which test cells may be inserted is presented. For that purpose first the basic cycles and basic reconvergencies are calculated. Out of these almost all cycles are deduced. The resultant critical paths are broken at a set of locations that are selected by iteratively choosing the one which breaks the most critical paths. Heuristics are given to minimize the number of selected locations, as are ideas about further improvements. The algorithm was tested on sequential benchmarks and compared with a commercially available automatic test pattern generator. Also, the combined test-cell insertion by TIP gives accurate information regarding where to modify a given circuit to achieve a high fault coverage with optimized overhead. The proposed algorithm leads to smaller computational run times and less area overhead.< >

关键词： Circuit testing Automatic testing Sequential analysis Sequential circuits Automatic test pattern generation Feedback loop Circuit faults Runtime Feedback circuits design for testability

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An accurate model for ambiguity delay simulation

An accurate model for ambiguity delay simulation

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European design Automation Conference

作者： T.H. Krodel K.J. Antreich Institute of Computer Aided Design Department of Electrical Engineering Technical University Munich Munich Germany

关键词： Circuit simulation Propagation delay Predictive models Timing Computational modeling Logic design Discrete event simulation Power system modeling Integrated circuit modeling Quantum computing

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Sierpinski Sponge in a Simple Generic DiffeomorphismSierpinski‐type self‐similarity is demonstrated in a generic differentiable system

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computer in Physics 1990年第5期4卷 494-498页

作者： O. E. Rössler M. Klein G. Baier J. Parisi J. Peinke M. Krug J. L. Hudson 1Division of Theoretical Chemistry University of Tübingen 2an experimentalist‐cum‐theoretician in the Institute for Chemical Plant Physiology University of Tübingen 3low‐temperature condensed‐ matter physicists working in nonlinear science at the Physical Institute University of Tüubingen 4computer‐aided drug design at the Pharmaceutical Institute University of Tübingen 5Department of Chemical Engineering University of Virginia at Charlottesville

O. E. Rössler, M. Klein, G. Baier, J. Parisi, J. Peinke, M. Krug, J. L. Hudson; Sierpinski Sponge in a Simple Generic Diffeomorphism: Sierpinski‐type self‐simil

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CAD CAM MANUFACTURING OF PROTOTYPE SHIPBOARD COMPONENTS

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NAVAL ENGINEERS JOURNAL 1990年第3期102卷 93-99页

作者： CALVERT, TE RODRIGUEZ, FA SLEBZAK, JS Thomas E. Calvert P.E.: is a senior project engineer with the Propulsion and Auxiliary Systems Department David Taylor Research Center Annapolis Md. His interests include application of computers to all aspects of engineering with particular emphasis on utilization of small computers. Mr. Calvert is a licensed professional engineer in Maryland. He received a BSEE from Drexel University in 1969 and since that time has completed a number of graduate courses related to machinery acoustics. Francisco A. Rodriguez:is an engineer with the Propulsion and Auxiliary Systems Department David Taylor Research Center. He was formerly with the Computer-Aided Design/Interactive Graphics Group of the Division of Engineering and Weapons U.S. Naval Academy. His interests include interfacing the computer aided design to the computer aided manufacturing along with related software and hardware development. Mr. Rodriguez received a BSEEfrom the University of Virginia in 1968. James S. Slebzak:is a mechanical engineering technician with the Propulsion and Auxiliary Systems Department David Taylor Research Center. He received his machinists papers in 1971 after serving his apprenticeship at David Taylor Research Center. He continued his education and became the senior numerical control programmer at the Annapolis Laboratory. He completed his mechanical technology degree from Anne Arundel Community College in 1986. His interests are in the application of numerically controlled manufacturing techniques to prototype machinery components.

The machine shop at the Annapolis Laboratory of the David Taylor Research Center (DTRC) provides model making and prototype support to a large variety of naval ship related engineering projects. In order to meet these challenging requirements, computer aided design/computer aided manufacturing (CAD/CAM) techniques are being used to produce “one of a kind” prototypes or very low volume production parts. The use of computer aides in these cases is to facilitate the accurate manufacture of a difficult part, rather than to improve manufacturing efficiencies. In addition, the approach provides the flexibility required to support research and development projects. Several examples of prototype shipboard components manufactured using CAD/CAM techniques are presented in this paper. The hardware and software that facilitated these projects are discussed. The examples described have met the requirements to produce a wide variety of prototype shipboard machinery components quickly and accurately.

关键词： Ship Equipment

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THE HYBRID EDGE - A TOPOLOGICAL DATA STRUCTURE FOR VERTICALLY INTEGRATED GEOMETRIC MODELING

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computer-aided design 1989年第3期21卷 130-140页

作者： KALAY, YE Computer-Aided Design and Graphics Laboratory School of Architecture and Environmental Design State University of New York at Buffalo 235 Hayes Hall Buffalo NY 14214 USA

Generalizing the computational geometric support for the representation of designed artefacts over multiple different levels of symbolic abstractions (e.g. sketches, solid modelling, and drafting) is discussed. First, the need for integrating the representation and manipulation of points, lines, polygons, and solids to facilitate design of artefacts at many levels of design abstraction is established. Second, a vertically integrated model that supports the representation and manipulation of points, lines, polygons, and solids without redundancy is presented. The particular roles of the operators and the operands are discussed, along with their hierarchical integration. The utility of the model is demonstrated in performing operations that involve multiple levels of data abstraction, such as splitting solids at a polygon inscribed on their boundary. Finally, a particular implementation of the integrated model is presented. This implementation is based on the hybrid edge, a derivative of Baumgart's winged edge and Eastman's split edge models. The hybrid edge distinguishes between the role of edges as carriers of topological adjacency information and their role as carriers of directionality information. This distinction permits the hybrid edge to handle the different combinations of adjacency and directionality requirements posed by the different abstraction levels in the integrated model.

关键词： geometric modelling data representation hybrid edge

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