Sensitivity based linear learning method (SBLLM) has recently been used as predictive tool due to its unique characteristics and performance, particularly its high stability and consistency during predictions. However...
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The realizability is a well known property for reactive system specification, and it shows that there exists a system which reacts properly against any environment following the specification. In system development pr...
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The realizability is a well known property for reactive system specification, and it shows that there exists a system which reacts properly against any environment following the specification. In system development process, we can reduce reversions if realizability for specification is verified before implementation of system. However, the verification cost is too high to verify the realizability of a real scale system specification. On the other hand, stepwise satisfiability which is a necessary condition for the realizability has been proposed. Its verification cost is less than that of realizability, and verification of the property is useful to find the incompleteness of specification. Even if the verification of stepwise satisfiability, the required cost is too high. In order to overcome this problem, this paper proposes methods of implementing the stepwise satisfiability checker using a distributed object technology on the parallel distributed environment. Then, we implement the stepwise satisfiability checker in Java based on our methods, and confirm the effectiveness of our methods by experiments. In this paper, we present our ideas and methods of the implementations for three parts of our checker. The first is how our checker compose a tableau graph on the parallel distributed environment. The second is the implementation method to determinize the distributed graph. The third is the dead end checking method for the deterministic distributed graph.
The importance of anonymity has increased over the past few years in many applications. Herbivore is a distributed anonymous communication system, providing private file sharing and messaging over the Internet. In thi...
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Scheduling in semiconductor manufacturing system is an important task for the industries faced with a large amount of resource competitions. Effective scheduling can improve the overall system performance and customer...
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Mobile IPv6 provides mobility support for hosts connecting to the Internet, it solves addressable problems of the mobile terminal, and the mobile terminals can obtain network services without changing IP addresses. Bu...
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An approach to aspect-oriented change realization is proposed in this paper. With aspect-oriented programming changes can be treated explicitly and directly at the programming language level. Aspect-oriented change re...
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Many fields of science and engineering, such as astronomy, medical imaging, seismology and spectroscopy, have been revolutionized by Fourier methods. The fast Fourier transform (FFT) is an efficient algorithm to compu...
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Many fields of science and engineering, such as astronomy, medical imaging, seismology and spectroscopy, have been revolutionized by Fourier methods. The fast Fourier transform (FFT) is an efficient algorithm to compute the discrete Fourier transform (DFT) and its inverse. The emerging class of high performance computing architectures, such as GPU, seeks to achieve much higher performance and efficiency by exposing a hierarchy of distinct memories to programmers. However, the complexity of GPU programming poses a significant challenge for programmers. In this paper, based on the Kronecker product form multi-dimensional FFTs, we propose an automatic performance tuning framework for various OpenCL GPUs. Several key techniques of GPU programming on AMD and NVIDIA GPUs are also identified. Our OpenCL FFT library achieves up to 1.5 to 4 times, 1.5 to 40 times and 1.4 times the performance of clAmdFft 1.0 for 1D, 2D and 3D FFT respectively on an AMD GPU, and the overall performance is within 90% of CUFFT 4.0 on two NVIDIA GPUs.
Barrier coverage is an important problem for sensor networks to fulfill some given sensing tasks. Barrier coverage guarantees the detection of events happened crossing a barrier of sensors. In majority study of barrie...
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The Modeling and Analysis of Real-Time Embedded Systems specification (MARTE) provides a set of diagrams with time properties. Nowadays, they are frequently used in the preliminary developing phase of the embedded rea...
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The Modeling and Analysis of Real-Time Embedded Systems specification (MARTE) provides a set of diagrams with time properties. Nowadays, they are frequently used in the preliminary developing phase of the embedded real time system;however, it is not easy to verify the system they have described because few tools can check them directly. This is mainly due to their semi-formal styles and the sequence diagram is no exception. An extended model named TTS4SD (timed transition system for sequence diagram) is advanced for describing the formal semantics of the sequence diagram with time properties which is defined in MARTE. Unlike most of the existing works, the semantics describe its intact behaviors in two aspects: event transitions when the guards are fixed and fragment transitions when the guards are changed from one to another. Moreover, by means of the push/delete instructions on stack, we transform the SD into a TTS4SD with the help of two algorithms which put the semantics from formal aspect to practical application. Then based on the TTS4SD, the sequence diagram is analyzed in a rigid way to eliminate the mistakes arising from the designing stage. An example is running through to describe the above processes.
This paper presents a time Petri net (TPN) model with mixed semantics that efficiently addresses the schedulability analysis problem of the existing semantics models. The proposed model associates each firable transit...
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