Pneumonia is an inflammation of the lungs caused by a bacterial or viral infection. The air bags of the lungs fill with pus when infected with bacteria or viruses. It can affect both lungs or a single. It can also be ...
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The precision of modern commercial off-the-shelf eye trackers has reached a level sufficient for developing gaze-based applications. In many but not all applications, accuracy even allows for replacing a computer mous...
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We, the team UKJ_FSU, propose a deep learning system for the prediction of congenital heart diseases. Our method is able to predict the clinical outcomes (normal, abnormal) of patients as well as to identify heart mur...
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A new approach to cancer care, precision medicine tailors treatments to each patient's specific genetic, molecular, and clinical characteristics. In order to analyze complicated, high-dimensional data and create i...
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More than 200 years ago, early research on human voice radiation showed that speech has directional properties [1, 2]. Since then, many speech directivity studies have investigated several specific aspects, for exampl...
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Optics and photonics have recently captured interest as a platform to accelerate linear matrix processing, otherwise a bottleneck in traditional digital electronics. In this paper we propose an all-photonic computatio...
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Optics and photonics have recently captured interest as a platform to accelerate linear matrix processing, otherwise a bottleneck in traditional digital electronics. In this paper we propose an all-photonic computational accelerator wherein information is encoded in the amplitudes of frequency modes stored in a single ring resonator. Interaction among these modes is enabled by nonlinear optical processes. Both the matrix multiplication and elementwise activation functions on these modes (the artificial neurons) are performed through coherent processes, enabling the direct representation of negative and complex numbers without having to pass through digital electronics, a common limitation in today’s photonic architectures. This design also has a drastically lower hardware footprint compared with today’s electronic and optical accelerators, as the entirety of the matrix multiplication happens in a single multimode resonator on chip. Our architecture is unique in providing a completely unitary, reversible mode of computation, enabling on-chip analog Hamiltonian-echo backpropagation for gradient descent and other self-learning tasks. Moreover, the computational speed increases with the power of the pumps to arbitrarily high rates, as long as the circuitry can sustain the higher optical power. Lastly, the design presented here is a less demanding version of a future room-temperature quantum computational device. Therefore, while this architecture is already viable today, direct reinvestments in it would be enabling its evolution into quantum computational hardware.
This paper is designed to provide a comprehensive overview of the latest developments in fault tolerance methods for cloud computing. Maintaining high availability and reliability of cloud environments requires fault ...
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The Advanced Encryption Standard cryptographic algorithm,named AES,is implemented in cryptographic circuits to ensure high security level to any system which required confidentiality and secure information *** of the ...
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The Advanced Encryption Standard cryptographic algorithm,named AES,is implemented in cryptographic circuits to ensure high security level to any system which required confidentiality and secure information *** of the most effective physical attacks against the hardware implementation of AES is fault attacks which can extract secret *** now,a several AES fault detection schemes against fault injection attacks have been *** this paper,so as to ensure a high level of security against fault injection attacks,a new efficient fault detection scheme based on the AES architecture modification has been *** this reason,the AES 32-bit round is divided into two half rounds and input and pipeline registers are implemented between *** proposed scheme is independent of the procedure the AES is ***,it can be implemented to secure the pipeline and iterative *** evaluate the robustness of the proposed fault detection scheme against fault injection attacks,we conduct a transient and permanent fault attacks and then we determine the fault detection capability;it is about 99.88585%and 99.9069%for transient and permanent faults *** have modeled the AES fault detection scheme using VHDL hardware language and through hardware FPGA *** FPGA results demonstrate that our scheme can efficiently protect the AES hardware implementation against fault *** can be simply implemented with low *** addition,the FPGA implementation performances prove the low area overhead and the high efficiency and working frequency for the proposed AES detection scheme.
Protein nanowires harvested from microbes G. sulfurreducens are a renewable, green electronic material. Electronic devices made from protein nanowires show novel or improved functions in energy harvesting, computing a...
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Developing robust drone detection systems is often constrained by the limited availability of large-scale annotated training data and the high costs associated with real-world data collection. However, leveraging synt...
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