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International Symposium on Intelligence information Processing and Trusted Computing

作者： Li, Shidong Ding, Mingyue Cai, Chao Institute for Information Engineering of Hubei University for Nationalities Enshi Hubei China Institute for Pattern Recognition and Artificial Intelligence National Lab. for Multi-spectral Information Processing Technologies HUST Wuhan China College of Life Science and Technology Image Processing and Intelligent Control Key Laboratory of Education Ministry of China HUST Wuhan China

ISBN: (纸本)9780769541969

Roadmap methods were widely used in route planning fields, both for robots and unmanned aircrafts. Traditional roadmap is constituted by connecting the vertexes of convex obstacle, which is related to the locations of start and goal of route, so the roadmap can not be reused when anyone of start and goal changed. Absence of reusability reduces the efficiency of route planning by using roadmap. A new roadmap constitution method was proposed in this paper, which is build on dividing the 2D configuration space into multi-scale grids and setting nodes of roadmap on grid boundary using Level-Set method, same method was used to construct the map cells of roadmap between any two nodes lays on same grid . The roadmap constituted with new method can be reused when the start or goal was changed;it is efficient for replanning problem. © 2010 IEEE.

关键词： Reusability

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Learning human actions with an adaptive codebook

Learning human actions with an adaptive codebook

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International Conference on Virtual Systems and MultiMedia

作者： Yu Kong Xiaoqin Zhang Weiming Hu Yunde Jia Beijing Laboratory of Intelligent Information Technology School of Computer Science Beijing Institute of Technology Beijing China College of Mathematics & Information Science Wenzhou University Zhejiang China National Laboratory of Pattern Recognition China

Learning a compact and yet discriminative codebook for classifying human actions is a challenging problem. One difficulty lies in that the learning procedure is split into two independent phases (dimension reduction and clustering) and thus results in the loss of discriminative information which clustering requires. Besides, traditional used principal component analysis is not optimized for class separability and may not help to improve data separation. In this paper, we propose a novel optimization framework which unifies dimension reduction and clustering. In contrast to previous methods, our method enables to dynamically select indispensable and crucial dimensions for building a discriminative codebook. We add metric learning before clustering to provide the clustering method with an optimized distance metric. Experimental results show that our approach constructs a highly discriminative codebook and achieves comparable results to other state-of-the-art approaches.

关键词： Humans Principal component analysis Measurement Accuracy Optimization Covariance matrix Kernel

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Skeleton-based fast path planning for UAV

Skeleton-based fast path planning for UAV

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MIPPR 2009 - Remote Sensing and GIS Data Processing and Other Applications: 6th International Symposium on Multispectral Image Processing and pattern recognition

作者： Liu, Xin Zhou, Chengping Ding, Mingyue Cai, Chao Institute for Pattern Recognition and Artificial Intelligence National Lab. for Multi-spectral Information Processing Technologies Huazhong University of Science and Technology Wuhan 430074 China College of Life Science and Technology Image Processing and Intelligent Control Key Laboratory of Education Ministry of China Huazhong University of Science and Technology Wuhan 430074 China

ISBN: (纸本)9780819478092

A new path planning method for UAV in static workspace is presented. The method can find a nearly optimal path in short time which satisfies the UAV kinematic constraints. The method makes use of the skeletons to construct the graph of the planning space considering the configuration of the obstacles and utilizes the graph to find a shortest collision-free path, and a novel technique is utilized to convert the free path into a feasible path. The method can be applied to different applications and easy to be implemented. Experimental results showed that the path planning can be done in a fraction of second on a contemporary workstation (2-3 seconds) under the condition of satisfying the kinematic constraints. © 2009 Copyright SPIE - The International Society for Optical Engineering.

关键词： Motion planning

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A novel path planning method based on path network

A novel path planning method based on path network

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MIPPR 2009 - Medical Imaging, Parallel Processing of Images, and Optimization Techniques: 6th International Symposium on Multispectral Image Processing and pattern recognition

作者： Li, Shidong Ding, Mingyue Cai, Chao Institute for Pattern Recognition and Artificial Intelligence National Lab. for Multi-spectral Information Processing Technologies Huazhong University of Science and Technology Wuhan 430074 China Hubei University for Nationalities Enshi Hubei 445000 China College of Life Science and Technology Image Processing and Intelligent Control Key Laboratory of Education Ministry of China Huazhong University of Science and Technology Wuhan 430074 China

ISBN: (纸本)9780819478085

Traditional path planning methods are too slow to meet the real-time requirement in practical applications. In order to solve this problem, an idea of path net was proposed in this paper. The path planning procedure is divided into two steps: network segment planning and segment assembling. The first step was done with Fast Marching Method, including port selection of segment and network segment planning. Second step, the A* searching method was chosen to select segments for assembling. Experiments demonstrated that our method can obtain an optimal route in a few of seconds after the start and goal are given while several minutes are needed for traditional methods. © 2009 Copyright SPIE - The International Society for Optical Engineering.

关键词： Motion planning

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Path planning using FMM with direction and curvature constrained

Path planning using FMM with direction and curvature constra...

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MIPPR 2009 - Remote Sensing and GIS Data Processing and Other Applications: 6th International Symposium on Multispectral Image Processing and pattern recognition

ISBN: (纸本)9780819478092

It is difficult to meet both direction and curvature constraints for traditional Fast Marching (FM) method in path planning. Based on adjusting the cost function in Eiknoal equation-the control equation for FM, a new model for computing the integrated cost function was presented in this paper. A relationship formula about curvature radius was obtained and three kinds of adjusting strategies were given;two of them were used to modify the route to meet with the requires of turning constraint in this paper. Experiments showed that the improved model can be used to plan the path with FMM for agent such as unmanned aerial vehicle (UAV) or robot, which is limited to pass through the scene matching areas. And our preliminary experiments demonstrated that the strategies are feasible and efficient to obtain path with certain curvature radius. The model can also be used to represent the problem such as an aircraft flying in a flow field. © 2009 Copyright SPIE - The International Society for Optical Engineering.

关键词： Motion planning

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High performance word level sequential and parallel coding methods and architectures for bit plane coding

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Science in China(Series F) 2008年第4期51卷 337-351页

作者： XIONG ChengYi TIAN JinWen LIU Jian College of Electronic Information Engineering South-Central University for Nationalities Wuhan 430074 China Institute of Pattern Recognition & Artificial Intelligence Key Laboratory of Education Ministry for Image Processing and Intelligent Control Huazhong University of Science & Technology Wuhan 430074 China

This paper introduced a novel high performance algorithm and VLSI architectures for achieving bit plane coding （BPC） in word level sequential and parallel mode. The proposed BPC algorithm adopts the techniques of coding pass prediction and parallel ＆ pipeline to reduce the number of accessing memory and to increase the ability of concurrently processing of the system, where all the coefficient bits of a code block could be coded by only one scan. A new parallel bit plane architecture （PA） was proposed to achieve word-level sequential coding. Moreover, an efficient high-speed architecture （HA） was presented to achieve multi-word parallel coding. Compared to the state of the art, the proposed PA could reduce the hardware cost more efficiently, though the throughput retains one coefficient coded per clock. While the proposed HA could perform coding for 4 coefficients belonging to a stripe column at one intra-clock cycle, so that coding for an NxN code-block could be completed in approximate N2/4 intra-clock cycles. Theoretical analysis and experimental results demonstrate that the proposed designs have high throughput rate with good performance in terms of speedup to cost, which can be good alternatives for low power applications.

关键词： bit plane coding high performance word-level sequential multi-word parallel

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Boosting discriminative model for moving cast shadow detection

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Jisuanji Xuebao/Chinese Journal of Computers 2007年第8期30卷 1295-1301页

作者： Zha, Yu-Fei Chu, Ying Wang, Xun Ma, Shi-Ping Bi, Du-Yan Signal and Information Processing Laboratory Engineering College Air Force Engineering University Xi'an 710038 China Key Laboratory for Image Processing and Intelligent Control Institute of Pattern Recognition and Artificial Intelligence Huazhong Univ. of Sci. and Technol. Wuhan 430074 China

Moving cast shadow causes serious problem while segmenting and extracting foreground from image sequences, due to the misclassification of moving shadow as foreground. This paper proposes a Boosting discriminative model to eliminate cast shadow on Discriminative Random Fields (DRFs). The method combines different features for Boosting to discriminate cast shadow from moving objects, then temporal and spatial coherence of shadow and foreground are incorporated on Discriminative Random Fields and the problem can be solved by graph cut. Firstly, moving objects are obtained by background subtraction;secondly, shadow candidates can be derived through pre-processing moving objects, in terms of the shadow physical property;thirdly, color information and texture information is derived by comparing shadow and foreground points in current image with corresponding points in background image, which are selected as features for Boosting;finally, temporal and spatial coherence of shadow and foreground is employed on Discriminative Random Fields and discriminate shadow and foreground by graph cut accurately.

关键词： Image processing

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Efficient VLSI architecture for multi-dimensional discrete wavelet transform

Efficient VLSI architecture for multi-dimensional discrete w...

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MIPPR 2005: SAR and Multispectral Image Processing

作者： Xiong, Cheng-Yi Tian, Jin-Wen Liu, Jian College of Electronic Information Engineering South-Center University for Nationalities Wuhan 430074 China Institute of Pattern Recognition and Artificial Intelligence Key Laboratory of Education Ministry for Image Processing and Intelligent Control Huazhong University of Science and Technology Wuhan 430074 China

Efficient VLSI architectures for multi-dimensional (m-D) discrete wavelet transform (DWT), e.g. m=2, 3, are presented, in which the lifting scheme of DWT is used to reduce efficiently hardware complexity. The parallelism of 2 m subbands transforms in lifting-based m-D DWT is explored, which increases efficiently the throughput rate of separable m-D DWT. The proposed architecture is composed of m2m-1 1-D DWT modules working in parallel and pipelined, which is designed to process 2m input samples per clock cycle, and generate 2m subbands coefficients synchronously. The total time of computing one level of decomposition for a 2-D image (3-D image sequence) of size N2 (MN2) is approximately N2/4 (MN2/8) intra- clock cycles (ccs). An efficient line-based architecture framework for both 2D+t and t+2D 3-D DWT is first proposed. Compared with the similar works reported in previous literature, the proposed architecture has good performance in terms of production of computation time and hardware cost. The proposed architecture is simple, regular, scalable and well suited for VLSI implementation.

关键词： VLSI circuits

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An improved mapping method of buffer for line-based architecture of 2-D DWT

An improved mapping method of buffer for line-based architec...

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International Conference on Communications, Circuits and Systems (ICCCAS)

作者： Cheng-Yi Xiong Cheng-Jun Wang Jin-wen Tian Jian Liu Institute of Pattern Recognition & Artificial Intelligence Key Laboratory of Education Ministry for Image Processing and Intelligent Control Huazhong University of Science and Technology Wuhan China College of Electronic Information Engineering South-Center University for Nationalities Wuhan China

ISBN: (纸本)0780390156

The number of arithmetic units used in the one-dimensional (1D) discrete wavelet transform (DWT) is the main consideration for reducing the area of VLSI implementation of 1D DWT, while the size of intermediate memory used for data buffering is another dominate factor of effecting hardware complexity of VLSI implementation for two-dimensional (2D) DWT. In this paper, we exploit the essential relationship between the size of temporal buffer (TB) required in the line-based architecture for 2D DWT (LBA2DDWT) and the number of registers used in the 1D DWT module, and present an improved method of mapping the registers used in the 1D DWT to the TB required in LBA2DDWT. Comparison results with the other design reported in previous literature demonstrate that, the proposed mapping method can reduce efficiently the size of memory required in LBA2DDWT.

关键词： Discrete wavelet transforms Registers Two dimensional displays Very large scale integration Hardware Convolution Pipeline processing Arithmetic Signal analysis Image processing

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A fast VLSI architecture for two-dimensional discrete wavelet transform based on lifting scheme

A fast VLSI architecture for two-dimensional discrete wavele...

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2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004

作者： Xiong, Chengyi Tian, Jinwen Liu, Jian Institute of Pattern Recognition and Artificial Intelligence Key Laboratory of Eduaction Ministry for Image Processing and Intelligent Control Huazhong University of Science and Technology Wuhan 430074 China College of Electronic Information Engineering South-Center University for Nationalities Wuhan 430074 China

This paper proposes a novel fast architecture for two-dimensional discrete wavelet transform by using lifting scheme. The parallel and embedded decimation techniques are employed to optimize the architecture, which is mainly composed of two horizontal filter modules and one vertical filter module, working in parallel and pipeline fashion with 100% hardware utilization. The architecture is designed to generate two outputs at one working clock cycle, with every two subbands coefficients alternately. The total time of computing J levels of decomposition for N×N image is approximately 2N2(I-4 J)/3 clock cycles. In comparison with the other devices reported in previous literature, the design has many advantages including lower hardware complexity and area and power efficient. The design is also fast, regular and simple, as well as well suited for VLSI implementation. © 2004 IEEE.

关键词： VLSI circuits

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