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IEEE International memory Workshop (IMW)

作者： Noboru Shibata Hironori Uchikawa Taira Shibuya Hirofumi Inoue Institute of Memory Technology Research & Development Kioxia Corporation Japan Memory Div. Kioxia Corporation Japan Memory Development Strategy Div. Kioxia Corporation Japan

ISBN: (数字)9798350306521

ISBN: (纸本)9798350306538

This study introduces a novel multi-level coding and architecture designed to enhance random access time in multi-level flash memory. By employing a strategy of sharing and storing multi-level data across multiple memory cells, we address the challenge of increased read cycles typically associated with multi-level data. This architecture, which does not require new processes or materials, achieves one-cycle reading in MLC, equating its random access time with that of SLC, and ensures rapid random access in TLC.

关键词： Conferences Encoding Flash memories

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A 40 nm gate length surrounding gate vertical-channel fet using thermally stable in-al-zn-o channel for 3d cmos-lsi applications 58th

A 40 nm gate length surrounding gate vertical-channel fet us...

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58th International Symposium on Digest of Technical Papers, ICDT 2021

作者： Sato, Yuta Fujiwara, Hirokazu Saito, Nobuyoshi Ueda, Tomomasa Ikeda, Keiji Institute of Memory Technology Research & Development Kioxia Corporation

We have developed a CMOS back-end-of-line (BEOL) process compatible oxide semiconductor channel FET with newly proposed In-Al-Zn-O (IAZO) for 3D CMOS-LSI applications. Compared with In-Ga-Zn-O for active-matrix display applications, IAZO channel has higher thermal stability (~420oC) suitable for BEOL transistors where suppression of channel shortening is essential. We have successfully demonstrated a surrounding gate vertical-channel FET with gate length of 40 nm by IAZO channel. © 2021 SID.

关键词： Oxide semiconductors

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Maternal sleep deprivation induces gut microbial dysbiosis and neuroinflammation in offspring rats

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Zoological research 2022年第3期43卷 380-390页

作者： Zheng-Yu Yao Xiao-Huan Li Li Zuo Qian Xiong Wen-Ting He Dong-Xu Li Zhi-Fang Dong Pediatric Research Institute Ministry of Education Key Laboratory of Child Development and DisordersNational Clinical Research Center for Child Health and DisordersChina International Science and Technology Cooperation Base of Child Development and Critical DisordersChongqing Key Laboratory of Translational Medical Research in Cognitive Development and Learning and Memory DisordersChildren’s Hospital of Chongqing Medical UniversityChongqing 400014China

Maternal sleep deprivation(MSD)is a global public health problem that affects the physical and mental development of pregnant women and their *** latest research suggests that sleep deprivation(SD)disrupts the gut microbiota,leading to neuroinflammation and psychological ***,it is unclear whether MSD affects the establishment of gut microbiota and neuroinflammation in the *** the present study,MSD was performed on pregnant SpragueDawley rats in the third trimester of pregnancy(gestational days 15-21),after which intestinal contents and brain tissues were collected from offspring at different postnatal days(P1,P7,P14,and P56).Based on microbial profiling,microbial diversity and richness increased in pregnant rats subjected to MSD,as reflected by the significant increase in the phylum *** addition,microbial dysbiosis marked by abundant Firmicutes bacteria was observed in the MSD ***,quantitative real-time polymerase chain reaction(q RT-PCR)and enzyme-linked immunosorbent assay(ELISA)showed that the expression levels of proinflammatory cytokines interleukin 1β(IL-1β)and tumor necrosis factorα(TNF-α)were significantly higher in the MSD offspring at adulthood(P56)than in the control *** Spearman correlation analysis,IL-1βand TNF-αwere also shown to be positively correlated with Ruminococcus_1 and Ruminococcaceae_UCG-005 at P56,which may determine the microbiota-host interactions in MSDrelated ***,these results indicate that MSD changes maternal gut microbiota and affects the establishment of neonatal gut microbiota,leading to neuroinflammation in MSD ***,understanding the role of gut microbiota during physiological development may provide potential interventions for cognitive dysfunction in MSD-impacted offspring.

关键词： Maternal sleep deprivation Gut microbiota Neuroinflammation Gut-brain axis Cognitive function Firmicutes

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Demonstration of Recovery Annealing on 7-Bits per Cell 3D Flash memory at Cryogenic Operation for Bit Cost Scalability and Sustainability

Demonstration of Recovery Annealing on 7-Bits per Cell 3D Fl...

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Symposium on VLSI technology

作者： Yuta Aiba Yusuke Higashi Hitomi Tanaka Hiroki Tanaka Fumie Kikushima Toshio Fujisawa Hideko Mukaida Masayuki Miura Tomoya Sanuki Institute of Memory Technology Research & Development Japan Memory Div. Kioxia Corporation Japan

This report is the first to demonstrate cryogenic 3D flash memory of 7-bits per cell with the recovery annealing applied repeatedly. We combined 77 K cryogenic operation and epi-Si channel to improve the data retention, read noise, and program noise, and their degradation caused by Program/Erase (P/E) cycles. We further applied $200 ^{\circ}\mathrm{C}$ annealing which recovers performance degradations under appropriate cell Vth conditions. Reliable 7-bits per cell operation can maintain performance and energy efficiency competitive to current QLC and NL-HDD technologies. Co-optimization of process technology, memory operation, and cooling system is a promising solution for future sustainable bit cost scaling.

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Correcting on-chip distortion of control pulses with silicon spin qubits

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Chinese Physics B 2025年第1期34卷 265-271页

作者： Ming Ni Rong-Long Ma Zhen-Zhen Kong Ning Chu Wei-Zhu Liao Sheng-Kai Zhu Chu Wang Gang Luo Di Liu Gang Cao Gui-Lei Wang Hai-Ou Li Guo-Ping Guo CAS Key Laboratory of Quantum Information University of Science and Technology of China(USTC)Hefei 230026China CAS Center for Excellence in Quantum Information and Quantum Physics University of Science and Technology of ChinaHefei 230026China Integrated Circuit Advanced Process Research and Development Center Institute of MicroelectronicsChinese Academy of Sciences(CAS)Beijing 100029China Hefei National Laboratory Hefei 230088China Beijing Superstring Academy of Memory Technology Beijing 100176China Origin Quantum Computing Company Limited Hefei 230026China

In semiconductor quantum dot systems,pulse distortion is a significant source of coherent errors,which impedes qubit characterization and ***,we demonstrate two calibration methods using a two-qubit system as the detector to correct distortion and calibrate the transfer function of the control *** methods are straightforward to implement,robust against noise,and applicable to a wide range of qubit *** two methods differ in correction accuracy and *** first,coarse predistortion(CPD)method,partially mitigates *** second,all predistortion(APD)method,measures the transfer function and significantly enhances exchange oscillation *** methods use exchange oscillation homogeneity as the metric and are suitable for any qubit driven by a diabatic *** believe these methods will enhance qubit characterization accuracy and operation quality in future applications.

关键词： quantum computation quantum dot pulse distortion

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Atomic Layer Deposition of Perpendicularly Magnetized Co Layers Showing Current-induced Domain Wall Motion

Atomic Layer Deposition of Perpendicularly Magnetized Co Lay...

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Magnetic Conference - Short Papers (INTERMAG Short Papers), IEEE International

作者： Masaki Kado Yoshinori Tokuda Yasuaki Ootera Nobuyuki Umetsu Michael Quinsat Hiroyuki Fukumizu Tsuyoshi Kondo Kioxia Corporation Institute of Memory Technology Research and Development Yokohama Japan

Successful preparation of perpendicularly magnetized Co thin layers on Pt seed-layers using atomic layer deposition (ALD) technique with Co(PF 3 ) 4 H as a precursor is reported. The residual phosphorus content in the samples, due to low deposition temperatures to realize ALD, was reduced effectively by tuning ALD parameters. Spin-orbit-torque driven current-induced domain wall motion was observed in the strip containing ALD Co layer prepared with the low phosphorus condition.

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Overcome the End of Life of 3D Flash memory by Recovery Annealing, Aiming for Carbon Neutrality in Semiconductor Manufacturing

Overcome the End of Life of 3D Flash Memory by Recovery Anne...

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IEEE International memory Workshop (IMW)

作者： Hitomi Tanaka Hajime Sano Reika Ichihara Yuta Aiba Kazuma Hasegawa Kana Kudo Chieko Tokunaga Yasuhito Yoshimizu Fumie Kikushima Tomoya Sanuki Institute of Memory Technology Research & Development Memory Div. Kioxia Corporation Japan Sustainability Div. Kioxia Corporation Japan

ISBN: (数字)9798350306521

ISBN: (纸本)9798350306538

In this work, we report a novel approach using thermal annealing to recover the degradation of cell characteristics due to program/erase (P/E) cycling in 3D flash memory. To achieve an effective recovery, the threshold voltage (Vth) of the cell during thermal annealing should be close to the neutral Vth level, at which defects in the tunnel dielectric layer (TNL) generated by P/E cycling are electrically empty. Optimized annealing temperatures and times, specifically 3 hours (h) at 200 °C or 7 h at 150 °C, effectively recover the degradation of the cell characteristics caused by 10k P/E cycling. Furthermore, the recovery effect of annealing is valid even after repeating 10k P/E cycling and recovery annealing at least 5 times. Optimized recovery annealing can achieve reuse of 3D flash memory that have reached their end-of-life (EOL), contributing to sustainability by reducing CO2 emissions during product manufacturing.

关键词： Degradation Annealing Three-dimensional displays memory management Carbon neutral Semiconductor device manufacture Threshold voltage

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Ultra-High Endurance (>1012) and High Drive-Current Selector in Sub-30nmΦ Cell using Stable Oxide Doped with As-Se Free High Melting-Point Compound

Ultra-High Endurance (>1012) and High Drive-Current Selector...

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IEEE Electron Devices technology and Manufacturing Conference (EDTM)

作者： Yosuke Matsushima Takeshi Iwasaki Tadaomi Daibou Takayuki Sasaki Yutaro Shimoda Zhu Qi Masakazu Goto Yuya Sato Makoto Onizaki Makoto Nagamine Minoru Amano Hiroki Kawai Hiroki Tokuhira Kenta Chokawa Rina Takashima Takayuki Tsukagoshi Masumi Saitoh Keiji Ikeda Katsuyoshi Komatsu Institute of Memory Technology Research & Development Kioxia Corporation 800 Yamanoisshiki-Cho Yokkaichi Mie Japan

We demonstrate ultra-high endurance selector with excellent scalability toward high-performance cross-point storage class memory (SCM). By employing stable oxide doped with high melting-point $\left(T_{\mathrm{m}}\right)$ compound as a selector, atomic diffusion during cycling is strongly suppressed even for small cell (sub-30nm$\phi$) and high drive current, which is confirmed by thermal TCAD and ab initio calculations. The fabricated sub-30nm$\phi$ pillar As-Se free selector achieves 10 12 cycles, low half-selected current (~4nA) and high drive current density (~15MA/cm 2 ).

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Multiple SiGe/Si layers epitaxy and SiGe selective etching for vertically stacked DRAM

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Journal of Semiconductors 2023年第12期44卷 133-140页

作者： Zhenzhen Kong Hongxiao Lin Hailing Wang Yanpeng Song Junjie Li Xiaomeng Liu Anyan Du Yuanhao Miao Yiwen Zhang Yuhui Ren Chen Li Jiahan Yu Jinbiao Liu Jingxiong Liu Qinzhu Zhang Jianfeng Gao Huihui Li Xiangsheng Wang Junfeng Li Henry HRadamson Chao Zhao Tianchun Ye Guilei Wang Key Laboratory of Microelectronics Devices&Integrated Technology Institute of MicroelectronicsChinese Academy of SciencesBeijing 100029China Beijing Superstring Academy of Memory Technology Beijing 100176China Research and Development Center of Optoelectronic Hybrid IC Guangdong Greater Bay Area Institute of Integrated Circuit and SystemGuangzhou 510535China Microelectronics Institute University of Chinese Academy of SciencesBeijing 100049China Hefei National Laboratory Hefei 230088China

Fifteen periods of Si/Si_(0.7)Ge_(0.3)multilayers(MLs)with various Si Ge thicknesses are grown on a 200 mm Si substrate using reduced pressure chemical vapor deposition(RPCVD).Several methods were utilized to characterize and analyze the ML *** high resolution transmission electron microscopy(HRTEM)results show that the ML structure with 20 nm Si_(0.7)Ge_(0.3)features the best crystal quality and no defects are *** Si_(0.7)Ge_(0.3)ML structures etched by three different methods were carried out and compared,and the results show that they have different selectivities and *** this work,the fabrication process influences on Si/Si Ge MLs are studied and there are no significant effects on the Si layers,which are the channels in lateral gate all around field effect transistor(L-GAAFET)*** vertically-stacked dynamic random access memory(VS-DRAM),it is necessary to consider the dislocation caused by strain accumulation and stress release after the number of stacked layers exceeds the critical *** results pave the way for the manufacture of high-performance multivertical-stacked Si nanowires,nanosheet L-GAAFETs,and DRAM devices.

关键词： RPCVD epitaxy SiGe/Si multilayers L-GAAFETs VS-DRAM

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7-Bit/2Cell (X3.5), 9-Bit/2Cell (X4.5) NAND Flash memory: Half Bit technology

7-Bit/2Cell (X3.5), 9-Bit/2Cell (X4.5) NAND Flash Memory: Ha...

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IEEE International memory Workshop (IMW)

作者： Noboru Shibata Hironori Uchikawa Taira Shibuya Kenri Nakai Kosuke Yanagidaira Hirofumi Inoue Kioxia Corporation Institute of Memory Technology Research & Development Japan Memory Div Kioxia Corporation Japan Memory Development Strategy Div Kioxia Corporation Japan

In this work, a 3. 5bit/cell (X3.5) flash memory is introduced to achieve a lower giga-byte cost with high reliability and performance. Accordingly, 7-bit data are stored in two memory cells with 12-level Vth distributions. The X3.5 Programming method does not require the complex approach used in QLC and can easily be handled by NAND controller. QLC needs a more powerful ECC than TLC; hence, increasing the size of the ECC parity for QLC enlarges the die size. However, the same ECC parity size as TLC can be applicable to X3.5. An X3.5 die size with a TLC ECC is only 6.3% bigger than QLC. By contrast, X3.5 Program performance is 2.3 times faster than QLC with the QLC reliability criteria, which is relaxed from the TLC reliability criteria. If the size of the ECC parity is reduced to that of 32nmMLC, X3.5 die size will be close to that of QLC, while X3.5 Program performance will be 1.6 times faster than that of QLC. Moreover, X3.5 will meet the TLC reliability criteria. In addition to expanding X3.5 technologies, 4.5 bit/cell (X4.5) with a 24-level Vth distributions is also possible, which is suitable for cold storage applications.

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