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International Conference on Solid-State and Integrated Circuit Technology

作者： Ming Li Jiewen Fan Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

In this paper, self-heating model of SNWT is studied. For the first time, the excellent heat dissipation per channel width for SNWT is disclosed. The special 2D heat dissipation mode is believed to be the reason. Accordingly, a novel SNWT was proposed to improve the ESD robustness of gate-grounded SNWT with removal of buried oxide under gate. Experiments show the record failure current density of 18.8mA/μm with 5nm diameter. Provided highly uniform nanowire array fabrication capability, SNWT can also achieve high total failure current and ESD voltage.

关键词： Electrostatic discharges Logic gates Thermal resistance Heating systems Performance evaluation Robustness

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Low Voltage Dual-Modulus Frequency Divider Based on Extended True Single-Phase Clock Logic

Low Voltage Dual-Modulus Frequency Divider Based on Extended...

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IEEE Conference on Electron devices and Solid-State circuits

作者： Wanlu Wang Song Jia Ziyi Wang Tao Pan Yuan Wang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781538662359

Two low voltage dual-modulus frequency divider based on extended true single-phase clock (E-TSPC) logic are proposed. By reducing the number of serial transistors from VDD to GND, the proposed designs can effectively work at low voltage. Simulation results in SMIC 40nm technology show that the presented design I has better power and speed performance with lower supply voltage. Compared to the referenced designs, the presented design II can work at the lowest supply voltage with little loss of performance.

关键词： Low voltage Transistors Power demand Clocks Frequency conversion Robustness CMOS technology

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Nonvolatile memristor as a new platform for non-von Neumann computing

Nonvolatile memristor as a new platform for non-von Neumann ...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Liying Xu Lin Bao Teng Zhang Ke Yang Yimao Cai Yuchao Yang Ru Huang Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China

Nonvolatile logic based on memristors provides a promising approach toward efficient Non-von Neumann computing. Here we propose a methodology employing hybrid bipolar-unipolar memristive circuits for efficient in-memory logic functions. By combining the features of bipolar and unipolar memristors, the proposed circuits are able to execute both fundamental Boolean logic and arithmetic computing with high reconfigurability and high parallelism, which compares favorably with existing methods of in-memory logic based on memristors. This work could thus pave the way for the development of new in-memory computing architecture with high efficiency.

关键词： Memristors Adders Logic arrays Logic functions Logic gates Nonvolatile memory Parity check codes

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Switching Dynamics and Computing Applications of Memristors:An Overview 12

Switching Dynamics and Computing Applications of Memristors:...

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2017 IEEE 12th International Conference on ASIC

作者： Qingxi Duan Teng Zhang Minghui Yin Caidie Cheng Liying Xu Yuchao Yang Ru Huang Key Laboratory of Microelectronic Devices and Circuits(MOE) Institute of MicroelectronicsPeking University

ISBN: (纸本)9781509066261;9781509066254

Memristors have acquired a lot of attention due to their potential applications in nonvolatile memory,reconfigurable logic,analog circuits and neuromorphic computing etc.,and important progress has been made *** we first shed light on the switching dynamics of oxide based memristors by electrostatic force microscopy(EFM).We further demonstrate a new type of vertical 3-terminal oxide based memristive device capable of implementing heterosynaptic *** address the long-standing issue of device variations in memristors limiting the construction of neuromorphic computing systems,we propose a fuzzy restricted Boltzmann machine(FRBM) network that can effectively tolerate device ***,we show that nonvolatile Boolean logic can also be achieved in the same 3-terminal heterosynaptic devices in an efficient manner,compared with conventional 2-terminal memristors.

关键词： memristors switching dynamics neuromorphic computing nonvolatile logic fuzzy restricted Boltzmann machine(FRBM) network

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A Physical Current Model for Self-Depleted T-gate Schottky Barrier Tunneling FET with Low SS and High ION/IOFF

A Physical Current Model for Self-Depleted T-gate Schottky B...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Jin Luo Zhu Lv Qian-Qian Huang Cheng Chen Ru Huang Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China

Compared with conventional tunneling field-effect transistor (TFET), the novel T-gate Schottky barrier TFET (TSB-TFET) with adaptive operation mechanism can effectively achieve higher I ON with dominant Schottky current, lower I OFF by introducing self-depleted effect and steep subthreshold slope with dominant band-to-band tunneling current. To facilitate the circuit simulation based on this new kind of device, in this paper, we establish a physical current model of TSB-TFET through modeling its modulated band-to-band tunneling and Schottky barrier injection current respectively. The current model results with different device parameters agree well with Sentaurus TCAD simulation results, showing its high applicability for further circuit design and simulation.

关键词： Junctions Schottky barriers Tunneling TFETs Logic gates Integrated circuit modeling Fingers

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Current Mirrors Based on Graphene Field-effect Transistors

Current Mirrors Based on Graphene Field-effect Transistors

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International Conference on Solid-State and Integrated Circuit Technology

作者： Pei Peng Zhongzhen Tian Muchan Li Zidong Wang Liming Reng Yunyi Fu Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China

Current mirrors are significant elements in analog integrated circuits. Here, graphene-based field-effect transistors (GFETs) are fabricated and the parameters of device model for the fabricated GFETs are extracted from the measured I-V characteristics. The GFETs model was then coded with Verilog-A language for circuit simulation. Using simulation, we investigate the electrical properties of GFETs-based current mirrors. We found that in simple current mirror configuration, the output current is intensively dependent on the output voltage, and cannot track the reference current well. However, in GFETs-based cascode current mirror configuration, the output current can track the reference current in a proper range of output voltage, indicating the GFETs can implement cascode current mirrors. Furthermore, the GFETs-based cascode current mirror working as a load can efficiently improve the voltage gain of the GFETs-based amplifiers when compared to a resistor load.

关键词： Mirrors Graphene Integrated circuit modeling Logic gates Resistors Analytical models Current measurement

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Publisher Correction: Ferroelectric-defined reconfigurable homojunctions for in-memory sensing and computing

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Nature materials 2023年第11期22卷 1430页

作者： Guangjian Wu Xumeng Zhang Guangdi Feng Jingli Wang Keji Zhou Jinhua Zeng Danian Dong Fangduo Zhu Chenkai Yang Xiaoming Zhao Danni Gong Mengru Zhang Bobo Tian Chungang Duan Qi Liu Jianlu Wang Junhao Chu Ming Liu State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai China. Shanghai Qi Zhi Institute Xuhui District Shanghai China. Zhangjiang Fudan International Innovation Center Fudan University Shanghai China. Key Laboratory of Polar Materials and Devices (MOE) Ministry of Education Shanghai Center of Brain-inspired Intelligent Materials and Devices Department of Electronics East China Normal University Shanghai China. State Key Laboratory of Infrared Physics Shanghai Institute of Technical Physics Chinese Academy of Sciences Shanghai China. Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing China. Key Laboratory of Polar Materials and Devices (MOE) Ministry of Education Shanghai Center of Brain-inspired Intelligent Materials and Devices Department of Electronics East China Normal University Shanghai China. bbtian@***. State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai China. qi_liu@***. Shanghai Qi Zhi Institute Xuhui District Shanghai China. qi_liu@***. Zhangjiang Fudan International Innovation Center Fudan University Shanghai China. qi_liu@***. State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai China. jianluwang@***. Shanghai Qi Zhi Institute Xuhui District Shanghai China. jianluwang@***. Zhangjiang Fudan International Innovation Center Fudan University Shanghai China. jianluwang@***. Institute of Optoelectronics Shanghai Frontier Base of Intelligent Optoelectronics and Perception Fudan University Shanghai China. jianluwang@***. Institute of Optoelectronics Shanghai Frontier Base of Intelligent Optoelectronics and Perception Fudan University Shanghai China.

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Crystallization Process of Superlattice-Like Sb/SiO_2 Thin Films for Phase Change Memory Application

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Chinese Physics Letters 2018年第5期35卷 99-103页

作者： Xiao-Qin Zhu Rui Zhang Yi-Feng Hu Tian-Shu Lai Jian-Hao Zhang Hua Zou Zhi-Tang Song School of Mathematics and Physics Jiangsu University of TechnologyChangzhou 213001 State Key Laboratory of Optoelectronic Materials and Technologies School of PhysicsSun Yat-Sen UniversityCuangzhou 510275 State Key Laboratory of Silicon Materials Zhejiang UniversityHangzhou 310027 Key Laboratory of Microelectronic Devices ＆ Integrated Technology Institute of MicroelectronicsChinese Academy of SciencesBeijing 100029 State Key Laboratory of Fhnctional Materials for informatics Shanghai Institute of Micro-System and Information TechnologyChinese Academy of SciencesShanghai 200050

After compositing with SiO_2 layers, it is shown that superlattice-like Sb/SiO_2 thin films have higher crystallization temperature（~240°C）, larger crystallization activation energy（6.22 e V）, and better data retention ability（189°C for 10 y）. The crystallization of Sb in superlattice-like Sb/SiO_2 thin films is restrained by the multilayer interfaces. The reversible resistance transition can be achieved by an electric pulse as short as 8 ns for the Sb（3 nm）/SiO_2（7 nm）-based phase change memory cell. A lower operation power consumption of 0.09 m W and a good endurance of 3.0 × 10~6 cycles are achieved. In addition, the superlattice-like Sb（3 nm）/SiO_2（7 nm） thin film shows a low thermal conductivity of 0.13 W/（m·K）.

关键词： Sb Crystallization Process of Superlattice-Like Sb/SiO2 Thin Films for Phase Change Memory Application SiO

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Insight into multiple-triggering effect in DTSCRs for ESD protection

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Journal of Semiconductors 2017年第7期38卷 93-96页

作者： Lizhong Zhang Yuan Wang Yize Wang Yandong He Key Laboratory of Microelectronic Devices and Circuits (MoE) Institute of Microelectronics Peking UniversityBeijing 100871 China

The diode-triggered silicon-controlled rectifier（DTSCR） is widely used for electrostatic discharge（ESD） protection in advanced CMOS process owing to its advantages, such as design simplification, adjustable trigger/holding voltage, low parasitic capacitance. However, the multiple-triggering effect in the typical DTSCR device may cause undesirable larger overall trigger voltage, which results in a reduced ESD safe margin. In previous research, the major cause is attributed to the higher current level required in the intrinsic SCR. The related discussions indicate that it seems to result from the current division rule between the intrinsic and parasitic SCR formed in the triggering process. In this letter, inserting a large space into the trigger diodes is proposed to get a deeper insight into this issue. The triggering current is observed to be regularly reduced along with the increased space, which confirms that the current division is determined by the parasitic resistance distributed between the intrinsic and parasitic SCR paths. The theoretical analysis is well confirmed by device simulation and transmission line pulse（TLP） test results. The reduced overall trigger voltage is achieved in the modified DTSCR structures due to the comprehensive result of the parasitic resistance vs triggering current, which indicates a minimized multipletriggering effect.

关键词： electrostatic discharge（ESD） diode-triggered silicon-controlled rectifier（DTSCR） double snapback transmission line pulse（TLP） test

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Detecting thickness of accumulation layer in a-IGZO thin film transistors by Kelvin probe force microscopy 25

Detecting thickness of accumulation layer in a-IGZO thin fil...

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25th International Display Workshops, IDW 2018

作者： Shi, Xuewen Lu, Congyan Geng, Di Lu, Nianduan Wang, Jiawei Li, Ling Liu, Ming Key Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics of Chinese Academy of Sciences Beijing100029 China University of Chinese Academy of Sciences Beijing100049 China

ISBN: (纸本)9781510883918

The thickness of accumulated layer (Tacc) in a-IGZO thin film transistors was measured by Kelvin Probe Force Microscopy. The results demonstrated that: I) in subthreshold region, Tacc almost kept constant, II) after subthreshold region, Tacc firstly increased precipitously and finally reached a saturation value almost 15nm. © 2018 International Display Workshops. All rights reserved.

关键词： Thin film transistors

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