Ultra-thick and ultra-thin Silicon PIN detectors are specially applied in high particles detections. The corresponding leakage current is investigated. The ultra-thick and ultra-thin gated diodes structures based on h...
详细信息
ISBN:
(纸本)9781467397209
Ultra-thick and ultra-thin Silicon PIN detectors are specially applied in high particles detections. The corresponding leakage current is investigated. The ultra-thick and ultra-thin gated diodes structures based on high resistivity silicon substrates are fabricated and tested to analyses the reverse leakage current for silicon PIN detectors application. It is concluded that the contribution of the generation current in the main junction depletion region is more significant in the ultra-thick structures, while the contribution of the generation current generated at the silicon-oxide interface is more evident in the ultra-thin structures.
The analysis of self-heating effect in a SOI LDMOS device under an ESD stress is presented in this paper. TCAD tools are used as the platform to explore the physical process of the bulk LDMOS device and the influence ...
详细信息
ISBN:
(纸本)9781467397209
The analysis of self-heating effect in a SOI LDMOS device under an ESD stress is presented in this paper. TCAD tools are used as the platform to explore the physical process of the bulk LDMOS device and the influence of buried oxide layer inserted in the substrate. Simulation results uncover that the buried oxide layer degrades the current-handling ability and changes the lattice temperature distribution of the LDMOS device, which makes the low ESD robustness of the SOI LDMOS device.
In this paper, a novel capacitor self-calibration technique is presented, which can be used in high resolution ADCs, such as SAR ADC and pipeline ADC. The capacitors achieve self-calibration through the adjusting capa...
详细信息
ISBN:
(纸本)9781467397209
In this paper, a novel capacitor self-calibration technique is presented, which can be used in high resolution ADCs, such as SAR ADC and pipeline ADC. The capacitors achieve self-calibration through the adjusting capacitors array and successive approximation(SAR) logic. A 14-bit SAR ADC using capacitor selfcalibration technique we proposed has been designed. The simulation result shows that the SNDR/SFDR has been improved from 63.80 d B/67.89 d B to 78.55 d B/92.36 dB, respectively, using the proposed capacitor self-calibration technique.
This paper presents a novel integrated Schottky barrier diode temperature sensor in a 4H-SiC power MOSFET. Dual electrical isolation and additional current path are applied to this temperature sensor, allowing the sen...
详细信息
This paper presents a novel integrated Schottky barrier diode temperature sensor in a 4H-SiC power MOSFET. Dual electrical isolation and additional current path are applied to this temperature sensor, allowing the sensor to work properly in any operating state of power MOSFET. Due to the sufficient electrical isolation, the crosstalk between sensor and power MOSFET is almost eliminated. Furthermore, high sensitivity S=1.21mV/K is observed for a constant bias current of I d =1mA. The temperature sensor exhibits a good degree of linearity with a root mean square error R 2 =0.99996.
A new reliable Electrostatic Discharge(ESD) power-rail clamp circuit has been proposed in this paper. The new circuit structure has achieved good results in reducing leakage current, anti-false triggering, increasing ...
详细信息
ISBN:
(纸本)9781467397209
A new reliable Electrostatic Discharge(ESD) power-rail clamp circuit has been proposed in this paper. The new circuit structure has achieved good results in reducing leakage current, anti-false triggering, increasing discharge transistor's turn on time. During the ESD event, the proposed circuit has a discharge time of 755.22 ns, which is about 6.74 times that of conventional R-C power-rail clamp circuit. Besides, the leakage current of whole circuit eventually stabilizes at a lower level of 46.50 nA.
This paper proposes a current-mode bandgap referenc which employs a novel "coarse" voltage replication to offset the 2nd-order curvature due to base-emitter voltag of the BJT. The coarse replication is based...
详细信息
ISBN:
(纸本)9781467397209
This paper proposes a current-mode bandgap referenc which employs a novel "coarse" voltage replication to offset the 2nd-order curvature due to base-emitter voltag of the BJT. The coarse replication is based on a proces insensitive transcendental equation which regulates th independent CTAT current. The bandgap reference which will be implemented in 0.35μm CMOS process has a low operating current of 0.85μA. Under a 2.6V to 4V supply its line sensitivity is 64ppm/V even in the wors condition, and its TC is only 1.67ppm/°C in th temperature range of-55°C to 115°C.
This paper presents a new structure of column-level successive approximation register(SAR) analogue-to-digital converter(ADC) for Infrared Focal Plane Array. In this design, each column has a capacitance array and eac...
详细信息
ISBN:
(纸本)9781467397209
This paper presents a new structure of column-level successive approximation register(SAR) analogue-to-digital converter(ADC) for Infrared Focal Plane Array. In this design, each column has a capacitance array and each comparator and SAR logic block are shared by 8 columns. By using this shared structure, we achieved smaller silicon area, lower power dissipation and lower noise. And shared structure leaves enough space for signal and control wires of ADC blocks, therefore relieves the mutual disturbance among wires. Also, correlated switches are used to cancel the offset generated by charge injection. The conversion accuracy of the proposed ADC is 14 bits and is used for a 640×512 array with a frame rate of 50 Hz.
The 4H-SiC ultraviolet detector of the MESFET structure with gain is proposed and simulated in this paper. The Schottky gate of MESFET is transparent or semi-transparent to allow more of the incident UV light to be ab...
详细信息
暂无评论