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The implementation methods of high speed FIR filter on FPGA

The implementation methods of high speed FIR filter on FPGA

引用

International Conference on Solid-State and Integrated Circuit Technology

作者： Ying Li Chungan Peng Dunshan Yu Xing Zhang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University China

ISBN: (纸本)9781424421855

This paper implements a sixteen-order high-speed Finite Impose Response (FIR) filter with four different popular methods: Conventional multiplications and additions; Full custom Distributed Arithmetic (DA) scheme; Add-and-Shift method with advanced calculation schedule. Each scheme is analyzed in detail including implementing process and advantages and/or drawbacks in order to present a practical reference. All of these implementations are aimed to implement on Xilinx Spartan 3 devices and we also compare our results with an industry result produced by Xilinx CoregenTM also using Distributed Arithmetic. The premium add-and-shift method observes up to 80% reduction in total occupied slices and 63.3% versus the largest conventional parallel multiplication implementation.

关键词： Finite impulse response filter Field programmable gate arrays Arithmetic Job shop scheduling Digital signal processing microelectronics Energy consumption Programmable logic arrays Circuit synthesis Table lookup

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Novel structural Ti/Al-based ohmic contacts on AlGaN/GaN heterostructures

Novel structural Ti/Al-based ohmic contacts on AlGaN/GaN het...

引用

International Conference on Solid-State and Integrated Circuit Technology

作者： Zhihua Dong Jinyan Wang Min Yu Yilong Hao C. P. Wen Yangyuan Wang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University China

ISBN: (纸本)9781424421855

To improve the performances of ohmic contacts for GaN devices, a novel multilayer Ti/Al-based metal scheme (Ti/Al/Ti/Al/Ti/Al/Ti/Al/Ni/Au) on undoped AlGaN/GaN heterostructures was employed. A contact with ¿c (specific contact resistance) of 8.74E-07 ¿·cm2, Rc of 0.22 ¿·mm was demonstrated. Ohmic contacts with the novel metal structure were measured with I-V, SEM, HRTEM to show their properties. The results showed that ohmic contacts with novel structures have better surface morphology and proposed thermal stability than those using conventional Ti/Al/Ni/Au metal scheme, therefore ohmic contacts with novel structures should be better candidates for high power and high frequency GaN devices.

关键词： Ohmic contacts Aluminum gallium nitride Gallium nitride Gold Nonhomogeneous media Contact resistance Electrical resistance measurement Surface morphology Surface resistance Thermal stability

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Investigations on proton-irradiation-induced spacer damage in deep-submicron MOSFETs

Investigations on proton-irradiation-induced spacer damage i...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Shoubin Xue Pengfei Wang Ru Huang Dake Wu Yunpeng Pei Wenhua Wang Xing Zhang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781424421855;9781424421862

In this paper, we have focused our attention on DC characteristics degradation of 0.18 ¿m MOSFETs after 10-MeV proton irradiation. It is shown that the threshold voltage shift, the transconductance degradation and the saturation drain current decrease are lager in PMOSFETs, while small effects are exhibited in NMOSFETs. From the analysis, it is concluded that the basic damage mechanism is not ascribed to the gate oxide and the isolation. The origin of the observed changes is due to the damage in spacer oxides of the MOSFETs. The mechanism involved is that the energetic protons incident on the spacer region lose their energy to displace the atoms, give rise to many defects, and create a disordered region (displacement damage region), where many defects and traps can capture positive charges to make the static characteristics degraded. Therefore, it is pointed out that the sidewalls are one of sensitive regions for irradiation hardness.

关键词： MOSFETs Protons Degradation Voltage CMOS technology Dielectric breakdown microelectronics Space technology Laboratories circuits

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A method to lower power in speed negotiation algorithm of fiber channel

A method to lower power in speed negotiation algorithm of fi...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Jie Jin Dun Shan Xiao Xin Cui Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing P. R. China

ISBN: (纸本)9781424421855

In this paper, we propose a simple but effective method to reduce the power in the design of the speed negotiation algorithm(SNA). Based on thoroughly analyzing the algorithm and the results of simulation, we identify the large timers, the most commonly used in the SNA, as the most power consuming parts. This paper further develops a partition algorithm to tackle the power issue of the large timers. Utilizing the proposed method, we can reduce the power by 30% as opposed to only 19% if directly applying clock-gating methodology. Combined with clock-gating methodology, we can get 38% reduction in power with no more than 5% increase in area.

关键词： Analytical models Partitioning algorithms Clocks CMOS technology Storage area networks microelectronics Algorithm design and analysis Automata Optical fiber devices Laboratories

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A simple nano-scale patterning technology for FinFET fabrication

A simple nano-scale patterning technology for FinFET fabrica...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Xu Han Chengen Yang Dingyu Li Shengdong Zhang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781424421855;9781424421862

In this paper, a simple low-cost sub-50 nm silicon fin patterning technology is proposed and experimentally demonstrated. The technology is based on a micro-meter level lithography equipment, that is, it does not need any critical photolithographic step. The masking layer for fin formation is the nitride caped oxide layer which is reduced in width from sub-micrometer scale to nano-meter scale through a lateral etching in BOE. The etching rate is shown to slow down as the etching process goes on. A nano-scale oxide hard mask can be achieved after the nitride is removal. Both the cross-sectional view and top view of the etching process are shown by SEM photographs. Results indicate the simple patterning way is of low cost and under good control, and applicable to FinFET technology.

关键词： FinFETs Fabrication Etching Lithography Silicon Nanoscale devices microelectronics circuits Electron beams Ultraviolet sources

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Characteristics of sub-100nm ferroelectric field effect transistor with high-k buffer layer

Characteristics of sub-100nm ferroelectric field effect tran...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Rui Jin Yuncheng Song Min Ji Honghua Xu Jinfeng Kang Ruqi Han Xiaoyan Liu Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781424421855

The simulation work is carried out using two dimension device simulator to investigate the characteristics of sub-100 nm ferroelectric field effect transistor (FeFET) with high-k material as the buffer layer. Different configurations of gate stack are simulated and analyzed. It is shown that the structure of double-layer buffer can improve the device performance efficiently. Some important issues for FeFET scaling down are also discussed in this paper.

关键词： Ferroelectric materials FETs High K dielectric materials High-K gate dielectrics Buffer layers Polarization Threshold voltage Circuit simulation Capacitors Semiconductor process modeling

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Fabrication and characteristics of ZnO-based thin film transistors

Fabrication and characteristics of ZnO-based thin film trans...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Dedong Han Yi Wang Shengdong Zhang Lei Sun Jinfeng Kang Xiaoyan Liu Gang Du Lifeng Liu Ruqi Han Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781424421855

ZnO-based thin-film transistors (TFT) have been fabricated on p-Si (100) substrates by radio frequency (rf) magnetron sputtering at room temperature with a bottom gate configuration. The XRD and SEM show that ZnO films had high crystalline quality. The ZnO films present an average optical transmission (including the glass substrate) of 80% in the visible part of the spectrum. The electrical properties of ZnO-based TFTs were investigated by I D -V D and I D -V G measurements. The ZnO TFT operates in the enhancement mode with a channel mobility of 6.86 cm 2 /V · s. The combination of transparency, high channel mobility and room temperature processing makes the ZnO-TFT a very promising low cost optoelectronic device for the next generation of flat panel display (FDP).

关键词： Fabrication Thin film transistors Zinc oxide Optical films Substrates Temperature Radio frequency Sputtering X-ray scattering Crystallization

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Resistive Switching Behaviors and Mechanism of Transition Metal Oxides-Based Memory devices

Resistive Switching Behaviors and Mechanism of Transition Me...

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2008 9th International Conference on Solid-State and Integrated-Circuit Technology

作者： J.F.Kang B.Sun B.Gao N.Xu X.Sun L.F.Liu Y.Wang X.Y.Liu R.Q.Han Y.Y.Wang Institute of Microelectronics Peking University & Key Laboratory of Microelectronic Devices and CircuitsMinistry of Education

In this paper,the characteristics and mechanism of the transition metal oxide(TMO) based resistive switching memory(RRAM) devices were addressed. The results show that doping in oxide matrix materials, electrode material,and operating mode of the set/reset process may significantly affect the resistive switching behaviors of RRAM *** the dopants and matrix materials,electrode materials,device structure,and operating modes and understanding the related mechanisms are required to achieve the excellent device performance of TMO-based RRAM for the memory application.A unified physical model,based on the electron hopping transport between oxygen vacancies along the conductive filament paths,is used to explain and describe the resistive switching behaviors of the TMO based RRAM devices.

关键词： LRS HRS Resistive Switching Behaviors and Mechanism of Transition Metal Oxides-Based Memory devices

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Structure and magnetic properties of Co-doped TiO2 nanotubes by aqueous solution method

Structure and magnetic properties of Co-doped TiO2 nanotubes...

引用

International Conference on Solid-State and Integrated Circuit Technology

作者： A-bo Zheng Yan Li Yi Wang Lei Sun Li-feng Liu De-dong Han Jin-feng Kang Xing Zhang Ru-qi Han Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781424421855;9781424421862

The Co-doped titanium dioxide nanotubes were synthesized via the aqueous solution reaction. After hydrogenation, room temperature ferromagnetism (RTFM) was found in the cobalt doped titanium dioxide nanotubes at 300 K by the vibrate sample magnetometer. As the concentration of cobalt increased, the observed ferromagnetism became stronger. The X-ray diffraction, scanning electron microscopy, high-resolution transmission electron microscopy and energy dispersive X-ray spectroscopy were performed and excluded the existence of cobalt cluster. Therefore, the magnetic ions and oxygen vacancies induced by hydrogenation contribute to the observed ferromagnetism at 300 K.

关键词： Magnetic properties Cobalt Titanium Nanotubes Scanning electron microscopy Transmission electron microscopy Temperature Magnetometers X-ray diffraction Dispersion

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A dual loop dual VCO CMOS PLL using a novel coarse tuning technique for DTV

A dual loop dual VCO CMOS PLL using a novel coarse tuning te...

引用

International Conference on Solid-State and Integrated Circuit Technology

作者： Congyin Shi Huaizhou Yang Huiling Xiao Junhua Liu Huailin Liao Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781424421855

A CMOS phase-locked loop (PLL) which synthesizes frequencies between 474 and 858 MHz in steps of 1 MHz and settles in less than 180 ¿s is presented. This PLL can be implemented as a sub-circuit for a frequency synthesizer which serves for UHF Digital-TV receiver. To realize fast loop settling, integer-N architecture that work with 1 MHz reference frequency is implemented and a novel adaptive frequency calibration (AFC) of programmable dichotomizing coarse tuning technology is integrated. The novel AFC structure uses pulses of 2 n times of the PFD¿s reference frequency for counting and comparison. Two multi-band voltage controlled oscillators, which cover 866 to 1468 MHz and 1282 to 1892 MHz separately, are implemented so as to reduce VCO output noise and power consumption by reducing VCO gain on each frequency turning curse. I/Q carriers are generated by VCO output divided by 2. Fabricated in 0.18-¿m CMOS technology, the PLL achieves phase noise of less than -132 dBc/Hz at 1.45 MHz offset.

关键词： Voltage-controlled oscillators Phase locked loops Digital TV Tuning Frequency synthesizers Automatic frequency control CMOS technology Calibration Noise reduction Energy consumption

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