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Coupling of a hole double quantum dot in planar germanium to a microwave cavity

Physical Review Applied 2024年第2期22卷 024054页

作者： Yuan Kang Zong-Hu Li Zhen-Zhen Kong Fang-Ge Li Tian-Yue Hao Ze-Cheng Wei Song-Yan Deng Bao-Chuan Wang Hai-Ou Li Gui-Lei Wang Guang-Can Guo Gang Cao Guo-Ping Guo CAS Key Laboratory of Quantum Information CAS Center for Excellence in Quantum Information and Quantum Physics Key Laboratory of Microelectronics Devices & Integrated Technology Institute of Microelectronics Hefei National Laboratory Beijing Superstring Academy of Memory Technology Beijing 100176 China Hefei Anhui 230088 China

In recent years, notable progress has been made in the study of hole qubits in planar germanium, and circuit quantum electrodynamics (circuit QED) has emerged as a promising approach for achieving long-range coupling and scaling up of qubits. Here, we demonstrate the coupling between holes in a planar germanium double quantum dot (DQD) and photons in a microwave cavity. Specifically, a real-time calibrated virtual gate method is developed to characterize this hybrid system, which in turn allows us to determine the typical parameters sequentially through a single-parameter fitting instead of conventional multiparameter fitting with additional uncertainty, giving a hole-photon coupling rate of g0/2π = 21.7 MHz. This work is a step toward further research on hole-photon interactions and long-range qubit coupling in planar germanium. The experimental method developed in this work contributes to a more accurate and efficient characterization of hybrid cavity-QED systems.

关键词： Circuit quantum electrodynamics Quantum information with hybrid systems Quantum information with solid state qubits Double quantum dots Elemental semiconductors Superconducting devices Cavity resonators Microwave techniques

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Phase-controlled van der Waals growth of wafer-scale 2D MoTe_(2) layers for integrated high-sensitivity broadband infrared photodetection

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Light(Science & Applications) 2023年第1期12卷 77-88页

作者： Di Wu Chenguang Guo Longhui Zeng Xiaoyan Ren Zhifeng Shi Long Wen Qin Chen Meng Zhang Xin Jian Li Chong-Xin Shan Jiansheng Jie School of Physics and Microelectronics Key Laboratory of Material Physics Ministry of EducationZhengzhou UniversityZhengzhouHenan 450052China Department of Electrical and Computer Engineering University of California San DiegoLa JollaCA 92093USA Institute of Nanophotonics Jinan UniversityGuangzhouGuangdong 511443China Institute of Functional Nano and Soft Materials(FUNSOM) Jiangsu Key Laboratory for Carbon-Based Functional Materials and DevicesSoochow UniversitySuzhouJiangsu 215123China

Being capable of sensing broadband infrared(IR)light is vitally important for wide-ranging applications from fundamental science to industrial ***-dimensional(2D)topological semimetals are being extensively explored for broadband IR detection due to their gapless electronic structure and the linear energy dispersion ***,the low charge separation efficiency,high noise level,and on-chip integration difficulty of these semimetals significantly hinder their further technological ***,we demonstrate a facile thermal-assisted tellurization route for the van der Waals(vdW)growth of wafer-scale phase-controlled 2D MoTe_(2)***,the type-ⅡWeyl semimetal 1T'-MoTe_(2)features a unique orthorhombic lattice structure with a broken inversion symmetry,which ensures efficient carrier transportation and thus reduces the carrier *** characteristic is a key merit for the well-designed 1T'-MoTe_(2)/Si vertical Schottky junction photodetector to achieve excellent performance with an ultrabroadband detection range of up to 10.6μm and a large room temperature specific detectivity of over 108 Jones in the mid-infrared(MIR)***,the large-area synthesis of 2D MoTe_(2)layers enables the demonstration of high-resolution uncooled MIR imaging capability by using an integrated device *** work provides a new approach to assembling uncooled IR photodetectors based on 2D materials.

关键词： hinder enable difficulty

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Investigation of Performance Optimization in Bottom-Gate A-IGZO Thin-Film Transistors with Varying Thicknesses of PECVD-SiO2 Gate Dielectric

Investigation of Performance Optimization in Bottom-Gate A-I...

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China Semiconductor Technology International Conference (CSTIC)

作者： Longge Mao Yupeng Lu Yanyu Yang Haiyuan Lv Gaobo Xu State Key Laboratory of Fabrication Technologies for Integrated Circuits Institute of Microelectronics of the Chinese Academy of Sciences School of Integrated Circuits University of Chinese Academy of Sciences

ISBN: (数字)9798331513351

ISBN: (纸本)9798331513368

In this work, bottom-gate a-IGZO TFTs with different thicknesses of PECVD-SiO 2 gate dielectric and W/L ratios were fabricated. The device with a thicker gate dielectric exhibits the better performance with a V TH of 72mV, a minimum SS of 155mV/dec, an I ON/OFF ratio of 3.72×10 8 , and an ultra-low leakage current of 1.23×10 -14 A/μm since its superior interface quality. This unique effect may be attributed to the diffusion of residual hydrogen into the IGZO channel, which passivates interface defects and provides more free carriers in the thicker gate dielectric.

关键词： Performance evaluation Integrated circuits Hydrogen Logic gates Dielectrics Thin film transistors Leakage currents Optimization Hysteresis Dielectric devices

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A Novel Trench IGBT with Built-in Temperature Sensing 3

A Novel Trench IGBT with Built-in Temperature Sensing

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3rd International Symposium on Semiconductor and Electronic Technology, ISSET 2024

作者： Zhao, Yishang Li, Zehong Wang, Tongyang Zhou, Ziyi Pi, Meng Zheng, Yige Li, Wei Wan, Li Yang, Yang Qin, Haifeng University of Electronic Science and Technology of China State Key Laboratory of Electronic Thin Films and Integrated Devices Chengdu China Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China Shenzhen China Chongqing Institute of Microelectronics Industry Technology University of Electronic Science and Technology of China Chongqing China China Resources Microelectronics Ltd. Chongqing China

ISBN: (纸本)9798350390285

An innovative trench insulated gate bipolar transistor (IGBT) with temperature sensing is proposed for effective on-line monitoring of the junction temperature. The temperature sensing is consisted by the P doped polysilicon region where the sense and ground terminals are separated on the two sides of it, sensor controlling gate and the oxide isolation part. It is easy fabricated with the conventional trench IGBT. Investigated by the technology computer-aided design (TCAD) tools, the sensing signal keeps a brilliant linear relationship with the maximum junction temperature. And the temperature difference between the sensing part and the hotspot is extremely low due to the built-in sensing structure. It has also been verified that the IGBT featuring novel temperature sensing could detect junction temperature change during the short circuit test. Besides that, as the sensing mode has been well developed, the power dissipation of the proposed temperature sensing structure is optimized. That provides a convenient use in the real power systems, which could be regarded as a superior method to monitor system temperature status. © 2024 IEEE.

关键词： Insulated gate bipolar transistors (IGBT)

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Design and fabrication of etchless lithium niobate photonic crystal nanobeam cavity for efficient photon manipulation 15

Design and fabrication of etchless lithium niobate photonic ...

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15th International Conference on Information Optics and Photonics, CIOP 2024

作者： Jiang, Zhi Yao, Danyang Gao, Yu Ran, Xu Wang, Jianguo Gan, Xuetao Liu, Yan Hao, Yue Han, Genquan State Key Laboratory of Wide-Bandgap Semiconductor Devices and Integrated Technology School of Microelectronics Faculty of integrated circuits Xidian University Xi’an710071 China Key Laboratory of Light Field Manipulation and Information Acquisition Ministry of Industry and Information Technology Shaanxi Key Laboratory of Optical Information Technology School of Physical Science and Technology Northwestern Polytechnical University Xi’an710129 China Hangzhou Institute of Technology Xidian University Hangzhou311200 China

ISBN: (数字)9781510686175

ISBN: (纸本)9781510686168

Recently, a novel approach that uses low-refractive-index polymers as loading materials coated on lithium niobate (LN) can dramatically simplify fabrication challenges for etching LN. On this platform, various devices operating in the transverse magnetic (TM) polarized state based on optical bound states in the continuum (BIC) have been demonstrated. However, in this configuration, the propagation loss of TM mode exhibits sensitivity to waveguide width, which limits design flexibility in waveguide structures. To this end, we designed transverse magnetic electric (TE) polarized photonic crystal structures with the same fabrication process using a y-cut LN on insulator (LNOI) substrate. The fabricated photonic crystal nanobeam cavity (PCNBC) achieves a Q factor over one order of magnitude higher than any previously reported PCNBCs on the etchless LNOI platform and retains a high transmission. To verify the strong photon manipulation ability, additional experiments such as thermo-optic tuning and optical bistability generation have been made. These results demonstrate the potential of our devices for efficient on-chip photon manipulation. © 2024 SPIE.

关键词： Optical bistability

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Defects in monolayer WS2 grown via sulfurization of WSe2

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Progress in Natural Science:Materials International 2024年第2期34卷 323-328页

作者： Shunhui Zhang Xiang Lan Hang Liu Xuyang Zhang Baihui Zhang Zhikang Ao Tian Zhang Peng Chen Xiangdong Yang Fangping Ouyang Zhengwei Zhang Hunan Key Laboratory of Nanophotonics and Devices School of Physics Central South University College of Materials Science and Engineering Hunan University Physical Sciences and Engineering Division King Abdullah University of Science and Technology School of Energy and Power Engineering Changsha University of Science and Technology School of Flexible Electronics (Future Technologies) Institute of Advanced Materials Jiangsu National Synergetic Innovation Centre for Advanced Materials Nanjing Tech University School of Microelectronics Southern University of Science and Technology Institute of Micro/Nano Materials and Devices Ningbo University of Technology

The conversion of chalcogen atoms into other types of chalcogen atoms in transition metal dichalcogenides exhibits significant advantages in tuning the bandgaps and constructing lateral ***,despite atomic defects at the atomic scale were inevitably formed during conversion process,the construction of dislocations remains ***,we conducted in-situ sulfurization to achieve structural transformation from monolayer WSe2to *** probe these transformations at atomic scale using high-angle annular dark field scanning transmission electron microscopy（HAADF-STEM） and study structural defects of sulfurizedWS2by strain and displacement *** discovered that high-quality WSe2flakes were completely sulfurized while dislocations were successfully constructed,manifesting atomic surface roughness and structural *** work provides insights into designing and optimizing customized Transition metal dichalcogenides（TMDs）materials in controlled synthesis and defect engineering.

关键词： Tungsten disulfide Tungsten diselenide Sulfurization Dislocations Strain and displacement fields

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Wafer-scale carbon-based CMOS PDK compatible with siliconbased VLSI design flow

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Nano Research 2024年第8期17卷 7557-7566页

作者： Minghui Yin Haitao Xu Yunxia You Ningfei Gao Weihua Zhang Hongwei Liu Huanhuan Zhou Chen Wang Lian-Mao Peng Zhiqiang Li Institute of Microelectronics Chinese Academy of SciencesBeijing 100029China University of Chinese Academy of Sciences Beijing 100049China State Key Lab of Fabrication Technologies for Integrated Circuits Beijing 100029China Beijing Hua Tan Yuan Xin Electronics Technology Co. Ltd.Beijing 101399China Institute of Carbon-based Thin Film Electronics Peking UniversityShanxi 030012China Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics School of ElectronicsPeking UniversityBeijing 100871China

Carbon nanotube field-effect transistors(CNTFETs)are increasingly recognized as a viable option for creating high-performance,low-power,and densely integrated circuits(ICs).Advancements in carbon-based electronics,encompassing materials and device technology,have enabled the fabrication of circuits with over 1000 gates,marking carbon-based integrated circuit design as a burgeoning field of research.A critical challenge in the realm of carbon-based very-large-scale integration(VLSI)is the lack of suitable automated design methodologies and infrastructure *** this study,we present the development of a waferscale 3μm carbon-based complementary metal-oxide-semiconductor(CMOS)process design kit(PDK)(3μm-CNTFETs-PDK)compatible with silicon-based Electronic Design Automation(EDA)tools and VLSI circuit design *** proposed 3μm-CNTFETs-PDK features a contacted gate pitch(CGP)of 21μm,a gate density of 128 gates/mm^(2),and a transistor density of 554 transistors/mm^(2),with an intrinsic gate delay around 134 *** of the 3μm-CNTFETs-PDK was achieved through the successful design and tape-out of 153 standard cells and 333-stage ring oscillator *** the carbon-based PDK and a silicon-based design platform,we successfully implemented a complete 64-bit static random-access memory(SRAM)circuit system for the first time,which exhibited timing,power,and area characteristics of clock@10 kHz,122.1μW,3795μm×2810μ*** research confirms that carbon-based IC design can be compatible with existing EDA tools and silicon-based VLSI design flow,thereby laying the groundwork for future carbon-based VLSI advancements.

关键词： carbon nanotube field-effect transistors(CNTFETs) complementary metal-oxide-semiconductor(CMOS) process design kit(PDK) wafer-scale very-large-scale integration(VLSI)

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Improved Memory Window and Retention of Silicon Channel Hf0.5Zr0.5O2 FeFET by Using SiO2/HfO2/SiO2 Gate Side Interlayer

Improved Memory Window and Retention of Silicon Channel Hf0....

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2025 IEEE International Reliability Physics Symposium, IRPS 2025

作者： Han, Runhao Yang, Jia Hu, Tao Bai, Mingkai Ding, Yajing Shao, Xianzhou Dai, Saifei Sun, Xiaoqing Chai, Junshuai Xu, Hao Wang, Xiaolei Wang, Wenwu Ye, Tianchun Key Laboratory of Fabrication Technologies for Integrated Circuits Chinese Academy of Sciences Beijing100029 China Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China University of Chinese Academy of Sciences School of Integrated Circuits Beijing100049 China

ISBN: (纸本)9798331504779

We demonstrate a Si-channel Hf05Zr05O2FeFET that achieves a record-high memory window (MW) of up to 19.4 V, together with improved data retention. This advancement is realized by inserting the SiO2/HfO2/SiO2gate interlayer between the metal gate and the ferroelectric Hf05Zr05O2layer. The gate interlayer effectively retains the charges injected from the metal gate. The influence of SiO2thickness on the reliability was investigated. Although thicker SiO2layer enhance the memory window, its endurance is poor. The data retention improves with increasing SiO2layer thickness. Furthermore, the charge trapping behaviors of gate-injected electrons and holes are asymmetric. This work provides new insights into the gate-injected charges and data retention in the FeFETs with gate interlayer. © 2025 IEEE.

关键词： Quartz

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Study on the Anomalous Characteristics of Random Telegraph Noise in FeFETs

Study on the Anomalous Characteristics of Random Telegraph N...

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IEEE Silicon Nanoelectronics Workshop (SNW)

作者： Puyang Cai Yishan Wu Zixuan Sun Hao Li Xiaolei Wang Zhigang Ji Runsheng Wang Ru Huang School of Integrated Circuits Peking University Beijing China National Key Laboratory of Advanced Micro and Nano Manufacture Technology Shanghai Jiaotong University Shanghai China Key Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences China Beijing

ISBN: (数字)9798350391633

ISBN: (纸本)9798350391640

In this work, we investigate the behavior of random telegraph noise (RTN) in HfO 2 -based FeFETs. Anomalously high location factors of RTN in FeFETs are observed for the first time, which can be successfully explained by the lateral domain wall motion, with the help of a dynamic 2-D phase-field simulation. This work reveals the unique characteristics of RTN in HfO 2 -based FeFETs and provides insight into the ferroelectric switching process.

关键词： Conferences Noise Dynamics Switches Hafnium oxide Silicon FeFETs

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A Novel Double-Zener Process and Multiplex Design for High-Power Surge and High-Speed ESD devices Development 17

A Novel Double-Zener Process and Multiplex Design for High-P...

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17th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2024

作者： Qi, Zhao Jia, YiRui Chen, Hongquan Qiao, Ming Li, Zhaoji Zhang, Bo Chongqing Institute of Microelectronics Industry Technology UESTC Chongqing China State Key Laboratory of Electronic Thin Films and Integrated Devices Chengdu China Shenzhen Institute for Advanced Study UESTC Shenzhen China Institute of Electronic and Information Engineering of UESTC in Guangdong Dongguan China

ISBN: (纸本)9798350361834

In this work, a novel Double-zener process (DZP) for Transient Voltage Suppressor (TVS) was developed in 0.5 μm Bipolar CMOS DMOS (BCD) process for the design of Electrical Overstress (EOS) and Electrostatic Discharge (ESD) protection devices. The DZP is designed by adding two P-zener implantation (EP1 and EP2) with different energy. Moreover, multiplex units are designed for various applications, including a dual-directional (DD) low-capacitance silicon-controlled rectifier (DD-LCSCR), a dual-directional NPN (DD-NPN) clamp, and a high-power lightning protection array (LPA). The DD-LCSCR fabricated by EP2 step achieves a capacitance (C) of 0.5 pF and a surge peak current (I PP) of 7 A. The DD-NPN clamp using an EP1 step to decrease the breakdown voltage (BV), achieving a holding voltage (V h ) of 5.5 V, a clamping voltage (V_CL) of 14 V@50 A, and an ESD level of ±30 kV. Using the EP1 step and stacking technology, the 6-stacked LPA shows the excellent power density and VCL which is competitive with vertical TVS products. © 2024 IEEE.

关键词： Electrostatic devices

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