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61st ACM/IEEE Design Automation Conference, DAC 2024

作者： Lin, Ning Wang, Shaocong Zhang, Yue He, Yangu Wong, Kwunhang Basu, Arindam Shang, Dashan Chen, Xiaoming Wang, Zhongrui Department of Electrical and Electronic Engineering The University of Hong Kong Hong Kong Access - Ai Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Institute of Computing Technology Chinese Academy of Sciences Beijing China Key Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing China Department of Electrical Engineering City University of HongKong Hong Kong

ISBN: (纸本)9798400706011

Deep neural networks (DNNs), such as the widely-used GPT-3 with billions of parameters, are often kept secret due to high training costs and privacy concerns surrounding the data used to train them. Previous approaches to securing DNNs typically require expensive circuit redesign, resulting in additional overheads such as increased area, energy consumption, and latency. To address these issues, we propose a novel hardware-software co-design approach for DNN intellectual property (IP) protection that capitalizes on the inherent aging characteristics of circuits and a novel differential orientation fine-tuning (DOFT) to ensure effective ***-wise, we employ random aging to produce authorized chips. This process circumvents the need for chip redesign, thereby eliminating any additional hardware overhead during the inference procedure of DNNs. Moreover, the authorized chips demonstrate a considerable disparity in DNN inference performance when compared to unauthorized chips. Software-wise, we propose a novel DOFT, which allows pre-trained DNNs to maintain their original accuracy on authorized chips with minimal fine-tuning, while the model's performance on unauthorized chips is reduced to random guessing. Extensive experiments on various models, including MLP, VGG, ResNet, Mixer, and SwinTransformer, with lightweight binary and practical multi-bit weights demonstrate that the proposed method achieves effective IP protection, with only 10% accuracy on unauthorized chips, while preserving nearly the original accuracy on authorized ones. © 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

关键词： Deep neural networks

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Transient Analysis of Plasma Limiter Using the SETD method with a Multi-Physics Model

Transient Analysis of Plasma Limiter Using the SETD method w...

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2023 IEEE MTT-S International Wireless Symposium, IWS 2023

作者： Liu, Tong Dai, Zhou Qin, Haoran Zhang, Tiancheng Bao, Huaguang Zhou, Yinghui Sun, Zheng Ding, Dazhi School of Microelectronics Nanjing University of Science and Technology Nanjing210094 China Nanjing Electronic Devices Institute Nanjing210016 China Army Engineering University National Key Laboratory on Electromagnetic Environmental Effects and Electro-optical Engineering Nanjing210007 China

ISBN: (纸本)9798350336535

The plasma limiter can reflect and absorb the high-power microwave to protect the electronic systems. In this paper, a coupled multi-physics model based on the wave equation and electron hydrodynamic equation is proposed and the response properties of the plasma limiter under high power microwave radiation are analyzed using the spectral element time domain (SETD) method. The superiority of the transient fully coupled analysis under high power microwaves is demonstrated by comparison with COMSOL. © 2023 IEEE.

关键词： Transient analysis

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A Novel Use of the Shielded Gate in SGT MOSFETs as the Voltage Sensing Terminal 16

A Novel Use of the Shielded Gate in SGT MOSFETs as the Volta...

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16th IEEE International Conference on Solid-State and Integrated Circuit technology, ICSICT 2022

作者： Yang, Yang Li, Ze-Hong Zhao, Yi-Shang Huang, Ling-Xuan Chen, Yu-Jia Li, Lu-Ping Wang, Tong-Yang Xia, Zi-Ming University of Electronic Science and Technology of China State Key Laboratory of Electronic Thin Films and Integrated Devices Chengdu610054 China University of Electronic Science and Technology of China Chongqing Institute of Microelectronics Industry Technology Chengdu610054 China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

This paper describes a novel use of the shielded gate in SGT MOSFETs as the voltage sensing terminal. The voltage sensing terminal is physically disconnected from the shielded gate of SGT, and the sensor voltage (VS) can replicate a scaled-down version of the SGT voltage (VDS). The device circuit hybrid simulation is carried out, and different load capacitors (CL) are used. The results show that the sensor behavior is consistent with the change of VDS. Besides, with the increase of CL (from 0.025 pF to 25 pF), the level of the sensor voltage decreases (VSmax from 10 V to 1.7 V), which shows that the range of VS is designable under different CL. © 2022 IEEE.

关键词： MOSFET devices

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Enhanced Filed Limiting Rings for Improving Breakdown Voltage Stability 16

Enhanced Filed Limiting Rings for Improving Breakdown Voltag...

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16th IEEE International Conference on Solid-State and Integrated Circuit technology, ICSICT 2022

作者： Zhao, Yi-Shang Li, Ze-Hong Xia, Zi-Ming Yang, Yang Wan, Jia-Li Li, Lu-Ping Wang, Tong-Yang Zhu, Ji-Xian University of Electronic Science and Technology of China State Key Laboratory of Electronic Thin Films and Integrated Devices Chengdu610054 China University of Electronic Science and Technology of China Chongqing Institute of Microelectronics Industry Technology Chongqing610054 China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

Due to the hole interface traps caused by extreme thermal and electrical stress, breakdown voltage (BY) walk-in and walk-out phenomenon has been widely researched. An improved field limiting rings (FLRs) edge termination with enhanced rings (E-rings) structure have been proposed in this paper, which achieves well static electrical parameters and advanced BY stability. TCAD simulation results indicate that the proposed structure behaves better voltage drops distribution among the three FLRs ring spaces for various surface hole traps. Since the surface electrical field and potential are modulated by the enhanced rings and additional ring, the decline BY caused by the trap effect could be reduced more than 30% without any extra photo etching cost and compatible with original manufacturing process. © 2022 IEEE.

关键词： Electric breakdown

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A Chaos-RC4 Encryption Algorithm based on Memristive Neural Network 2

A Chaos-RC4 Encryption Algorithm based on Memristive Neural ...

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2nd IEEE International Conference on Electronic technology, Communication and Information, ICETCI 2022

作者： Liu, Yi'an Liu, Yili Liu, Shuang Li, Guo Liu, Yang University of Electronic Science and Technology of China State Key Laboratory of Electronic Thin Films and Integrated Devices Chengdu610054 China Chongqing Institute of Microelectronics Industry Technology Uestc Chongqing401332 China

ISBN: (纸本)9781728181158

This paper proposes an algorithm based on memristive neural network to realize Rivest Cipher 4 (RC4) encryption, which effectively releases the correlation between the input key and the output key stream of the RC4 algorithm. At the same time, this design improves both key Schedule Algorithm (KSA) and Pseudo Random Generation Algorithm (PRGA) of RC4 stream cipher. In the KSA process, a neural network with chaos is constructed by utilizing the non-linearity characteristics of the memristor, and the generated chaotic sequence having good randomness performance, is used as the input key of the RC4 algorithm to realize 'one time one secret' dynamic encryption. In the PRGA process, another sequence generated randomly by memristive neural network is used for a dynamic chaotic permutation on the data table of the S-box. Experiment results demonstrate the effectiveness of the algorithm, and show it has larger key space, higher security and stronger robustness than the traditional algorithm. © 2022 IEEE.

关键词： Memristors

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Impact of contact properties on the performance of β-Ga2O3 solar-blind photodetector

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The European Physical Journal Special Topics 2025年第2期234卷 319-325页

作者： Dong, Yu-Song Liang, Ming-Xuan Qian, Ling-Xuan National Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China Chengdu China School of Integrated Circuit Science and Engineering University of Electronic Science and Technology of China Chengdu China Chongqing Institute of Microelectronics Industry Technology University of Electronic Science and Technology of China Chongqing China

Herein, the impact of contact properties on the performance of β-Ga2O3 solar-blind photodetectors (PDs) was comprehensively investigated by comparing pure Au and Ti/Au Metal–Semiconductor–Metal (MSM) contacts as well as varying the contact-annealing conditions. SIMS and XPS spectra reveal that there is a mutual diffusion between Ti and Ga atoms forming an interfacial layer, and that the out-diffusion of O atoms from β-Ga2O3 thin film results in the appearance of TiOx species and high oxygen deficiency at the metal/semiconductor (M/S) interface. Accordingly, the sensitivity of Ti/Au-contacted PDs, in terms of responsivity and specific detectivity, was enhanced by more than two orders of magnitude compared with Au-contacted one, which could be attributed to the combined effect of the formation of TiOx, increased electron density, lower Schottky barrier height, shrunk depletion-layer width, and larger internal gain. These effects can be further enhanced by the contact annealing in N2 atmosphere with the rise of temperature. However, the transient-response properties, especially for the recovery speed, degrade rapidly when introducing the increased contact annealing temperature, which could be attributed to continuously increasing interfacial traps as well as broadening interfacial-layer width, even leading to a persistent photocurrent at high anneal temperature. Therefore, the trade-off between sensitivity and speed in β-Ga2O3 solar-blind PDs should be carefully considered when introducing Ti transition layer and contract-annealing process.

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Cost-Effective 1200 V SiC MOSFETs on a Novel 150 mm SiC Engineered Substrate with Dummy-Grade Material Reuse

Cost-Effective 1200 V SiC MOSFETs on a Novel 150 mm SiC Engi...

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2024 IEEE International Electron devices Meeting, IEDM 2024

作者： Wang, Xinhua Xing, Xiangjie Yang, Xiaolei Yang, Xin Chen, Yan Ma, Guoliang Wang, Bixuan Zhao, Zhifei Yuan, Chao Bai, Yun Huang, Sen Lei, Yipei Shi, Jingyuan Liu, Fuchao Zhang, Yuhao Mu, Fenwen Liu, Xinyu Liu, Sheng Hao, Yue HF&HV Device and Integrate Center Institute of Microelectronics Chinese Academy of Science Beijing China State Key Laboratory of WBS Devices and Integrated Technology Nanjing Electronic Devices Institute Nanjing China Center for Power Electronics Systems Virginia Tech BlacksburgVA United States Institute of Technological Sciences Wuhan University Wuhan China TJ Innovative Semiconductor Substrate Technology Co. Ltd Tianjing China Xidian University Xi’an China

ISBN: (纸本)9798350365429

The SiC substrate cost accounts for >50% of final device cost, and its manufacturing suffers from a high carbon footprint. To address this challenge, this work demonstrates a novel 150 mm single-crystal SiC engineered substrate, which homogeneously integrates a prime-grade SiC layer onto a dummy-grade SiC substrate by surface-active bonding. This engineered substrate reuses low-grade SiC substrates, which are often disposed as wastes in the MOSFET industrial production, as well as recycling the high-grade wafer for over 30 times. It thus can enable a drastic reduction in the substrate cost (by ~40%) and the associated carbon footprint. The engineered substrate demonstrates a defect density as low as prime-grade substrate, a low thermal boundary resistance (TBR) of 2.8 m2K/GW, as well as very small electric field at the bonded interface. The TBR is among the lowest reported for the SiC interfaces bonded with SiC, GaN, and Ga2O3. The 150 mm, 1200 V-class SiC epi grown on this substrate achieved a high killer-defect-free yield of 99.2%. The 1200 V, 20 mΩ SiC MOSFETs fabricated on this 150 mm epi demonstrate a yield over 70% (for IDSS250 A, 10 ms surge current. To the best of our knowledge, this is the first report of the wafer-level device data and high-current robustness for a SiC engineering substrate. These results show the great potential of this new substrate technology to enable more economical and sustainable SiC power electronics. © 2024 IEEE.

关键词： MOSFET devices

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Influence of Back Gate Bias on the Hot Carrier Reliability of DSOI nMOSFET

Influence of Back Gate Bias on the Hot Carrier Reliability o...

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Annual International Symposium on Reliability Physics

作者： Xinyi Zhang Kewei Wang Fang Wang Jiangjiang Li Zhicheng Wu Duoli Li Bo Li Jianhui Bu Zhengsheng Han Institute of Microelectronics of Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China Key Laboratory of Science and Technology on Silicon Devices Chinese Academy of Sciences Beijing China State key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing China Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing China

The hot carrier reliability under different back-gate bias in DSOI nMOSFET is studied. Reverse back-gate bias results in an over-all larger time exponents than the forward back-gate bias, which is attributed to the increased lateral electric field (as supported by TCAD simulation) and consequently a stronger interface state generation (related to SVE mechanisms). Such strong time acceleration is crucial for long term reliability prediction under circuit operation. The abnormal deviation among threshold voltage shift, linear/saturation drain current degradation is observed: through careful inspection of the degradation of the I- V characteristics, the competing role of the interface state generation and hot hole trapping is revealed, with a virtual channel shortening effect as supported by the increased DIBL values.

关键词： Degradation Simulation Hot carriers MOSFET circuits Logic gates Threshold voltage Interface states

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Ultra-High-Energy Heavy Ion Induced Single Event Effect of TSV-Based 3D Integrated SOI SRAM Circuits

Ultra-High-Energy Heavy Ion Induced Single Event Effect of T...

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European Conference on Radiation and its Effects on Components and Systems (RADECS)

作者： Junjun Zhang Fanyu Liu Bo Li Jiantou Gao Peixiong Zhao Jie Liu Jiajun Luo Chinese Academy of Sciences Institute of Microelectronics University of Chinese Academy of Sciences and Key Laboratory of Science and Technology on Silicon Devices Beijing China Institute of Microelectronics and Key Laboratory of Science and Technology on Silicon Devices Chinese Academy of Sciences Beijing China Institute of Modern Physics Chinese Academy of Sciences Gansu China

The single event upset of TSV-based four-tier 3D SRAM circuits is investigated through experimental method with ultra-high-energy heavy ions and the upset cross-section exhibits strong relationship on the tier positio...

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Recent progress on surface chemistryⅠ:Assembly and reaction

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Chinese Chemical Letters 2024年第12期35卷 43-94页

作者： Xin Li Zhen Xu Donglei Bu Jinming Cai Huamei Chen Qi Chen Ting Chen Fang Cheng Lifeng Chi Wenjie Dong Zhenchao Dong Shixuan Du Qitang Fan Xing Fan Qiang Fu Song Gao Jing Guo Weijun Guo Yang He Shimin Hou Ying Jiang Huihui Kong Baojun Li Dengyuan Li Jie Li Qing Li Ruoning Li Shuying Li Yuxuan Lin Mengxi Liu Peinian Liu Yanyan Liu Jingtao Lü Chuanxu Ma Haoyang Pan JinLiang Pan Minghu Pan Xiaohui Qiu Ziyong Shen Shijing Tan Bing Wang Dong Wang Li Wang Lili Wang Tao Wang Xiang Wang Xingyue Wang Xueyan Wang Yansong Wang Yu Wang Kai Wu Wei Xu Na Xue Linghao Yan Fan Yang Zhiyong Yang Chi Zhang Xue Zhang Yang Zhang Yao Zhang Xiong Zhou Junfa Zhu Yajie Zhang Feixue Gao Yongfeng Wang Center for Carbon-based Electronics and Key Laboratory for the Physics and Chemistry of Nanodevices School of ElectronicsPeking UniversityBeijing 100871China Spin-X Institute School of MicroelectronicsSouth China University of TechnologyGuangzhou 511442China School of Materials and Energy Guangzhou Key Laboratory of Low-Dimensional Materials and Energy Storage DevicesGuangdong University of TechnologyGuangzhou 510006China Faculty of Materials Science and Engineering Kunming University of Science and TechnologyKunming 650093 China i-Lab CAS Key Laboratory of Nanophotonic Materials and DevicesSuzhou Institute of Nano-Tech and Nano-BionicsChinese Academy of SciencesSuzhou 215123China CAS Key Laboratory of Molecular Nanostructure and Nanotechnology CAS Research/Education Center for Excellence in Molecular SciencesBeijing National Laboratory for Molecular Sciences(BNLMS)Institute of ChemistryChinese Academy of SciencesBeijing 100190China State Key Laboratory for Organic Electronics and Information Displays&Jiangsu Key Laboratory for Biosensors Institute of Advanced MaterialsJiangsu National Synergetic Innovation Center for Advanced MaterialsNanjing University of Posts and TelecommunicationsNanjing 210023China Institute of Functional Nano and Soft Materials(FUNSOM) Jiangsu Key Laboratory for Carbon-Based Functional Materials and DevicesSoochow UniversitySuzhou 215123China Hefei National Research Center for Physical Sciences at the Microscale and Synergetic Innovation Center of Quantum Information and Quantum Physics University of Science and Technology of ChinaHefei 230026China Institute of Physics&University of Chinese Academy of Sciences Beijing 100190China State Key Laboratory of Catalysis Dalian Institute of Chemical PhysicsChinese Academy of SciencesDalian 116023China College of Chemistry Beijing Normal UniversityBeijing 100875China Beijing National Laboratory for Molecular Sciences(BNLMS) College of Chemistry and Molecular EngineeringPeking UniversityBeijing 100871China School

Surface chemistry focuses on the investigation of the adsorption,migration,assembly,activation,reaction,and desorption of atoms and molecules at *** chemistry plays the pivotal roles in both fundamental science and applied *** review will summarize the recent progresses on surface assembly,synthesis and catalysis investigated mainly by scanning tunneling microscopy and atomic force *** assemblies of water and small biomolecules,construction of Sierpin′ski triangles and surface chirality are ***-surface synthesis of conjugated carbo-and heterocycles and other kinds of carbon nanostructures are *** model catalysis,including single-atom catalysis and electrochemical catalysis,are discussed at the single-atom level.

关键词： Surface chemistry Assembly Surface synthesis Catalysis on surface Surface electrochemical processes

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