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China Semiconductor Technology International Conference (CSTIC)

作者： Shengyu Bao Zongwei Wang Tianyi Liu Daqin Chen Yimao Cai Ru Huang Institute of Microelectronics Peking University Beijing China Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing China Frontiers science center for nano-optoelectronics Peking University Beijing P. R. China

ISBN: (数字)9781728165585

ISBN: (纸本)9781728165592

In this work, a Conditional Generative Adversarial Network (CGAN) [1] is demonstrated based on the Resistive Random Access Memory (RRAM). During training, the read noise of RRAM is utilized as a random bias source to enrich the diversity of the generator in CGAN. Further, we evaluate the impact of both read noise (RRAM as weight storage cell) and the resolution of the AD/DA circuit on the performance of CGAN through a comprehensive simulation.

关键词： Training Performance evaluation Random access memory Semisupervised learning Generative adversarial networks Generators Integrated circuit modeling

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Improved Discrete Wavelet Analysis and Principal Component Analysis for EEG Signal Processing

Improved Discrete Wavelet Analysis and Principal Component A...

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International Conference on ASIC

作者： YiHsiang Chen Xiaoxin Cui Kanglin Xiao Dunshan Yu Key Laboratory of Microelectronics Devices and Circuits (MoE) Institute of Microelectronics Peking University Beijing P. R. China

Electroencephalogram (EEG) has significant applications on medical diagnosis and Brain Computer Interface (BCI). But the main obstacle of analyzing EEG signal is various types of noises to get actual information. Extracting important features is a key issue in this study. This paper uses the BCI Competition IV 2b motion imagery data, in which we provide a review of various prior art to determine the motion imaginary MI mission. Using machine learning to identify two different movements in the EEG signal, the data from nine subjects were analyzed by principal component analysis (PCA) combined with discrete wavelet (DWT) packet analysis. The extracted DWT feature is input into the support vector machine (SVM) classifier, and the experimental results shows that this method is better than traditional methods with a classification accuracy rate of 86.7%.

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Low Voltage Dual-Modulus Frequency Divider Based on Extended True Single-Phase Clock Logic

Low Voltage Dual-Modulus Frequency Divider Based on Extended...

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2018 IEEE International Conference on Electron devices and Solid State circuits, EDSSC 2018

作者： Wang, Wanlu Jia, Song Wang, Ziyi Pan, Tao Wang, Yuan Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing100871 China

ISBN: (纸本)9781538662342

Two low voltage dual-modulus frequency divider based on extended true single-phase clock (E-TSPC) logic are proposed. By reducing the number of serial transistors from VDD to GND, the proposed designs can effectively work at low voltage. Simulation results in SMIC 40nm technology show that the presented design I has better power and speed performance with lower supply voltage. Compared to the referenced designs, the presented design II can work at the lowest supply voltage with little loss of performance. © 2018 IEEE.

关键词： Computer circuits

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Design of low-power high-speed dual-modulus frequency divider with improved MOS current mode logic

Design of low-power high-speed dual-modulus frequency divide...

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2018 IEEE International Conference on Electron devices and Solid State circuits, EDSSC 2018

作者： Wang, Wanlu Jia, Song Pan, Tao Wang, Yuan Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing100871 China

ISBN: (纸本)9781538662342

One design technique that aims to reduce power consumption of MOS current mode logic dual-modulus frequency divider is presented in this paper. With combinational logic transferred the proposed scheme can obtain high working frequency. By merging the first master latches of CML DFFs, the simplified structure can achieve lower power consumption. Circuit simulation of the proposed structure in 28nm CMOS technology shows a 21% reduction of power consumption over conventional scheme is achieved at frequency of 56GHz. © 2018 IEEE.

关键词： Electric power utilization

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12-bit 2.6 GS/s RF DAC based on return-to-zero technology

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The Journal of China Universities of Posts and Telecommunications 2019年第4期26卷 36-42页

作者： Li Xiaopeng Wang Zhigong Zhang Yi Zhang Youtao Zhang Mi Institute of RF and OE ICs Southeast UniversityNanjing 210096China Nanjing Guobo Electronics Company Limited Nanjing 210016China Nanjing Electronic Devices Institute Nanjing 210016China National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology Nanjing 210046China College of Microelectronics Nanjing University of Posts and TelecommunicationsNanjing 210046China State Key Laboratory of Millimeter Waves Southeast UniversityNanjing 210096China Science and Technology on Monolithic Intergrated Circuits and Modules Laboratory Nanjing 210016China

A 12-bit 2.6 GS/s radio frequency digital to analog converter(RF DAC)based on 1 um GaAs heterojunction bipolar transistor(HBT)process is *** DAC integrates a 4:1 multiplexer to reduce the data rate of input ports,which greatly facilitates the *** core adopts 4+8 segmented current steering structure.R-2R ladder network is used for 8 least significant bit(LSB)to realize binary current weighting and thermometer coding is used for 4 most significant bit(MSB).Return-to-zero(RZ)technology is used to expand the effective bandwidth of DAC output to the third Nyquist *** proposed DAC has a better output power flatness and spurious-free dynamic range(SFDR).Compared to traditional DAC,measured results demonstrate that the output power of this RZ DAC is increased by 33 dB and the SFDR is enhanced by 27 dB near the second Nyquist band.

关键词： DAC RZ Nyquist band

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A Novel High-speed FPGA-based True Random Number Generator Based on Chaotic Ring Oscillator

A Novel High-speed FPGA-based True Random Number Generator B...

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International Conference on ASIC

作者： Xinning Liu Song Jia Hanzun Zhang Institute of Microelectronics Peking University Beijing China Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing China

This paper presents a novel true random number generator with entropy source based on swappable matrix feedback ring oscillator (SMFRO). The proposed SMFRO structure utilizes multiple feedback mechanism to produce reliable chaotic oscillation. Three SMFROs implemented on FPGA with different resource configurations are tested. All of them can pass chaotic oscillation and NIST tests. Proposed design can generate random bits at 500MHz without extra post-processing.

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Deep Spiking Convolutional Neural Networks for Programmable Neuro-synaptic System

Deep Spiking Convolutional Neural Networks for Programmable ...

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International Conference on ASIC

作者： Chenglong Zou Xinan Wang Boxing Xu Yisong Kuang Xiaoxin Cui Key Laboratory of Microelectronics Devices and Circuits Institute of Microelectronics Peking University Beijing China Key Laboratory of Integrated Microsystem School of ECE Peking University Shenzhen Graduate School Shenzhen China

Binary neural networks (BNNs) - neural networks with binary {-1, +1} weights and activations at run-time, have attracted much attention in recent years, which drastically reduce resource requirement and power consumption with tolerable accuracy loss. While, spiking neural networks (SNNs) are designed as a brain-inspired computing model, which can be deployed on large-scale distributed and event-based neuromorphic hardware efficiently. To enable a conversion of above two, we develop a variant of BNNs which employ binary-valued {0, +1} activations and ternary-valued {-1, 0, +1} weights and achieve start-of-the-art classification accuracy across two standard vision datasets, even better than the previous proposals using BNNs or SNNs. Furtherly, we propose an effective configuration method for network deployment on our designed programmable neuro-synaptic system with only one timestep and milliwatt level power consumption.

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Complementary Photo-Synapses: Complementary Photo-Synapses Based on Light-Stimulated Porphyrin-Coated Silicon Nanowires Field-Effect Transistors (LPSNFET) (Small 30/2021)

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Small 2021年第30期17卷

作者： Xiaokang Li Bocheng Yu Bowen Wang Ran Bi Haixia Li Kun Tu Gong Chen Zhihong Li Ru Huang Ming Li Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing 100871 China National Key Laboratory of Science and Technology on Micro/Nano Fabrication Institute of Microelectronics Peking University Beijing 100871 China Frontiers Science Center for Nano-optoelectronics Peking University Beijing 100871 China

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10-nm Channel Length Indium-Tin-Oxide transistors with Ion = 1860 μA/μm, Gm = 1050 μS/μm at Vds = 1 V with BEOL Compatibility

10-nm Channel Length Indium-Tin-Oxide transistors with Ion =...

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International Electron devices Meeting (IEDM)

作者： Shengman Li Chengru Gu Xuefei Li Ru Huang Yanqing Wu Institute of Microelectronics and Key Laboratory of Microelectronic Devices and Circuits (MoE) Peking University Beijing Wuhan National High Magnetic Field Center and School of Optical and Electronic Information Huazhong University of Science and Technology Wuhan China Frontiers Science Center for Nano-optoelectronics Peking University Beijing China

ISBN: (数字)9781728188881

ISBN: (纸本)9781728188898

In this paper, we successfully realized a shortest 10-nm channel length transistor based on ultrathin 3.5-nm indium tin oxide channel. Using 5-nm lanthanum-doped hafnium oxide (HfLaO) high- κ dielectric, the 10- nm channel ultrathin device architecture with wide bandgap exhibits excellent switching behavior with on/off ratio exceeding 10 10 and ultra-low leakage current of 40 fA/μm. Record-high on-state current of 1860 μA/μm and transconductance (g m ) of more than 1000 μS/μm have been achieved, benefited from a rather small contact resistance of 162 Ω·μm. R on of the 10-nm ITO transistor was smaller than 500 Ω·μm. Adopting the MIT Virtual Source (MVS) model, we extracted the saturation injection velocity ν x0 up to 8.8 × 10 6 cm/s and the resulting mean free path λ mfp of ITO transistor is 21.6 nm. Radio frequency transistor with 30-nm-long channel exhibited record high radio-frequency (RF) performance with small-signal current gain (f T ) of 20 GHz and maximum oscillation frequency (f max ) of 13 GHz. These two metrics contribute to √(f T × f max ) exceeding 15 GHz, confirming overwhelming superiority compared to RF transistors based on other ultrathin novel channel materials such as MoS 2 , BP and metal-oxides. Finally, we employed bootstrapped mode (BST) inverters to fabricate a 5-stage ring oscillator, and achieved the record-low propagation delay of 0.4 ns/stage among metal-oxides.

关键词： Ring oscillators Radio frequency Indium tin oxide Frequency measurement Transistors Sulfur Molybdenum

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GeC film with high substitutional carbon concentration formed by ion implantation and solid phase epitaxy for strained Ge n-MOSFETs

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Science China(Information Sciences) 2018年第6期61卷 259-261页

作者： Bingxin ZHANG Xia AN Xiangyang HU Ming LI Xing ZHANG Ru HUANG Key Laboratory of Microelectronic Devices and Circuits Institute of MicroelectronicsPeking University

Dear editor,Ge is considered as a promising channel material to replace Si because of its high carrier mobility than Si and compatibility with conventional Si process[1–3].Strain engineering has been widely used in S... 详细信息

关键词： GeC film with high substitutional carbon concentration formed by ion implantation and solid phase epitaxy for strained Ge n-MOSF HRTEM SPE

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