检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

306 篇 会议
116 篇 期刊文献

馆藏范围

422 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

288 篇 工学
- 192 篇 电子科学与技术（可...
- 97 篇 材料科学与工程（可...
- 47 篇 电气工程
- 41 篇 计算机科学与技术...
- 29 篇 化学工程与技术
- 17 篇 仪器科学与技术
- 16 篇 信息与通信工程
- 13 篇 光学工程
- 12 篇 控制科学与工程
- 11 篇 机械工程
- 10 篇 动力工程及工程热...
- 9 篇 冶金工程
- 8 篇 软件工程
- 6 篇 力学（可授工学、理...
- 4 篇 生物医学工程（可授...
- 3 篇 核科学与技术
- 2 篇 环境科学与工程（可...
- 2 篇 安全科学与工程
82 篇 理学
- 58 篇 物理学
- 31 篇 化学
- 13 篇 数学
- 3 篇 系统科学
- 2 篇 天文学
- 2 篇 统计学（可授理学、...
- 1 篇 地球物理学
16 篇 管理学
- 14 篇 管理科学与工程(可...
- 2 篇 图书情报与档案管...
2 篇 军事学
- 2 篇 军队指挥学
1 篇 经济学
- 1 篇 应用经济学
1 篇 医学
1 篇 艺术学

主题

32 篇 logic gates
26 篇 microelectronics
21 篇 switches
18 篇 silicon
17 篇 cmos technology
16 篇 clocks
15 篇 capacitors
14 篇 transistors
14 篇 degradation
12 篇 performance eval...
11 篇 simulation
11 篇 mosfets
10 篇 power demand
10 篇 voltage
10 篇 electrodes
9 篇 temperature
9 篇 cmos integrated ...
9 篇 threshold voltag...
9 篇 power dissipatio...
8 篇 circuit simulati...

机构

230 篇 key laboratory o...
26 篇 university of ch...
13 篇 key laboratory o...
12 篇 institute of mic...
9 篇 peking universit...
9 篇 high-frequency h...
9 篇 laboratory of mi...
8 篇 department of el...
8 篇 key laboratory o...
8 篇 key laboratory o...
7 篇 institute of mic...
6 篇 access – ai chip...
6 篇 state key labora...
5 篇 key laboratory o...
5 篇 school of integr...
5 篇 peking universit...
5 篇 school of microe...
5 篇 state key labora...
5 篇 department of el...
5 篇 frontiers scienc...

作者

82 篇 ru huang
61 篇 xing zhang
59 篇 yuan wang
42 篇 song jia
27 篇 ming li
23 篇 wang yuan
21 篇 ganggang zhang
21 篇 jia song
18 篇 runsheng wang
18 篇 zhang xing
17 篇 xia an
17 篇 qianqian huang
17 篇 wengao lu
17 篇 zhongjian chen
16 篇 xiaoyan liu
16 篇 yangyuan wang
16 篇 gang du
15 篇 yacong zhang
15 篇 yandong he
15 篇 jinfeng kang

语言

396 篇 英文
15 篇 中文
9 篇 其他
2 篇 法文

检索条件"机构=Institute of Microelectronnics and Key Laboratory of Microelectronics Devices and Circuits"

共 422 条记录，以下是141-150 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Impact of Gate Asymmetry on Gate-All-Around Silicon Nanowire Transistor Parasitic Capacitance 14

Impact of Gate Asymmetry on Gate-All-Around Silicon Nanowire...

引用

14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018

作者： Dong, Xiaoqiao Yang, Yuancheng Chen, Gong Sun, Shuang Cai, Qifeng Li, Xiaokang An, Xia Xu, Xiaoyan Zhang, Wanrong Li, Ming Faculty of Information Technology Beijing University of Technology Beijing100124 China Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing100871 China

ISBN: (纸本)9781538644409

In this paper, an analytical model is developed for parasitic gate capacitance of the gate-all-around (GAA) silicon nanowire MOSFETs (SNWT) with asymmetrical top and bottom gates. The modeling results show that the gate-to-source/drain spacer significantly impacts on the parasitic capacitance especially in the case of top-to-bottom gate misalignment. It is found that the optimized top-to-bottom gate misalignment may achieve smaller Cp/Ctotal so as to improve the AC performance of GAA SNWT. The developed capacitance model is more suitable for the actual process for further device design optimization. © 2018 IEEE.

关键词： Nanowires

来源：评论

学校读者我要写书评

暂无评论

High Performance Gigahertz Flexible Radio Frequency Transistors with Extreme Bending Conditions

High Performance Gigahertz Flexible Radio Frequency Transist...

引用

International Electron devices Meeting (IEDM)

作者： Mengfei Wang Mengchuan Tian Zhenfeng Zhang Shengman Li Runsheng Wang Chengru Gu Xiaoyu Shan Xiong Xiong Xuefei Li Ru Huang Yanqing Wu Institute of Microelectronics and Key Laboratory of Microelectronic Devices and Circuits (MoE) Peking University Beijing Wuhan National High Magnetic Field Center and School of Electrical and Electronic Engineering Huazhong University of Science and Technology Wuhan China

In this work, ultrathin indium tin oxide (ITO) radio frequency (RF) transistors have been demonstrated for the first time, where inverted gate structure are used with a flexible polyimide substrate using magnetron sputtering at a thermal budget below 200 °C. The 160 nm channel length device exhibits excellent DC characteristics, including mobility of 26 cm 2 /V·s and an I on /I off ratio of 6.6×10 8 . A record-high extrinsic cut-off frequency (f T ) of 2.1 GHz and an extrinsic maximum oscillation frequency (f max ) of 3.7 GHz have also been obtained, which are more than one order of magnitude higher than previous results on flexible substrate. A high conversion gain of -20.9 dB has been achieved for the gigahertz frequency mixer based on flexible ITO RF transistor. Moreover, the stability of DC and RF performance under different bending conditions up to 50,000 bending cycles or down to 1 mm bending radius are studied without device failure.

关键词：

来源：评论

学校读者我要写书评

暂无评论

High performance optoelectronics based on CVD Mos2

High performance optoelectronics based on CVD Mos2

引用

International Conference on ASIC

作者： Qianlan Hu Zhenfeng Zhang Yanqing Wu Wuhan National High Magnetic Field Center and School of Optical and Electronic Information Huazhong University of Science & Technology Wuhan China Institute of Microelectronics and Key Laboratory of Microelectronic Devices and Circuits (MoE) Peking University Beijing China

Transition metal dichalcogenides (TMDs) are regarded as promising nano materials for next generation electronics and optoelectronics due to their ultrathin body nature and excellent transport properties. Here, single crystal growth of monolayer Mos 2 has been realized by controllable atmosphere pressure chemical vapor deposition (APCVD) method. The high-quality of Mos 2 grown directly on SiO 2 /Si substrate has been demonstrated by various material characterization methods. The fabricated optoelectronic device shows prominent photoresponse within a broadband spectrum range and a wide optical power range by taking advantage of the Schottky contact at source/drain electrodes. As a result, high photoresponsivity of 3×10 4 A/W as well as high photodetectivity up to 7×10 12 Jones have been achieved.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Design and simulation of a novel multi-floating-gate synaptic nanowire transistor for neuromorphic computing

Design and simulation of a novel multi-floating-gate synapti...

引用

International Conference on Solid-State and Integrated Circuit Technology

作者： Xiaokang Li Yuancheng Yang Gong Chen Shuang Sun Qifeng Cai Xiaoqiao Dong Xiaoyan Xu Xia An Ming Li Ru Huang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

In this paper, we proposed a novel multi-floating-gate synaptic nanowire transistor which can emulate synapses behaviors such as long-term potentiation (LTP), long-term depression (LTD), integration signals from multiple pre- synapses and successive synaptic weight modulation, it can also realize high density interconnection in current CMOS IC technology to build complex neural network. Meanwhile, a novel scheme was also proposed to simulate amplitude-adjustable function by properly controlling the polarity-gates. Therefore, the multiple synaptic behaviors can be realized by the proposed new device, making it a competitive candidate for neuromorphic systems.

关键词： Synapses Neuromorphics Nanobioscience Transistors Logic gates Mathematical model

来源：评论

学校读者我要写书评

暂无评论

ESD Robustness of Silicon Nanowire Transistor (SNWT) Combined with Thermal Analysis and Optimization

ESD Robustness of Silicon Nanowire Transistor (SNWT) Combine...

引用

International Conference on Solid-State and Integrated Circuit Technology

作者： Ming Li Jiewen Fan Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

In this paper, self-heating model of SNWT is studied. For the first time, the excellent heat dissipation per channel width for SNWT is disclosed. The special 2D heat dissipation mode is believed to be the reason. Accordingly, a novel SNWT was proposed to improve the ESD robustness of gate-grounded SNWT with removal of buried oxide under gate. Experiments show the record failure current density of 18.8mA/μm with 5nm diameter. Provided highly uniform nanowire array fabrication capability, SNWT can also achieve high total failure current and ESD voltage.

关键词： Electrostatic discharges Logic gates Thermal resistance Heating systems Performance evaluation Robustness

来源：评论

学校读者我要写书评

暂无评论

Design of low-power high-speed dual-modulus frequency divider with improved MOS current mode logic

Design of low-power high-speed dual-modulus frequency divide...

引用

IEEE Conference on Electron devices and Solid-State circuits

作者： Wanlu Wang Song Jia Tao Pan Yuan Wang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781538662359

One design technique that aims to reduce power consumption of MOS current mode logic dual-modulus frequency divider is presented in this paper. With combinational logic transferred the proposed scheme can obtain high working frequency. By merging the first master latches of CML DFFs, the simplified structure can achieve lower power consumption. Circuit simulation of the proposed structure in 28nm CMOS technology shows a 21% reduction of power consumption over conventional scheme is achieved at frequency of 56GHz.

关键词： Frequency conversion Latches Power demand Clocks CMOS technology Power dissipation Logic gates

来源：评论

学校读者我要写书评

暂无评论

A Millimeter-Wave SPDT Using Integrated Fan-Out Wafer Level Packaging

A Millimeter-Wave SPDT Using Integrated Fan-Out Wafer Level ...

引用

International Conference on Microwave and Millimeter Wave Technology Proceedings

作者： Xing Quan Yiqi Zhuang Jiang Luo Guodong Su School of Electro-Mechanical Engineering Xidian University Xian School of Microelectronics Xidian University Xian Nanjing Electronic Devices Institute Nanjing China Key Laboratory of RF Circuits and Systems Ministry of Education Hangzhou Dianzi University Hangzhou China

Integrated fan-out wafer level packaging (InFO-WLP) technology has the advantages in small form factor and high quality passive device. This paper proposes a single pole double throw switch (SPDT) which employs the λ/4 based structure using the InFO-WLP technology. The control device of the SPDT utilizes the 40 nm bulk CMOS process and the λ/4 transmission line is realized by the metal in redistribution layers (RDLs). The simulated results show the proposed SPDT achieves less than 2.1 dB insertion loss, better than 17.4 dB isolation and better than -10 return loss at 26-34 GHz. The SPDT has a compact silicon size of 190 μm×140 μm.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Low Voltage Dual-Modulus Frequency Divider Based on Extended True Single-Phase Clock Logic

Low Voltage Dual-Modulus Frequency Divider Based on Extended...

引用

IEEE Conference on Electron devices and Solid-State circuits

作者： Wanlu Wang Song Jia Ziyi Wang Tao Pan Yuan Wang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781538662359

Two low voltage dual-modulus frequency divider based on extended true single-phase clock (E-TSPC) logic are proposed. By reducing the number of serial transistors from VDD to GND, the proposed designs can effectively work at low voltage. Simulation results in SMIC 40nm technology show that the presented design I has better power and speed performance with lower supply voltage. Compared to the referenced designs, the presented design II can work at the lowest supply voltage with little loss of performance.

关键词： Low voltage Transistors Power demand Clocks Frequency conversion Robustness CMOS technology

来源：评论

学校读者我要写书评

暂无评论

Design of an Adaptive Loop Gain Controller Based on Auto-correlation Detection Scheme in All-Digital Phase-Locked Loop

Design of an Adaptive Loop Gain Controller Based on Auto-cor...

引用

International Conference on ASIC

作者： Sheng Zhang Song Jia Hanzun Zhang Rongshan Wei Weixin Gai Fuzhou University Fuzhou 350116 P.R. China Institute of Microelectronics Peking University Beijing P.R. China Key Laboratory of Microelectronics Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing P. R. China College of Physics and Information Engineering Fuzhou University Fuzhou P. R. China

In all-digital phase-locked loop (ADPLL), the optimal loop gain which minimize the phase noise becomes uncertain due to process, voltage, and temperature (PVT) variation. An adaptive loop gain controller (ALGC) used to automatically adjust the loop gain is proposed in this paper. The output pattern of bang-bang phase frequency detector (BBPFD) is correlated with the loop gain, so the ALGC structure can converge the gain to the optimum value by detecting the auto-correlation coefficient of BBPFD output. The simulation results show that the proposed ALGC structure can effectively reduce the output jitter.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Nonvolatile memristor as a new platform for non-von Neumann computing

Nonvolatile memristor as a new platform for non-von Neumann ...

引用

International Conference on Solid-State and Integrated Circuit Technology

作者： Liying Xu Lin Bao Teng Zhang Ke Yang Yimao Cai Yuchao Yang Ru Huang Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China

Nonvolatile logic based on memristors provides a promising approach toward efficient Non-von Neumann computing. Here we propose a methodology employing hybrid bipolar-unipolar memristive circuits for efficient in-memory logic functions. By combining the features of bipolar and unipolar memristors, the proposed circuits are able to execute both fundamental Boolean logic and arithmetic computing with high reconfigurability and high parallelism, which compares favorably with existing methods of in-memory logic based on memristors. This work could thus pave the way for the development of new in-memory computing architecture with high efficiency.

关键词： Memristors Adders Logic arrays Logic functions Logic gates Nonvolatile memory Parity check codes

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共43页 << < 11 12 13 14 15 16 17 18 19 20 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：