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IEEE International Symposium on circuits and Systems (ISCAS)

作者： Jiayi Wang Yongan Zheng Shi Wang Maoqiang Liu Huailin Liao Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781479983926

A novel human body channel (HBC) energy harvesting scheme for body sensor networks (BSNs) is proposed in this paper. Human body channel is utilized innovatively as energy transmission medium to reduce the transmission loss dramatically and eliminate influence of shadow effect. Further, a high sensitivity and efficiency rectifier is presented by introducing an effective threshold compensation circuit. Experimental results of the energy harvesting scheme show that it can supply 2-μW power typically at -5 dBm transmitted power and up to 19.5-μW at +7 dBm transmitted power by 30 cm distance of human body channel. The sensitivity of the proposed rectifier is -22.5 dBm with 1-V output voltage. When offering 5-μA output current, the rectifier can achieve 25.87% efficiency. The rectifier is implemented in a standard 0.18-μm CMOS process and operating frequency is 145 MHz.

关键词： Rectifiers Energy harvesting Propagation losses Sensitivity Batteries Threshold voltage CMOS integrated circuits

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A 0.5-2 GHz High Frequency Selectivity RF Front-End with Series N-path Filter

A 0.5-2 GHz High Frequency Selectivity RF Front-End with Ser...

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IEEE International Symposium on circuits and Systems

作者： Ying Guo Ling Shen Fan Yang Yongan Zheng Long Chen Xing Zhang Huailin Liao Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing 100871 China

ISBN: (纸本)9781479983926

This paper presents a 0.5-2GHz RF front-end with Series N-path Filter. With series 8-path filter applied, an ultimate rejection larger than 46 dB with 30 dB out-of-band rejection at 50 MHz offset is achieved. Dynamic power consumption is saved due to small filter switch size compared with parallel structures. Utilizing a tunable narrow band LNA in front of series N-path filter, 3rd harmonic rejection exceeding 54 dB with robust to process variation is realized. These techniques improve the front-end's adjacent and far-end frequency selectivity in RF domain, relaxing mixer's linearity design pressure. Implemented in 65 nm CMOS process, the frontend achieves a NF of 2.6-5.7 dB and maximum gain of 46-60 dB at 0.5-2 GHz, consuming 18-26 mW from 1.2 V voltage supply and occupies an area of 0.56 mm~2.

关键词： RFfront-end series N-path filter blocker tolerance frequency selectivity harmonic rejection multi-band receiver

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A Wide Band CMOS Radio Frequency RMS Power Detector with 42-dB Dynamic Range

A Wide Band CMOS Radio Frequency RMS Power Detector with 42-...

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IEEE International Symposium on circuits and Systems

作者： Jiayi Wang Yongan Zheng Fan Yang Fan Tian Huailin Liao Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing 100871 China

ISBN: (纸本)9781479983926

A wide band radio frequency (RF) root-mean-square (RMS) power detector (PD) is presented in this paper. A CMOS rectifier with unbalanced source-coupled pairs and auxiliary capacitors is utilized to constitute the reverse received signal strength indicator (reverse-RSSI) architecture as proposed power detector with operating frequency from 300 MHz to 10 GHz. The auxiliary capacitors are introduced to improve linearity at high input power dramatically. The power detector can be connected to power amplifier without directional coupler due to the capacitor attenuation array. Simulation results show that the maximum detection power is as high as +30 dBm and dynamic range reaches more than 42 dB with ±1 dB error. The proposed power detector is implemented in a standard 180nm CMOS process with 0.113 mm~2 core area. The supply voltage is 3.3 V, and its static power consumption is 0.55 mW.

关键词： Detectors Rectifiers Capacitors Attenuation Radio frequency CMOS integrated circuits Arrays

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Low Frequency Noise Measurements as a Characterization Tool for Reliability Assessment in AlGaN/GaN High-Electron-Mobility Transistors (HEMTs)

Low Frequency Noise Measurements as a Characterization Tool ...

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IEEE International Conference on Power Electronics and Drive Systems

作者： Miao Zhao Xinyu Liu Ke Wei Zhi Jin Microwave devices and integrated circuits department Key Laboratory of Microelectronics Device & Integrated Technology Institute of Microelectronics of the Chinese Academy of Sciences

ISBN: (纸本)9781479944019

AlGaN/GaN High-Electron-Mobility Transistors (HEMTs) have received considerable attention for the material advantages. Even though some improvements were achieved recently by various approaches, GaN-based devices are still far to be as reliable as other devices. The low frequency noise measurement technology is a powerful tool to study the most frequent causes of failure in compound semiconductors. In this paper, low frequency noise measurements were performed on AlGaN/GaN high-electron-mobility transistors (HEMTs) under different bias over the entire frequency range of 1Hz-100kHz. The transistor parameters and the drain noise spectra were presented. The noise spectra exhibited frequency dependence on the biasing point, and the drain current noise measurements are performed to analyze the origins of noise in channel or access regions.

关键词： Noise Gallium nitride HEMTs Logic gates Lighting Frequency measurement Noise measurement

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100-nm T-gate InAlAs/InGaAs InP-based HEMTs with f_T = 249 GHz and f_(max) = 415 GHz

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Chinese Physics B 2014年第3期23卷 613-618页

作者：汪丽丹丁芃苏永波陈娇张毕禅金智 Microware Devices and Integrated Circuits Department Key Laboratory of Microelectronics Device and Integrated TechnologyInstitute of Microelectronics Chinese Academy of Sciences

InA1As/InGaAs high electron mobility transistors （HEMTs） on an InP substrate with well-balanced cutoff frequency fT and maximum oscillation frequency frnax are reported. An InA1As/InGaAs HEMT with 100-nm gate length and gate width of 2 × 50 μm shows excellent DC characteristics, including full channel current of 724 mA/mm, extrinsic maximum transconductance *** of 1051 mS/mm, and drain-gate breakdown voltage BVDG of 5.92 V. In addition, this device exhibits fT = 249 GHz and fmax = 415 GHz. These results were obtained by fabricating an asymmetrically recessed gate and minimizing the parasitic resistances. The specific Ohmic contact resistance was reduced to 0.031 ***. Moreover, the fT obtained in this work is the highest ever reported in 100-nm gate length InA1As/InGaAs InP-based HEMTs. The outstanding ***, fT, fmax, and good BVDG make the device suitable for applications in low noise amplifiers, power amplifiers, and high speed circuits.

关键词： InP high electron mobility transistor asymmetrically recessed gate cutoff frequency fx maximumoscillation frequency fmax

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Novel silicon-controlled rectifier(SCR) for digital and high-voltage ESD power supply clamp

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Science China(Information Sciences) 2014年第2期57卷 291-296页

作者： ZHANG Peng WANG Yuan ZHANG Xing MA XiaoHua HAO Yue Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices School of MicroelectronicsXidian University Key Laboratory of Microelectronic Devices and Circuits Institute of MicroelectronicsPeking University

Due to latch-up issue,the main problem of silicon-controlled rectifier(SCR)for power supply clamps in on-chip ESD protection is its inherent low holding voltage,especially in high-voltage *** this paper,we proposed a MOS-inside SCR(MISCR)showing nearly no snapback character and good ESD robustness,which is qualified for on-chip power clamp ESD *** stacked device achieves a series of triggering and holding voltage by altering the stacking number,which can also be used for the high voltage ESD power supply clamp applications.

关键词： electrostatic discharge(ESD) SCR latch-up immunity holding voltage power supply clamp high voltage

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Understanding of HCI degradation temperature dependence in SOI STI-pLDMOSFETs from MR-DCIV spectroscopy

Understanding of HCI degradation temperature dependence in S...

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International Symposium on Physical & Failure Analysis of Integrated circuits

作者： Yandong He Ganggang Zhang Xing Zhang Institute of Microelectronics and Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing P.R. China

Temperature dependence of HCI degradation in SOI STI-pLDMOSFETs had been investigated by MR-DCIV method. The temperature-driven interface trap generation was clearly revealed under V gmax HCI and NBTI stress for single/multi-finger layout device. The self-heating-enhanced degradation was associated with the interface trap generation in channel and accumulation regions and shared NBTI degradation mechanism.

关键词： Decision support systems

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Self-heating enhanced HCI degradation in pLDMOSFETs

Self-heating enhanced HCI degradation in pLDMOSFETs

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International Symposium on Power Semiconductor devices and Ics (ISPSD)

作者： Yandong He Ganggang Zhang Xing Zhang Institute of Microelectronics and Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing P. R. China

ISBN: (纸本)9781479962624

The interface trap generation under V gmax HCI stresses in pLDMOSFETs has been studied using non-destructive multi-region direct-current current-voltage (MR-DCIV) technique. Several times larger MR-DCIV degradation per finger was observed for multi-finger devices. Folded-gate layout device suffered more self-heating induced degradation. Our study results reveal that those effects shared the similar trends and mechanism with NBTI degradation. The self-heating enhanced degradation in multi-finger devices was due to the higher temperature rise and less channel edge heat dissipation. The impact of device layout on the HCI degradation has also been investigated. Our results suggested that the unfolded device layout can reduce self-heating enhanced V gmax HCI degradation.

关键词： Stress Degradation Human computer interaction Fingers Layout Logic gates Voltage measurement

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180.5Mbps-8Gbps DLL-Based Clock and Data Recovery Circuit with Low Jitter Performance

180.5Mbps-8Gbps DLL-Based Clock and Data Recovery Circuit wi...

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IEEE International Symposium on circuits and Systems

作者： Yuequan Liu Yuan Wang Song Jia Xing Zhang Key Laboratory of Microelectronic Devices and Circuits (MoE) Institute of Microelectronics Peking University 100871 Beijing P.R. China

ISBN: (纸本)9781479983926

A wide range delay-locked loop (DLL) based clock and data recovery (CDR) circuit including coarse and fine tune blocks is proposed in this paper. The coarse tune block adopts a time to digital converter and digital control delay line to widen the frequency capture range, reduce locking time and prevent the false locking problem. In the fine tune block, a novel phase detector combines the tasks of sampling and charge-pump using half rate clock. Starting-control circuit can ensure CDR takes full use of the delay range provided by voltage control delay line. Moreover, a fully analog DLL technique is applied to exploit the benefits of low skew and jitter performance. The simulation result shows the proposed CDR can cover a wide frequency range from 180.5Mbps to 8Gbps, while the peak-to-peak jitter of recovery clock is 2.7ps at 200Mbps and 1.06ps at 8Gbps. Fabricated in a 65nm CMOS process, this design dissipates 9.9mW and 22.9mW respectively at 200 Mbps and 8Gbps from a 1.2 V supply.

关键词： Clock and data recovery (CDR) wide-range delay-locked loop (DLL) low jitter time-to-digital converter (TDC)

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Phonon-Limited Electron Mobility in Single-Layer MoS2

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Chinese Physics Letters 2014年第2期31卷 101-104页

作者：曾琅辛争陈少闻杜刚康晋锋刘晓彦 Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing 100871 Yuanpei College Peking University Beijing 100871

The dynamics of electron transport in single-layer MoS2 is simulated by employing the single particle Monte Carlo method. Acoustic phonon scattering, optical phonon scattering and Frohlich scattering are taken into account. It is found that the electron mobility decreases from 806cm2 /V.s for a transverse electrical field of 103 Vim to 426/112 cm2 /V.s for a transverse electrical field of 105/107 Vim. Further detailed analysis on carrier dynamics reveals that the low field mobility is dominated by the acoustic phonon scattering while the role of optical phonon scattering is to relax the electron energy below the optical phonon energy by efficient energy relaxation through optical phonon emission. Only when the transverse electrical field is larger than 106 V/m, the mobility can be determined by the optical phonon scattering, leading to a strong mobility degradation.

关键词： PHONONS -- Scattering ELECTRON mobility ELECTRON transport ELECTRIC fields PHONON emissions ACOUSTIC phonons

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