A TDC based process variation sensing circuit for monitoring the variation of both NMOS and PMOS is proposed. The digital outputs of this sensor can offer the circuit designer clear message that indicates the variatio...
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ISBN:
(纸本)9781479923366
A TDC based process variation sensing circuit for monitoring the variation of both NMOS and PMOS is proposed. The digital outputs of this sensor can offer the circuit designer clear message that indicates the variation of both NMOS and PMOS. Based on the specific inverter chain design concept, this sensor demonstrated with better sensitivity. 10000 Monte Carlo Simulation based on 65nm bulk CMOS process technology is used to verify the feasibility of this sensor.
This paper presents a test circuit which can be used to analyze the p-MOSFET threshold voltage (VT) shift and fluctuation. The proposed circuit includes two p-MOSFETs, series connection. Using the circuit, we can dire...
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A ring oscillator based structure in digital circuits is presented for measuring NBTI and PBTI effects. The proposed test structure enables simultaneous stress of all devices under tests in either NBTI or PBTI mode an...
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A new test structure and spectroscopic characterization method for monitoring interface traps in MOSFETs is proposed, which can be used to directly evaluate the interface traps on both n- and p-type Si/SiO_2 interface...
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ISBN:
(纸本)9781479901128
A new test structure and spectroscopic characterization method for monitoring interface traps in MOSFETs is proposed, which can be used to directly evaluate the interface traps on both n- and p-type Si/SiO_2 interfaces through one-time direct current IV measurement. Based on the structure design and testing setup, a two-peak spectrum can be obtained. The properties of interface traps on both n- and p-type Si/SiO_2 interfaces can be distinguished by the peak height and position. Some effects on the spectroscopic method by the test structure design parameters have been studied systematically. Its application in reliability research was demonstrated.
A probing technique, multi-region DCIV spectroscopy, has been investigated systematically. This non-destructive method demonstrated the attractive capability on profiling the interface states overall in STI-based LDMO...
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ISBN:
(纸本)9781479901128
A probing technique, multi-region DCIV spectroscopy, has been investigated systematically. This non-destructive method demonstrated the attractive capability on profiling the interface states overall in STI-based LDMOSFETs. The sensitivity on the interface state generation at channel and accumulation region was superior to the conventional Id-Vg method. Based on the device characterization and stress tests, the dependence of spectroscopic features on channel, accumulation and poly overlap length was investigated and verified. The optimum device design to suppress device degradation was proposed.
A novel multi-RC-triggered power clamp circuit is proposed in this paper. Effective capacitances of capacitors are multiplied by current mirrors and a modified asymmetric phase inverter is employed in the proposed cir...
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A novel multi-RC-triggered power clamp circuit is proposed in this paper. Effective capacitances of capacitors are multiplied by current mirrors and a modified asymmetric phase inverter is employed in the proposed circuit. Simulation and test results verify that the proposed circuit maintains enhanced ESD protection robustness with reduced chip-area.
A wide-tuning-range and low-phase-noise LC voltage controlled oscillator (VCO) is presented in this paper. With the variable current source and source damping resistor, the proposed VCO exhibits a phase noise of -115d...
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ISBN:
(纸本)9781467325240
A wide-tuning-range and low-phase-noise LC voltage controlled oscillator (VCO) is presented in this paper. With the variable current source and source damping resistor, the proposed VCO exhibits a phase noise of -115dBc/Hz at 1MHz offset from 6 GHz carrier, and a power dissipation of 1.4mW. In addition, its tuning range is from 4.9 to 6.9 GHz with the MIM capacitor bank and differentially controlled varactors. The capacitor bank is used for wide tuning range and the differentially controlled varactors are useful for suppressing power supply noise.
A half-rate 4-tap decision feedback equalizer (DFE) is implemented in 0.13μm CMOS technology for low-power I/O links. Modified current-mode logic (CML) latches with PMOS loads are used in the new proposed DFE to achi...
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ISBN:
(纸本)9781467325240
A half-rate 4-tap decision feedback equalizer (DFE) is implemented in 0.13μm CMOS technology for low-power I/O links. Modified current-mode logic (CML) latches with PMOS loads are used in the new proposed DFE to achieve better power and area efficiency. The proposed DFE consumes only 1.914mW from a 1.2V supply when equalizing 6.25Gb/s data passing through a simulated low-pass channel with 18 dB of loss at 3.125 GHz, which is 39.5% lower than the traditional design with resistor loaded CML latches.
In this study, the physics-based device simulation tool Silvaco ATLAS is used to characterize the electrical properties of an AlGaN/GaN high electron mobility transistor （HEMT） with a U-type gate foot. The U-gate Al...
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In this study, the physics-based device simulation tool Silvaco ATLAS is used to characterize the electrical properties of an AlGaN/GaN high electron mobility transistor （HEMT） with a U-type gate foot. The U-gate AlGaN/GaN HEMT mainly features a gradually changed sidewall angle, which effectively mitigates the electric field in the channel, thus obtaining enhanced off-state breakdown characteristics. At the same time, only a small additional gate capacitance and decreased gate resistance ensure excellent RF characteristics for the U-gate device. U-gate AlGaN/GaN HEMTs are feasible through adjusting the etching conditions of an inductively coupled plasma system, without introducing any extra process steps. The simulation results are confirmed by experimental measurements. These features indicate that U-gate A1GaN/GaN HEMTs might be promising candidates for use in millimeter-wave power applications.
Gate-recessed AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) on sapphire substrates are *** devices with a gate length of 160nm and a gate periphery of 2 × 75μmexhibit two orde...
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Gate-recessed AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) on sapphire substrates are *** devices with a gate length of 160nm and a gate periphery of 2 × 75μmexhibit two orders of magnitude reduction in gate leakage current and enhanced off-state breakdown characteristics,compared with conventional ***,the extrinsic transconductance of an MOSHEMT is 237.2mS/mm,only 7% lower than that of Schottky-gate *** extrinsic current gain cutoff frequency fT of 65 GHz and a maximum oscillation frequency fmax of 123 GHz are deduced from rf small signal *** high fmax demonstrates that gate-recessed MOSHEMTs are of great potential in millimeter wave frequencies.
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