In this study, Ti/Al/Ni/Au Ohmic contact to AlGaN/GaN high electron mobility transistors was fabricated and demonstrated distribution of bright and dark areas on the surface. Surface element analyses show that it is o...
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In this study, Ti/Al/Ni/Au Ohmic contact to AlGaN/GaN high electron mobility transistors was fabricated and demonstrated distribution of bright and dark areas on the surface. Surface element analyses show that it is of great difference in the Ni and Au content between these two kinds of regions. According to transmission electron microscopy and corresponding Electron dispersive x-ray spectroscopy analyses, plenty of Ni was detected in dislocation rich regions while rare Ni was left in dislocation free regions so that Au tended to accumulate in the form of AlAu x binary alloy. The surface nonuniformity presented on the surface should be attributed to the nonuniform interfacial reactions resulted from the dislocations.
This paper presents the design method and implementation of a wide dynamic range transimpedance amplifier (TIA) with high gain-bandwidth product (GBW) based on 1μm GaAs process of WIN company. The wide dynamic range ...
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This paper presents the design method and implementation of a wide dynamic range transimpedance amplifier (TIA) with high gain-bandwidth product (GBW) based on 1μm GaAs process of WIN company. The wide dynamic range results from the utilization of a parallel feedback structure that divides the input current when it is large. And the high GBW owes to the limiting amplifier (LA) which functions as a gain stage based on a modified Cherry-Hopper amplifier. The proposed TIA achieves a maximum input current of 3.5 mA and a transimpedance of 68.6 dBΩ and a bandwidth of 10.9 GHz.
Silicon nanowire arrays(SiNWAs) are fabricated on polished pyramids of textured Si using an aqueous chemical etching *** silicon nanowires themselves or hybrid structures of nanowires and pyramids both show strong a...
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Silicon nanowire arrays(SiNWAs) are fabricated on polished pyramids of textured Si using an aqueous chemical etching *** silicon nanowires themselves or hybrid structures of nanowires and pyramids both show strong anti-reflectance abilities in the wavelength region of 300-1000 nm,and reflectances of 2.52%and less than 8%are achieved,respectively.A 12.45%SiNWAs-textured solar cell(SC) with a short circuit current of 34.82 mA/cm^2 and open circuit voltage(K_(oc)) of 594 mV was fabricated on 125×125 mm^2 Si using a conventional process including metal grid *** is revealed that passivation is essential for hybrid structure textured SCs,and K_(oc) can be enlarged by 28.6%from 420 V to 560 mV after the passivation layer is *** loss mechanism of SiNWA SC was investigated in detail by systematic comparison of the basic parameters and external quantum efficiency(EQE) of samples with different fabrication *** is proved that surface passivation and fabrication of a metal grid are critical for high efficiency SiNWA SC,and the performance of SiNWA SC could be improved when fabricated on a substrate with an initial PN junction.
A novel Dynamic Element Matching(DEM)method is presented to improve the static and dynamic performance of Nyquist-rate current-steering digital to analog converter(DAC).Compared to conventional DEM methods,this ap...
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ISBN:
(纸本)9781467324748
A novel Dynamic Element Matching(DEM)method is presented to improve the static and dynamic performance of Nyquist-rate current-steering digital to analog converter(DAC).Compared to conventional DEM methods,this approach only increases or decreases the number of selected unit current sources randomly when the input code ***,signal dependent distortions can be eliminated efficiently at high sampling frequencies.A 6-bit current-steering DAC model adopting the proposed DEM coding method was built up to verify the performance in *** could reach a better SFDR(56dB)value and a better DNL(0.26LSB) and INL(0.45LSB)value compared with traditional DEM methods.
A phase interpolator(PI)-based clock data recovery(CDR)circuit for RapidIO application is presented,which avoids the coupled interference of *** the integration of a digital control cell,the complex and area consu...
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ISBN:
(纸本)9781467324748
A phase interpolator(PI)-based clock data recovery(CDR)circuit for RapidIO application is presented,which avoids the coupled interference of *** the integration of a digital control cell,the complex and area consumption has been reduced *** adaptive bandwidth PLL structure is adopted so that it can provide clocks of three frequencies while maintain a good jitter *** a 0.13um CMOS process,the circuit has a jitter of 11.2ps@3.125Gbps with a power consumption of 21.7mW under 1.2V,and the core circuit area is 0.16mm2.
A two-stage charge sensitive amplifier structure suitable for silicon radiation detector with large capacitance is *** has the advantage that the integration capacitor can be large to reduce the gain sensibility to de...
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ISBN:
(纸本)9781467324748
A two-stage charge sensitive amplifier structure suitable for silicon radiation detector with large capacitance is *** has the advantage that the integration capacitor can be large to reduce the gain sensibility to detector capacitance variation without any stability *** feasibility of the proposed circuit is verified by comparing the simulation results with the conventional one-stage charge sensitive amplifier.A prototype of 16-channel readout circuit for electron collection has been taped out in a 0.35μm CMOS technology with a power supply of *** area is 2.5×1.54mm 2 with 42 pads and the power dissipation is 60mW.
A readout integrated circuit(ROIC)for uncooled infrared focal plane array(IRFPA)is presented in this *** ROIC is designed for a 384×288 detector array made of amorphous silicon microbolometers with a pixel-pi...
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ISBN:
(纸本)9781467324748
A readout integrated circuit(ROIC)for uncooled infrared focal plane array(IRFPA)is presented in this *** ROIC is designed for a 384×288 detector array made of amorphous silicon microbolometers with a pixel-pitch of 35μm.A capacitive trans-impedance amplifier(CTIA)is used in each column to integrate the pixel *** design is tuned on a detailed theoretical analysis of the sensor signal and noise *** chip has been fabricated using a 0.35μm 2P4M CMOS process under 5V supply *** ROIC can operate at a data rate of 7MHz,achieving a frame rate of 60Hz and the total power dissipation is less than 108mW.A 32×32 experimental chip has been tested.
In this paper,heavy-ion-induced permanent damage in fully depleted silicon-on-insulator(FD SOI) devices are *** exposure to heavy ions, the characteristics degradation of FD SOI nMOSFET are presented,which is due to...
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ISBN:
(纸本)9781467324748
In this paper,heavy-ion-induced permanent damage in fully depleted silicon-on-insulator(FD SOI) devices are *** exposure to heavy ions, the characteristics degradation of FD SOI nMOSFET are presented,which is due to the microdose effect in the oxide layer and the displacement damage in silicon ***,the measured results also exhibit strong device geometry *** electrical properties degradation such as the off-state leakage current and the on-state current become more serious with the gate length or gate width decreasing,which indicates that the heavy-ion-induced damage in ultra-deep submicron FD SOI devices can not be ignored and should be paid more attention for radiation hardened applications.
Multilevel cell storage allows two or more bits to be stored in one cell,thus reducing almost 50% of Flash memory's area without technology shrinkage. Basic concepts like sensing schemes in multilevel Flash memory...
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ISBN:
(纸本)9781467324748
Multilevel cell storage allows two or more bits to be stored in one cell,thus reducing almost 50% of Flash memory's area without technology shrinkage. Basic concepts like sensing schemes in multilevel Flash memory are fundamental and need further *** this paper,an innovative sensing architecture is presented,with the name of serial-parallel sensing scheme,which provides fast read speed and a medium area cost and power consumption,compared with conventional parallel and serial sensing *** 65nm technology,the new architecture performs well, almost five times as fast as serial sensing and has advantage over parallel sensing in both area and power consumption cost.
For the silicided GGnMOS as ESD protection device, the current localization in the n+ diffusion duo to the short contact spacing often degrades the ESD performance of the device. By enlarging the contact spacing, ball...
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