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International Conference on ASIC

作者： Peng Zhang Yuan Wang Song Jia Xing Zhang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

A novel layout strategy for on-chip ESD protection application is presented to solve the non-uniformity turn-on phenomenon of multi-finger gate-grounded nMOS (GGnMOS). The multi-finger gates as well as drains and sources are connected in serrate type. The whole multi-finger device acts as singer finger with large gate width. After realized in 0.13μm craft and tested under TLP method, the It2 per unit channel width of the novel GGnMOSs are much higher than those of the traditional GGnMOSs by this simply approach.

关键词： Fingers Nonhomogeneous media Integrated circuits MOSFET circuits Robustness

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New understanding of the statistics of random telegraph noise in Si nanowire transistors - the role of quantum confinement and non-stationary effects

New understanding of the statistics of random telegraph nois...

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International Electron devices Meeting (IEDM)

作者： Changze Liu Runsheng Wang Jibin Zou Ru Huang Chunhui Fan Lijie Zhang Jiewen Fan Yujie Ai Yangyuan Wang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

In this paper, the random telegraph noise (RTN) statistics in silicon nanowire transistors (SNWTs) are comprehensively studied. The capture/emission time constants and probabilities are found to be strongly impacted by the quantum confinement in SNWTs, which cannot be fully explained by classical RTN theory. A full quantum RTN model for SNWTs is proposed for fundamental understanding of the experiments. The characteristics of non-stationary RTN in SNWTs under high-field biases are studied for the first time, based on the developed statistical trap-response (STR) characterization method. The trap capture probability is found to be much different from that of the quasi-stationary RTN, leading to large errors in circuit aging prediction if using traditional RTN distributions. These new understandings are critical for robust SNWT circuit design against RTN.

关键词： Temperature measurement Potential well Stress Logic gates Weibull distribution Time measurement

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Self-depleted T-gate Schottky barrier tunneling FET with low average subthreshold slope and high ION/IOFF by gate configuration and barrier modulation

Self-depleted T-gate Schottky barrier tunneling FET with low...

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International Electron devices Meeting (IEDM)

作者： Qianqian Huang Zhan Zhan Ru Huang Xiang Mao Lijie Zhang Yingxin Qiu Yangyuan Wang Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781457705069

In this paper, a novel silicon-based T-gate Schottky barrier tunneling FET (TSB-TFET) is proposed and experimentally demonstrated. With enhanced electric field at source side through gate configuration for steeper subthreshold slope (SS), the device with self-depleted structure can effectively suppress the leakage current and simultaneously achieve the dominant Schottky barrier tunneling current for high ON-current without area penalty, which can alleviate the problems in silicon TFET. In addition, the proposed TSB-TFET can have comparable DIBL effect and reduced gate-to-drain capacitance compared with traditional TFET. Further device optimization is experimentally achieved by extended multi-finger gate configuration of the same footprint and barrier modulation by dopant segregation Schottky technology. With compatible bulk CMOS technology, the fabricated device can achieve steep SS over almost 5 decades of current, as well as high I ON /I OFF ratio (~10 7 ). The proposed device with high compatibility is very promising for future low power system applications.

关键词： Logic gates Schottky barriers Voltage measurement Tunneling Junctions Electric fields Temperature measurement

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A novel dynamic element matching technique in current-steering DAC

A novel dynamic element matching technique in current-steeri...

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IEEE Conference on Electron devices and Solid-State circuits

作者： Wei Su Yuan Wang Junlei Zhao Song Jia Xing Zhang Key Laboratory of Microelectronic Devices and Circuits (MOB) Institute of Microelectronics Peking University Beijing China

This paper presents a novel dynamic element matching (DEM) method called Thermo Data Weighted Average (TDWA) for Nyquist-rate current - steering digital to analog converter (DAC). When the input code changes, it only increase or decrease the number of unit current source which is be chosen. This approach can reach a better static performance than full random DEM technique but also eliminate signal dependent distortions to achieve good linearity at high sampling frequencies as other DEM implementations.

关键词： Encoding Switches Simulation Digital-analog conversion microelectronics Linearity Distortion

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Design and test results of a low-noise readout integrated circuit for high-energy particle detectors

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Nuclear Science and Techniques 2010年第1期21卷 44-48页

作者： ZHANG Mingming CHEN Zhongjian ZHANG Yacong LU Wengao JI Lijiu Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing 100871 China

A low-noise readout integrated circuit for high-energy particle detector is *** noise of charge sensitive amplifier was suppressed by using single-side amplifier and resistors as source ***-time semi-Gaussian filter is chosen to avoid switch *** peaking time of pulse shaper and the gain can be programmed to satisfy *** readout integrated circuit has been designed and fabricated using a 0.35 μm double-poly triple-metal CMOS *** results show the functions of the readout integrated circuit are *** equivalent noise charge with no detector connected is 500–700 e in the typical mode,the gain is tunable within 13–130 mV/fC and the peaking time varies from 0.7 to 1.6 μs,in which the average gain is about 20.5 mV/fC,and the linearity reaches 99.2%.

关键词：读出集成电路高能粒子探测器低噪声设计测试 CMOS工艺峰值时间单端放大器

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Valence band variation in Si(110) nanowire induced by a covered insulator

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Chinese Physics B 2010年第1期19卷 398-402页

作者：许洪华刘晓彦何毓辉樊春杜刚孙爱东韩汝琦康晋锋 Institute of Microelectronics Peking University & Key Laboratory of Microelectronic Devices and CircuitsMinistry of Education Computer Center of Peking University

In this work, we investigate strain effects induced by the deposition of gate dielectrics on the valence band structures in Si （110） nanowire via the simulation of strain distribution and the calculation of a generalized 6 × 6k .p strained valence band. The nanowire is surrounded by the gate dielectric. Our simulation indicates that the strain of the amorphous SiO2 insulator is negligible without considering temperature factors. On the other hand, the thermal residual strain in a nanowire with amorphous SiO2 insulator which has negligible lattice misfit strain pushes the valence subbands upwards by chemical vapour deposition and downwards by thermal oxidation treatment. In contrast with the strain of the amorphous SiO2 insulator, the strain of the HfO2 gate insulator in Si （110） nanowire pushes the valence subbands upwards remarkably. The thermal residual strain by HfO2 insulator contributes to the up-shifting tendency. Our simulation results for valence band shifting and warping in Si nanowires can provide useful guidance for further nanowire device design.

关键词： silicon nanowire valence band thermal residual strain

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Oxide-based RRAM: Unified microscopic principle for both unipolar and bipolar switching

Oxide-based RRAM: Unified microscopic principle for both uni...

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International Electron devices Meeting (IEDM)

作者： B. Gao J. F. Kang Y. S. Chen F. F. Zhang B. Chen P. Huang L. F. Liu X. Y. Liu Y. Y. Wang X. A. Tran Z. R. Wang H. Y. Yu Albert Chin Institute of Microelectronics Key Laboratory of Microelectronic Devices and Circuits Ministry of Education Peking University Beijing China School of EEE Nanyang Technological University Singapore Singapore Department of Electronics Engineering National Chiao-Tung University Hsinchu Taiwan

A unified microscopic principle is proposed to clarify resistive switching behaviors of transition metal oxide based resistive random access memories (RRAM) for the first time. In this unified microscopic principle, both unipolar and bipolar switching characteristics of RRAM are correlated with the distribution of localized oxygen vacancies in the oxide switching layer, which is governed by the generation and recombination with dissociative oxygen ions. Based on the proposed microscopic principle, an atomistic simulation method is developed to evaluate critical memory performance, and successfully conduct the device optimization. The experimental data are well in line with the developed simulation method.

关键词： Switches Voltage measurement Resistance Mathematical model Microscopy Hafnium oxide

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A versatile 16-channel front-end integrated circuit for semiconductor radiation detectors

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Nuclear Science and Techniques 2010年第2期21卷 118-122页

作者： ZHANG Yacong CHEN Zhongjian LU Wengao AN Huiyao JIN Ye JI Lijiu Key Laboratory of Microelectronie Devices and Circuits Institute of Microelectronics Peking University 100871 China Institute of Electronics Peking University 100871 China

A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a peak detect and hold circuit and a discriminator, while analog voltage and channel address are routed off the chip. It can accommodate both electron and hole collection with selectable gain and peaking time. Sequential and sparse readout, combining with self-trigger and external trigger, makes four readout modes. The circuit is implemented in a 0.35 μm DP4M (double-poly-quad-metal) CMOS technology with an area of 2.5×1.54 mm2 and power dissipation of 60 mW. A single channel chip is tested with Verigy 93000. The gain is adjustable from 13 to 130 mV·fC–1 while the peaking time varies between 0.7 and 1.6 μs. The linearity is more than 99% and the equivalent noise charge is about 600e.

关键词：辐射探测器集成电路 16通道半导体前端电荷灵敏放大器 CMOS技术模拟通道

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Buffer design based on flow control in RapidIO

Buffer design based on flow control in RapidIO

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2nd Asia Pacific Conference on Postgraduate Research in microelectronics and Electronics, PrimeAsia 2010

作者： Zhao, Xiongbo Jia, Song Wang, Yuan Wu, Guirong Wu, Fengfeng Yang, Kai Key Laboratory of Microelectronics Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781424467372

RapidIO is an open standard that provides high-performance interconnect for chip-to-chip, board-to-board, and chassis-to-chassis communications. In this paper, we present an executable RapidIO interconnect in which an improved Buffer structure based on flow control is put forward. It helps to provide a smooth data flow, strong built-in error detection and error recovery mechanisms. It is tested to increase utilization and lower packet latency. And it can be applied to reliable and high speed embedded system communications.

关键词： Chassis

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Two effective single-loop high-performance sigma-delta modulators based on 0.13μm CMOS

Two effective single-loop high-performance sigma-delta modul...

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2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

作者： Li, Hongyi Wang, Yuan Jia, Song Zhang, Xing Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China

ISBN: (纸本)9781424457984

In this paper, two high-resolution mediumbandwidth single-loop 4 th-order single-bit sigma-delta modulators using a feed-forward and a feedback topology respectively are implemented in 0.13μm CMOS technology. The oversampling ratio is 50 with 312.5kHz input bandwidth, 14.66-bit and 16.62-bit resolution have been reached. The two circuits each consume about 8-mW from a single 1.2V supply voltage. After simulation, under the same circuit conditions, feedback structure gives better performance than feed-forward one. The experiment result could be a useful reference for the topology choice. ©2010 IEEE.

关键词： CMOS integrated circuits

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