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IEEE Workshop on Program Comprehension

作者： B. Di Martino G. Iannello Dip. di Informatica e Sistemistica Università di Napoli Federico II Napoli Italy Institute for Software Tech. and Parallel Systems University of Technology Vienna Vienna Austria

Techniques for automatic program comprehension can play a crucial role in overcoming limitations of existing tools for the automatic parallelization of programs for distributed-memory architectures. Uses of a program recognition-based parallelization procedure could range from the automatic selection of a data distribution, via the automatic selection of sequences of optimizing transformations of the sequential code, via the code replacement with optimized parallel libraries, up to the automatic selection of the parallel execution model that is best suited to the algorithm to be parallelized and to the target parallel architecture. This paper presents the implementation of a prototype tool for the recognition of parallelizable algorithmic patterns (PAP Recognizer), which has been integrated into the Vienna Fortran Compilation System, an interactive compilation system for scalable architectures. The distinctive features of the approach are discussed and the way the recognizer works is described with respect to a working example.

关键词： Pattern recognition Prototypes Performance analysis Libraries Target recognition parallel architectures Automatic control Reverse engineering Proposals parallel programming

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Specification of performance problems in MPI programs with ASL

Specification of performance problems in MPI programs with A...

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International Conference on parallel Processing (ICPP)

作者： T. Fahringer M. Gerndt G. Riley J.L. Traff Institute for Software Technology and Parallel Systems University of Technology Vienna Austria Central Institute for Applied Mathematics Research Centre Juelich GmbH Germany Department of Computer Science University of Manchester Institute of Science and Technology UK C&C Research Laboratories NEC Europe Limited Germany

Performance analysis is an important step in tuning performance critical applications. It is a cyclic process of measuring and analyzing performance data which is driven by the programmers hypotheses on potential performance problems. Currently this process is controlled manually by the programmer. The implicit knowledge applied in this cyclic process must be formalized in order to be reused in the automation of performance analysis tools. This article describes the performance property specification language ASL developed in the APART Esprit IV working group. ASL allows the specification of performance data via an object model and of performance properties via a specially designed notation. Performance bottlenecks can then be identified based on the specification since bottlenecks are viewed as performance properties with a huge negative impact. We present the ASL language in the context of MPI applications.

关键词： Performance analysis Programming profession Data analysis Specification languages Object oriented modeling software performance Computer science Application software Automatic control Process control

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DeHiFo-an advanced HPF debugging system

DeHiFo-an advanced HPF debugging system

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Euromicro Workshop on parallel and Distributed Processing

作者： P. Brezany S. Grabner K. Sowa R. Wismuller Institute for Software Technology and Parallel Systems University of Technology Vienna Vienna Austria Johannes Kepler University Linz GUP Linz Linz Austria Lehrstuhl für Rechnertechnik und Rechnerorganisation (LRR-TUM) Technische Universität München Munich Germany

Debuggers are critical tools for software development. The design and implementation of a source-level debugging system that enables the HPF programmer to observe the behavior of the program at the level at which the program has been developed present unique challenges. The main requirement put on an HPF debugger is to observe and control the state of many processors, to summarize and present distributed information in a concise and clear way, in terms of the source program. To be practical, the debugger has to support interactive source-level debugging of large-scale applications on large machines. In this paper we define design goals for HPF debuggers and present an architecture of an advanced HPF debugging system DeHiFo, which addresses several challenges involved and provides significant contributions to existing debugging technology. An HPF debugger is a rather complex system. Its development requires a systematic cooperation between several partners. DeHiFo is an excellent example of cooperation and technology transfer among research teams working at different universities.

关键词： Debugging Program processors Programming profession Ear Electronic switching systems Writing parallel architectures Computer bugs Control systems Data visualization

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Formalizing Cost Fairness for Two-Party Exchange Protocols using Game Theory and Applications to Blockchain

Formalizing Cost Fairness for Two-Party Exchange Protocols u...

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IEEE International Conference on Blockchain and Cryptocurrency (ICBC)

作者： Matthias Lohr Kenneth Skiba Marco Konersmann Jan Jü rjens Steffen Staab Institute for Software Technology University of Koblenz-Landau Koblenz Germany Fernuniversit&#x00E4 t in Hagen Artificial Intelligence Group Hagen Germany Fraunhofer ISST Dortmund Germany Institute for Parallel and Distributed Systems (IPVS) University of Stuttgart Stuttgart Germany University of Southampton Southampton United Kingdom

Existing fair exchange protocols usually neglect consideration of cost when assessing their fairness. However, in an environment with non-negligible transaction cost, e.g., public blockchains, high or unexpected transaction cost might be an obstacle for wide-spread adoption of fair exchange protocols in business applications. For example, as of 2021-12-17, the initialization of the FairSwap protocol on the Ethereum blockchain requires the selling party to pay a fee of approx. 349.20 USD per exchange. We address this issue by defining cost fairness, which can be used to assess two-party exchange protocols including implied transaction cost. We show that in an environment with non-negligible transaction cost where one party has to initialize the exchange protocol and the other party can leave the exchange at any time cost fairness cannot be achieved.

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On estimating the useful work distribution of parallel programs under P3T: a static performance estimator

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Concurrency and Computation: Practice and Experience 1996年第4期8卷

作者： Thomas Fahringer Institute for Software Technology and Parallel Systems University of Vienna Liechtensteinstr. 22 A-1090 Vienna Austria

In order to improve a parallel program's performance it is critical to evaluate how even the work contained in a program is distributed over all processors dedicated to the computation. Traditional work distribution analysis is commonly performed at the machine level. The disadvantage of this method is that it cannot identify whether the processors are performing useful or redundant (replicated) work. The paper describes a novel method of statically estimating the useful work distribution of distributed-memory parallel programs at the program level, which carefully distinguishes between useful and redundant work. The amount of work contained in a parallel program, which correlates with the number of loop iterations to be executed by each processor, is estimated by accurately modeling loop iteration spaces, array access patterns and data distributions. A cost function defines the useful work distribution of loops, procedures and the entire program. Lower and upper bounds of the described parameter are presented. The computational complexity of the cost function is independent of the program's problem size, statement execution and loop iteration counts. As a consequence, estimating the work distribution based on the described method is considerably faster than simulating or actually compiling and executing the program. Automatically estimating the useful work distribution is fully implemented as part of P 3 T, which is a static parameter based performance prediction tool under the Vienna Fortran Compilation System (VFCS). The Lawrence Livermore Loops are used as a test case to verify the approach.

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Scene-specific pedestrian detection based on parallel vision

arXiv

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arXiv 2017年

作者： Zhang, Wenwen Wang, Kunfeng Qu, Hua Zhao, Jihong Wang, Fei-Yue School of Software Engineering Xi’an Jiaotong University Xi’an710049 China State Key Laboratory for Management and Control of Complex Systems Institute of Automation Chinese Academy of Sciences Beijing100190 China Qingdao Academy of Intelligent Industries Qingdao266000 China School of Software Engineering Xi’an Jiaotong University Xi’an710049 China Department of Communication and Information Engineering Xi’an Jiaotong University Xi’an710049 China Research Center for Computational Experiments and Parallel Systems Technology National University of Defense Technology Changsha410073 China

As a special type of object detection, pedestrian detection in generic scenes has made a significant progress trained with large amounts of labeled training data manually. While the models trained with generic dataset work bad when they are directly used in specific scenes. With special viewpoints, flow light and backgrounds, datasets from specific scenes are much different from the datasets from generic scenes. In order to make the generic scene pedestrian detectors work well in specific scenes, the labeled data from specific scenes are needed to adapt the models to the specific scenes. While labeling the data manually spends much time and money, especially for specific scenes, each time with a new specific scene, large amounts of images must be labeled. What’s more, the labeling information is not so accurate in the pixels manually and different people make different labeling information. In this paper, we propose an ACP-based method, with augmented reality’s help, we build the virtual world of specific scenes, and make people walking in the virtual scenes where it is possible for them to appear to solve this problem of lacking labeled data and the results show that data from virtual world is helpful to adapt generic pedestrian detectors to specific scenes. Copyright © 2017, The Authors. All rights reserved.

关键词： Virtual reality

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科学研究的第五范式——以智能驱动的材料设计为例

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Engineering 2023年第5期24卷 126-137,I0003,I0004页

作者： Can Leng Zhuo Tang Yi-Ge Zhou Zean Tian Wei-Qing Huang Jie Liu Keqin Li Kenli Li Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense TechnologyChangsha 410073China Laboratory of Software Engineering for Complex Systems National University of Defense TechnologyChangsha 410073China National Supercomputing Center in Changsha Changsha 410082China College of Computer Science and Electronic Engineering Hunan UniversityChangsha 410082China Institute of Chemical Biology and Nanomedicine State Key Laboratory of Chemo/Biosensing and ChemometricsCollege of Chemistry and Chemical EngineeringHunan UniversityChangsha 410082China Department of Applied Physics School of Physics and ElectronicsHunan UniversityChangsha 410082China Department of Computer Science State University of New YorkNew PaltzNY 12561USA

科学正在进入一个新时代——第五范式——它被认为是知识整合到不同领域的主要特征,是基于无所不在的机器学习系统的计算社区中智能驱动的工作。在此,我们通过在天河一号超级计算机系统上构建的催化材料专门设计的典型平台案例,生动地... 详细信息

科学正在进入一个新时代——第五范式——它被认为是知识整合到不同领域的主要特征,是基于无所不在的机器学习系统的计算社区中智能驱动的工作。在此,我们通过在天河一号超级计算机系统上构建的催化材料专门设计的典型平台案例,生动地阐明了第五范式的本质,旨在促进第五范式在其他领域的培养。第五范式平台主要包括模型自动构建(原始数据提取)、指纹自动构建(神经网络特征选择)以及跨学科知识串联的重复迭代(“火山图”)。与分解一起进行的是对迭代中实现的体系结构的性能评估。通过讨论,第五范式的智能驱动平台可以极大地简化和改进研究中极其繁琐和具有挑战性的工作,并通过补偿机器学习中缺少样本和替代一些由于计算资源不足而导致的数值计算来实现数值计算与机器学习之间的相互反馈,从而加速探索过程。在数据驱动的学科中,跨学科专家的协同作用和对动态数据需求的急剧增长仍然是一个挑战。我们相信,对第五范式平台的一瞥可以为其在其他领域的应用铺平道路。

关键词：机器学习自动构建天河一号数据驱动神经网络动态数据知识整合科学研究

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Towards Serialization/Deserialization-free State Transfer in Serverless Workflows

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ACM Transactions on Computer systems 1000年

作者： Xingda Wei Fangming Lu Zhuobin Huang Rong Chen Mingyu Wu Haibo Chen Institute of Parallel and Distributed Systems Shanghai Jiao Tong University Shanghai China Institute of Parallel and Distributed Systems Shanghai Jiao Tong University Shanghai China University of Electronic Science and Technology of China Chengdu China Key Laboratory of System Software Chinese Academy of Sciences Beijing China

Serialization and deserialization dominate the state transfer time of serverless workflows, leading to substantial performance penalties when executing various serverless workflow applications. We identify the key reason for serialization and deserialization as a lack of ability to efficiently access the (remote) memory of another function. To this end, we propose RMMap, an OS primitive for remote memory map, which allows a serverless function to directly access the memory of another function, even if it is located remotely. RMMap is the first to completely eliminate serialization and deserialization overhead when transferring states between any pairs of functions in (unmodified) serverless workflows. To make remote memory map efficient and feasible, we co-design it with modern networking (RDMA), OS, language runtime, and serverless platform. Evaluations using real-world serverless workloads show that integrating RMMap with Knative reduces the serverless workflow execution time on Knative by up to 2.6 × and improves resource utilizations by 86.3%.

关键词： Serverless workflow state transfer serialization and deserialization RDMA

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Foundational Competencies and Responsibilities of a Research software Engineer

arXiv

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arXiv 2023年

作者： Goth, Florian Alves, Renato Braun, Matthias Castro, Leyla Jael Chourdakis, Gerasimos Christ, Simon Cohen, Jeremy Druskat, Stephan Erxleben, Fredo Grad, Jean-Noël Hagdorn, Magnus Hodges, Toby Juckeland, Guido Kempf, Dominic Lamprecht, Anna-Lena Linxweiler, Jan Löffler, Frank Martone, Michele Schwarzmeier, Moritz Seibold, Heidi Thiele, Jan Philipp Waldow, Harald von Wittke, Samantha Institute for Theoretical Physics and Astrophysics University of Würzburg Germany European Molecular Biology Laboratory Heidelberg Germany Cluster of Excellence IntCDC University of Stuttgart Germany ZB MED Information Centre for Life Sciences Cologne Germany School of Computation Information and Technology Technical University of Munich Garching Germany Institute for Parallel and Distributed Systems University of Stuttgart Stuttgart Germany Leibniz University Hannover Department of Cell Biology and Biophysics Computational Biology Germany Imperial College London London United Kingdom Institute for Software Technology Berlin Germany Humboldt-Universität zu Berlin Department of Computer Science Berlin Germany Helmholtz-Zentrum Dresden-Rossendorf Germany Institute for Computational Physics University of Stuttgart Germany Geschäftsbereich IT Charité Universitätsmedizin Berlin Germany The Carpentries United States Heidelberg University Scientific Software Center Germany Institute of Computer Science University of Potsdam Germany Technische Universität Braunschweig Germany Michael Stifel Center Jena Friedrich Schiller University Jena Germany Leibniz Supercomputing Centre Garching Germany Mathematical Modeling and Analysis TU Darmstadt Germany IGDORE Munich Germany Weierstrass Institute Berlin Germany Leibniz University Hannover Institute of Applied Mathematics Scientific Computing Hannover Germany Johann Heinrich von Thünen Institute Centre for Information Management Germany

The term Research software Engineer, or RSE, emerged a little over 10 years ago as a way to represent individuals working in the research community but focusing on software development. The term has been widely adopted and there are a number of high-level definitions of what an RSE is. However, the roles of RSEs vary depending on the institutional context they work in. At one end of the spectrum, RSE roles may look similar to a traditional research role. At the other extreme, they resemble that of a software engineer in industry. Most RSE roles inhabit the space between these two extremes. Therefore, providing a straightforward, comprehensive definition of what an RSE does and what experience, skills and competencies are required to become one is challenging. In this community paper we define the broad notion of what an RSE is, explore the different types of work they undertake, and define a list of foundational competencies as well as values that outline the general profile of an RSE. Further research and training can build upon this foundation of skills and focus on various aspects in greater detail. We expect that graduates and practitioners will have a larger and more diverse set of skills than outlined here. On this basis, we elaborate on the progression of these skills along different dimensions. We look at specific types of RSE roles, propose recommendations for organisations, and give examples of future specialisations. An appendix details how existing curricula fit into this framework. © 2023, CC BY.

关键词： Computer aided software engineering

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On the implementation of the Opus coordination language

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Concurrency and Computation: Practice and Experience 2000年第4期12卷

作者： Erwin Laure Matthew Haines Piyush Mehrotra Hans Zima Institute for Software Technology and Parallel Systems University of Vienna Liechtensteinstrasse 22 A-1090 Vienna Austria Department of Computer Science University of Wyoming Laramie WY 82071-3682 U.S.A. Institute for Computer Applications in Science and Engineering NASA Langley Research Center Mail Stop 132C Hampton VA 23681-0001 U.S.A.

Opus is a new programming language designed to assist in coordinating the execution of multiple, independent program modules. With the help of Opus, coarse grained task parallelism between data parallel modules can be expressed in a clean and structured way. In this paper we address the problems of how to build a compilation and runtime support system that can efficiently implement the Opus constructs. Our design considers the often-conflicting goals of efficiency and modular construction through software re-use. In particular, we present the system requirements for an efficient Opus implementation, the Opus runtime system, and describe how they work together to provide the underlying services that the Opus compiler needs for a broad class of machines. Copyright © 2000 John Wiley & Sons, Ltd.

关键词： Opus task parallelism data parallelism coordination

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