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2nd International Symposium on Leveraging Applications of Formal Methods, Verification and Validation, ISoLA 2006

作者： Kamkin, Alexander Institute for System Programming of Russian Academy of Sciences B. Communisticheskaya 25 Moscow Russia

ISBN: (纸本)0769530710

Functional validation is a major bottleneck in hardware design. Two main approaches to ensure functional correctness of hardware systems are based on formal verification and simulation techniques. It is widely recognized that formal verification techniques are exhaustive but do not scale well;simulation-based techniques are scalable but are not exhaustive. Possible compromise is provided by semi-formal approaches combining formal specifications, functional coverage definition, and simulation. This paper describes the UniTESK approach to specification-based validation of hardware designs in which a good balance of exhaustiveness and scalability is found. UniTESK is originally intended for the development of high-quality functional tests for software systems. The paper shows how to adapt it for functional validation of Verilog HDL and systemC designs. © 2007 IEEE.

关键词： Formal verification

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CONTROL system DESIGN CONSIDERING A TRADEOFF BETWEEN EVALUATED UNCERTAINTY RANGES AND CONTROL PERFORMANCE

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Asian Journal of Control 2008年第1期1卷

作者： Y. Wakasa Y. Yamamoto Dept. of Applied Analysis and Complex Dynamical Systems Graduate School of Informatics Kyoto University Kyoto Japan. Yuji Wakasa was born in Okayama Japan in 1968. He received the B.S. and M.S. degrees in engineering from Kyoto university Japan in 1992 and 1994 respectively. From 1994 to 1998 he was a Research Associate in the Department of Information Technology Okayama University. Since April 1998 he has been a Research Associate in the Graduate School of Informatics Kyoto University. His current research interests include robust control and control system design via mathematical programming. Yutaka Yamamoto received his B.S. and M.S. degrees in engineering from Kyoto University Kyoto Japan in 1972 and 1974 respectively and the M.S. and Ph.D. degree in mathematics from the University of Florida in 1976 and 1978 respectively. From 1978 to 1987 he was with Department of Applied Mathematics and Physics Kyoto University and from 1987 to 1997 with Department of Applied System Science. Since 1998 he is a professor at the current position. His current research interests include realization and robust control of distributed parameter systems learning control sampled-data systems and digital signal processing. Dr. Yamamoto is a receipient of the Sawaragi memorial paper award (1985) the Outstanding Paper Award of SICE (1987) Best Author Award of SICE (1990) the George Axelby Outstanding Paper Award of IEEE CSS in 1996 Takeda Paper Prize of SICE in 1997. He is a Fellow of IEEE. He was an associate editor of Automatica. He is currently an associate editor of IEEE Transactions on Automatic Control Systems and Control Letters and Mathematics of Control Signals and Systems. He is a member of the IEEE the Society of Instrument and Control Engineers (SICE) and the Institute of Systems Control and Information Engineers.

This paper presents a design method of control systems such that a designer can flexibly take account of tradeoffs between evaluated uncertainty ranges and the level of control performance. The problem is reduced to a BMI problem and approximately solved by LMIs. The convergence of the proposed approximation is proved in a modified sense. A numerical example shows the effectiveness of the proposed method in comparison with the standard robust control.

关键词： Control system design LMI BMI tradeoff curves

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Clustering-based microcode compression

Clustering-based microcode compression

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24th International Conference on Computer Design 2006, ICCD

作者： Borin, Edson Breternitz Jr., Mauricio Youfeg, Wu Araujo, Guido Institute of Computing University of Campinas Campinas SP Brazil Programming System Lab. Intel Corporation Santa Clara CA United States

Microcode enables programmability of (micro) architectural structures to enhance functionality and to apply patches to an existing design. As more features get added to a CPU core, the area and power costs associated with microcode increase. A recent Intel internal design targeted at low power and small footprint has estimated the costs of the microcode ROM to approach 20% of the total die area (and associated power consumption). Therefore, it is desirable to apply compression techniques to microcode. Microcode poses unique challenges for compression due to the long instruction format, the hand-coded nature of the programs and the stringent performance requirements that require fast decompression. This paper describes techniques for microcode compression that achieve significant area and power savings, while presenting a streamlined architecture that enables high throughput within the constraints of a high performance CPU. The paper presents results for microcode compression on several commercial CPU designs which demonstrates compression ratios ranging from 50% to 62%. © 2006 IEEE.

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Concurrent Testing of Java Components Using Java PathFinder

Concurrent Testing of Java Components Using Java PathFinder

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International Symposium on Leveraging Applications of Formal Methods, Verification and Validation ( ISoLA)

作者： Vadim Mutilin Institute for System Programming Russian Academy of Sciences Moscow Russia

Concurrent systems work nondeterministically. For concurrent systems, UniTESK-based test suite executes methods with different parameters in different states, but it does not guarantee that all possible execution paths of a method will be tested because of its concurrent nature. This paper presents an integration method that combines the testing techniques with model checking techniques of Java PathFinder (JPF). The method guarantees that all possible execution paths needed for checking the correctness of the system are explored. The method is based on localization of the search performed by JPF. It reduces the state space while preserving the advantages of UniTESK like state abstraction and automatic checking of correctness. Moreover, it allows to use the same test suite without modification with JPF.

关键词： Java system testing Interleaved codes Yarn State-space methods Computer languages Software testing Application software Formal specifications Virtual machining

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The UniTESK Approach to Specification-Based Validation of Hardware Designs

The UniTESK Approach to Specification-Based Validation of Ha...

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International Symposium on Leveraging Applications of Formal Methods, Verification and Validation ( ISoLA)

作者： Alexander Kamkin Institute for System Programming Russian Academy of Sciences Moscow Russia

Functional validation is a major bottleneck in hardware design. Two main approaches to ensure functional correctness of hardware systems are based on formal verification and simulation techniques. It is widely recognized that formal verification techniques are exhaustive but do not scale well; simulation-based techniques are scalable but are not exhaustive. Possible compromise is provided by semi-formal approaches combining formal specifications, functional coverage definition, and simulation. This paper describes the UniTESK approach to specification-based validation of hardware designs in which a good balance of exhaustiveness and scalability is found. UniTESK is originally intended for the development of high-quality functional tests for software systems. The paper shows how to adapt it for functional validation of Verilog HDL and systemC designs.

关键词： system testing Hardware design languages Software testing Object oriented modeling Formal verification Computer architecture Formal specifications Software systems Functional programming Scalability

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Using intelligent transportation systems (ITS) data for emission estimation

Using intelligent transportation systems (ITS) data for emis...

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Air and Waste Management Association's - 99th Annual Conference and Exhibition 2006

作者： Schneider IV, William H. Zietsman, Josias Knowles, William E. Texas Transportation Institute Texas A and M University System 3135 TAMU College Station TX 77843-3135 United States Center for Air Quality Studies - Gilchrist Texas Transportation Institute Texas A and M University System College Station TX 77843-3135 United States Transportation Planning and Programming Division Texas Department of Transportation 12828 Texas Sage Court Austin TX 78732 United States

ISBN: (纸本)0923204806

A corridor sensitivity analysis was performed at Houston, TX, to help analyze the local placement of ITS technologies to improve the overall performance of current and future EPA emission models. There was a potential difference of > 20% depending on the base bin data, vehicle speed, and vehicle-miles traveled. As a result of these findings, a corridor sensitivity study was developed with real-time ITS data for one section of the I-10 corridor in San Antonio, TX. The impact of temporal aggregation associated with a nonrecurring incident was quantified. MOBILE6 emission rates were developed specifically for the San Antonio area. There was slight difference in vehicle emissions estimation between the two techniques for temporal aggregation between the 5 through 30 min aggregated bins. There was some difference in the emissions estimation between the 1-min and the 45 and 60 min aggregation levels. This is an abstract of a paper presented at the AWMA's 99th Annual Conference and Exhibition (New Orleans, LA 6/20-23/2006).

关键词： Intelligent systems

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InfoShield: a security architecture for protecting information usage in memory

InfoShield: a security architecture for protecting informati...

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IEEE Symposium on High-Performance Computer Architecture

作者： W. Shi J.B. Fryman G. Gu H.-H.S. Lee Y. Zhang J. Yang School of Electrical and Computer Engineering Georgia Tech College of Computing Georgia Institute of Technology Programming System Lab Corporate Technology Intel Corporation USA Department of Computer Science University of Pittsburgh USA Department of Computer Science and Engineering University of California Riverside USA

Cyber theft is a serious threat to Internet security. It is one of the major security concerns by both network service providers and Internet users. Though sensitive information can be encrypted when stored in non-volatile memory such as hard disks, for many e-commerce and network applications, sensitive information is often stored as plaintext in main memory. Documented and reported exploits facilitate an adversary stealing sensitive information from an application's memory. These exploits include illegitimate memory scan, information theft oriented buffer overflow, invalid pointer manipulation, integer overflow, password stealing Trojans and so forth. Today's computing system and its hardware cannot address these exploits effectively in a coherent way. This paper presents a unified and lightweight solution, called InfoShield that can strengthen application protection against theft of sensitive information such as passwords, encryption keys, and other private data with a minimal performance impact. Unlike prior whole memory encryption and information flow based efforts, InfoShield protects the usage of information. InfoShield ensures that sensitive data are used only as defined by application semantics, preventing misuse of information. Comparing with prior art, InfoShield handles a broader range of information theft scenarios in a unified framework with less overhead. Evaluation using popular network client-server applications shows that InfoShield is sound for practical use and incurs little performance loss because InfoShield only protects absolute, critical sensitive information. Based on the profiling results, only 0.3% of memory accesses and 0.2% of executed codes are affected by InfoShield.

关键词： Information security Protection Cryptography Computer security IP networks Web and internet services Nonvolatile memory Hard disks Buffer overflow Hardware

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Introducing trigger support for XML database systems

Introducing trigger support for XML database systems

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2nd Spring Colloquium for Young Researchers in Databases and Information systems, SYRCoDIS 2005

作者： Grinev, Maxim Rekouts, Maria Institute for System Programming Russian Academy of Sciences Russia

There is a growing number of XML database systems of different kinds now on the market. XML DBMS vendors rushed to enrich their products with more flexible and advanced features to make them satisfy the requirements of modern applications. And the time is ripe for the database research community to study the issues involved with extending XML DBMS with capabilities analogous to those that are popular in traditional DBMS, keeping in mind that XML databases now become a widespread means for storing and exchanging information on the Web, and increasingly used in dynamic applications such as e-commerce. In this paper, being bound for the issues, we provide a definition of triggers for XML based on XQuery and a previously defined update language, and methods to support triggers in XML database systems.

关键词： XML

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Optimal mapping of a parallel application processes onto heterogeneous platform

Optimal mapping of a parallel application processes onto het...

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19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005

作者： Kalinov, Alexey Klimov, Sergey Institute for System Programming Russian Academy of Sciences 25 Bolshaya Kommunisticheskaya str. Moscow 1090045 Russia Institute for System Programming Russian Academy of Sciences

ISBN: (纸本)0769523129

The paper is devoted to analysis of a strategy of computation distribution on heterogeneous parallel systems. According to this strategy processes of parallel program are distributed over the processors according to their performances and data are distributed between processes evenly. The paper presents an algorithm that computes optimal number of the processes and their distribution over processors minimizing the execution time of an application. The processor performance is considered as a function of the number of processes running on the processor and the amount of the data processing by the processor.

关键词： Parallel processing systems

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XDGL: XPath-based concurrency control protocol for XML data

XDGL: XPath-based concurrency control protocol for XML data

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22nd British National Conference on Databases, BNCOD 22

作者： Pleshachkov, Peter Chardin, Petr Kuznetsov, Sergei Institute for System Programming RAS Russia Moscow State University Russia

Today XML has become the most important data exchange technique on the World Wide Web. As a consequence the interest in concurrent XML processing has greatly increased. In this paper we propose a new XPath-based DataGuide Locking protocol (XDGL), which generalizes on and extends the hierarchical data locking protocol. This new protocol takes into account the semantics and nature of XML. It can be easily implemented on top of traditional databases as well as in a native XML DBMS. © Springer-Verlag Berlin Heidelberg 2005.

关键词： Concurrency control

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