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检索条件"机构=Int. Lab. Image Processing and Computer Graphics"
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UTILIZING FIXED-SIZE SYSTOLIC ARRAYS FOR LARGE COMPUTATIONAL PROBLEMS
UTILIZING FIXED-SIZE SYSTOLIC ARRAYS FOR LARGE COMPUTATIONAL...
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SATELLITE CONF AT THE 1988 BIANNUAL int.RNATIONAL CONF ON PATTERN RECOGNITION : RECENT ISSUES IN PATTERN ANALYSIS AND RECOGNITION
作者: PETKOV, N Int. Lab. Image Processing and Computer Graphics Central Inst. Cybernetics and Info. Processes Kurstr. 33 P.O. Box 1298 Berlin GDR-1086 Germany
A new scheme for partitioning systolic algorithms is presented. It is based on the time-sharing properties of the c-slow circuits. The technique is amenable to formalization and holds high potential for automatization... 详细信息
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Running order statistics on a bit-level systolic array  4th
Running order statistics on a bit-level systolic array
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4th int.rnational Workshop on Parallel processing by Cellular Automata and Arrays, Parcella 1988
作者: Petkov, N. Int’l Lab. Image Processing and Computer Graphics Central Institute of Cybernetics and Information Processes Kurstr. 33 P.O. Box 1298 BerlinDDR-1086 Germany
A two-dimensional bit-level systolic array for running order statistics is presented. Both word-level and bit-level parallelism are employed. The array is extremely easy to implement in VLSI, because its cells are ver... 详细信息
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